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From: Simon Glass <sjg@chromium.org>
To: u-boot@lists.denx.de
Subject: [PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions
Date: Sat, 22 Aug 2020 09:09:43 -0600	[thread overview]
Message-ID: <CAPnjgZ0C+c71C-YwyoY8GZqV3R_QNwso5Lh0wUpJ2Zu8o827ig@mail.gmail.com> (raw)
In-Reply-To: <eea9309c-8ded-a2a1-248b-cd450de54489@denx.de>

Hi Stefan,

On Fri, 14 Aug 2020 at 05:40, Stefan Roese <sr@denx.de> wrote:
>
> Hi Simon,
>
> On 04.08.20 17:05, Simon Glass wrote:
>
> <snip>
>
> >>>>>> Changes in v1:
> >>>>>> - Change patch subject
> >>>>>> - Enhance Kconfig help descrition
> >>>>>> - Use if() instead of #if
> >>>>>>
> >>>>>>     drivers/pci/Kconfig      | 10 ++++++++++
> >>>>>>     drivers/pci/pci-uclass.c |  9 ++++++---
> >>>>>>     2 files changed, 16 insertions(+), 3 deletions(-)
> >>>>>
> >>>>> This needs an update to a sandbox test to handle this behaviour.
> >>>>
> >>>> Okay. But how should I handle all these defconfig changes with regard
> >>>> to the other patches in this series, introducing multiple new PCI
> >>>> related Kconfig options. With 3 new Kconfig options, all permutations
> >>>> would lead to 8 (2 ^ 3) different defconfig files. This does not
> >>>> scale.
> >>>>
> >>>> I might be missing something here though - perhaps this is easier to
> >>>> achieve.
> >>>
> >>> For sandbox, turn on all options and then add a new PCI bus that uses
> >>> this functionality. If there are lots of combinations you could add 8
> >>> new buses, but I'm hoping that isn't necessary?
> >>
> >> If I turn on all new options, sandbox will run with these new options
> >> enabled. I don't know with with implications, as it usually runs with
> >> the "normal" PCI related Kconfig options. Also the "normal" PCI
> >> defconfig (e.g. CONFIG_PCI_REGION_MULTI_ENTRY etc disabled) will not
> >> be tested any more via the sandbox tests. So you get either a test for
> >> the new Kconfig option enabled or disabled this way.
> >>
> >> Do you really want me to do this?
> >
> > So the Kconfig completely changes the implementation of PCI? That
> > doesn't make it very testable, as you say.
> >
> > Instead, I think the Kconfig should enable the option, then use one of
> > three ways to select the option:
> >
> > - a device tree property (on sandbox particularly)
> > - compatible string (where the property is not appropriate
> > - setting a flag in PCI bus (where a driver requires the option be selected)
> >
> > That way you can write a test for the new feature in sandbox, without
> > deleting all the other tests.
>
> Coming back to this issue after some time - sorry for the delay.
>
> I'm not sure, if I understand this correctly. Do you suggest that the
> driver code (in this case pci-uclass.c) should be extended to support
> this (sandbox) testing support?

Not really. I see these things as features that drivers can enable /
disable depending on their needs. If that is correct, then sandbox is
no different form other drivers, except that perhaps it might support
all combinations rather than just one.

>
> If yes, I really think that this is counterproductive. As we added (at
> least some of) the Kconfig options explicitly, to not add code to
> pci-uclass.c in the "normal case". So adding code to e.g. check a device
> tree property or a compatible string would increase the code size again.

How about some flags in struct pci_controller?

>
> If not, I'm still unsure how you would like to test the "normal case",
> e.g. with CONFIG_PCI_REGION_MULTI_ENTRY disabled, and with it enabled
> without adding more sandbox build targets, with all the Kconfig options
> permutations. As the extra code (in pci-uclass) is either included or
> not in the sandbox binary.

Kconfig enables and disables the feature by adding the code. But we
can still have a flag to determine whether it is used by a particular
driver. That way we can keep our test coverage.

>
> But after adding one test for the first of these pci-uclass related
> patches, I do have a general comment on this. I find it quite complex
> and time consuming to add these tests. Don't get me wrong, I agree in
> general, that having tests in U-Boot is very good. But enforcing tests
> for each and every new feature addition in drivers (layers) like PCI
> seems a bit too much to me. For example new features like the "pci:
> pci-uclass: Add support for Single-Root I/O Virtualization" would mean
> AFAIU, that I need to write some emulation code for such a PCI device
> and also some testing driver matching such a device, since we have no
> real hardware like this in sandbox. This would result in much more
> complex code for this test & emulation compared to the driver change /
> extension.

Yes but it is not that hard. There are a few PCI emulation devices in
U-Boot and these form the basis of existing tests. Before this, we
really had no tests for PCI and even the behaviour was largely
undefined. Your ability to convert the regions[] array to a
dynamically allocated array is partly thanks to these tets.

>
> To sum it up, I'm asking if you still think that adding tests for all
> those PCI driver extensions is really necessary for upstream acceptance?
> What's your opinion on this? Do you understand my position on this?

I don't want to be silly about it, but in general if we add new
features, particularly to core features, I think there should be
tests. Apart from correctness, they also define the behaviour of the
code, in many cases. The test you added in one patch looks good, and
doesn't look too complicated. Of course it is more than zero work. But
so much of the refactoring we do in U-Boot these days would be much
harder and error-prone without these tests.

+Tom Rini who might want to weigh in.

Regards,
SImon

  reply	other threads:[~2020-08-22 15:09 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-24 10:08 [PATCH v1 00/24] arm: Introduce Marvell/Cavium OcteonTX/TX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 01/24] fdtdec: Add API to read pci bus-range property Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:09     ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 02/24] pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 03/24] pci: pci-uclass: Dynamically allocate the PCI regions Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:16     ` Stefan Roese
2020-08-05  9:12       ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 04/24] pci: pci-uclass: Fix incorrect argument in map_sysmem Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 05/24] pci: pci-uclass: Make DT subnode parse optional Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:35     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-08-04 14:03         ` Stefan Roese
2020-08-04 15:05           ` Simon Glass
2020-08-14 11:40             ` Stefan Roese
2020-08-22 15:09               ` Simon Glass [this message]
2020-08-23  9:41                 ` Stefan Roese
2020-08-23 14:03                   ` Tom Rini
2020-08-24  7:36                     ` Stefan Roese
2020-08-24 13:09                       ` Tom Rini
2020-08-25 15:04                         ` Simon Glass
2020-08-25 15:09                           ` Tom Rini
2020-07-24 10:08 ` [PATCH v1 07/24] pci: pci-uclass: Add support for Enhanced Allocation in Bridges Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 08/24] pci: pci-uclass: Add support for Single-Root I/O Virtualization Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 09/24] pci: pci-uclass: Add VF BAR map support for Enhanced Allocation Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 10/24] pci: pci-uclass: Add support for Alternate-RoutingID capability Stefan Roese
2020-07-24 10:08 ` [PATCH v1 11/24] pci: pci-uclass: Check validity of ofnode Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 12/24] arm: include/asm/io.h: Add 64bit clrbits and setbits helpers Stefan Roese
2020-07-24 10:08 ` [PATCH v1 13/24] arm: octeontx: Add headers for OcteonTX Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:21     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 14/24] arm: octeontx2: Add headers for OcteonTX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:23     ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 15/24] ata: ahci: Add BAR index quirk for Cavium PCI SATA device Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:41     ` Stefan Roese
2020-07-31 18:35       ` Simon Glass
2020-08-04 13:37         ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 16/24] pci: Add PCI controller driver for OcteonTX / TX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 16:25     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-08-05 13:25         ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 17/24] mmc: Remove static qualifier on mmc_power_init Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 18/24] mmc: Add MMC controller driver for OcteonTX / TX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 19/24] mtd: nand: Add NAND controller driver for OcteonTX Stefan Roese
2020-07-24 10:08 ` [PATCH v1 20/24] net: Add NIC " Stefan Roese
2020-07-24 10:08 ` [PATCH v1 21/24] net: Add NIC controller driver for OcteonTX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 22/24] watchdog: Add reset support for OcteonTX / TX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:25     ` Stefan Roese
2020-08-05 13:47       ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 23/24] arm: octeontx: Add support for OcteonTX SoC platforms Stefan Roese
2020-07-24 10:08 ` [PATCH v1 24/24] arm: octeontx2: Add support for OcteonTX2 " Stefan Roese

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