From: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
To: Jagan Teki
<jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
Mark Kettenis
<mark.kettenis-qWit8jRvyhVmR6Xm/wNWPw@public.gmane.org>
Cc: Patrick Wildt <patrick-Er2xLVyhcs+zQB+pC5nmwQ@public.gmane.org>,
U-Boot-Denx <u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org>,
Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
Suniel Mahesh
<sunil-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
Philipp Tomsich
<philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>,
linux-amarula
<linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Subject: Re: [PATCH 5/8] pci: Add Rockchip PCIe controller driver
Date: Mon, 27 Apr 2020 18:19:37 +0100 [thread overview]
Message-ID: <9c00b50f-cf17-9c4e-4c75-b6e85668f9a2@arm.com> (raw)
In-Reply-To: <CAMty3ZC+DiW2gGjN3rWcrwHPXZfxuGhjJN-1caUXW-Ry7VNR+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On 2020-04-25 8:36 pm, Jagan Teki wrote:
> On Sun, Apr 26, 2020 at 12:23 AM Mark Kettenis <mark.kettenis-qWit8jRvyhVmR6Xm/wNWPw@public.gmane.org> wrote:
>>
>>> From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
>>> Date: Sat, 25 Apr 2020 16:33:51 +0530
>>>
>>> Add Rockchip PCIe controller driver for rk3399 platform.
>>>
>>> Driver support Gen1 by operating as a Root complex.
>>>
>>> Thanks to Patrick for initial work.
>>
>> Tried to get this to work on my firefly-rk3399 which made me notice
>> some shortcomings:
>>
>> 1. The vpcie1v8 and vpcie0v9 supplies are optional, just like the
>> vpcie3v3 supply.
FWIW those are "non-optional" in Linux in the sense that supplies to the
PCIE_AVDD_0V9 and PCIE_AVDD_1V8 pins of the SoC must physically exist,
even if they aren't described. If U-Boot doesn't have the same "create a
dummy regulator if none is specified" behaviour then you might need some
slightly different logic there.
The 3.3V and 12V supplies on the other hand may legitimately not be part
of the board at all, depending on whether it implements a full-size
slot, a mini-PCI/M.2 socket, a hard-wired endpoint chip, or just the
data and clock signal pairs exposed on some non-standard connector.
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: u-boot@lists.denx.de
Subject: [PATCH 5/8] pci: Add Rockchip PCIe controller driver
Date: Mon, 27 Apr 2020 18:19:37 +0100 [thread overview]
Message-ID: <9c00b50f-cf17-9c4e-4c75-b6e85668f9a2@arm.com> (raw)
In-Reply-To: <CAMty3ZC+DiW2gGjN3rWcrwHPXZfxuGhjJN-1caUXW-Ry7VNR+A@mail.gmail.com>
On 2020-04-25 8:36 pm, Jagan Teki wrote:
> On Sun, Apr 26, 2020 at 12:23 AM Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>>
>>> From: Jagan Teki <jagan@amarulasolutions.com>
>>> Date: Sat, 25 Apr 2020 16:33:51 +0530
>>>
>>> Add Rockchip PCIe controller driver for rk3399 platform.
>>>
>>> Driver support Gen1 by operating as a Root complex.
>>>
>>> Thanks to Patrick for initial work.
>>
>> Tried to get this to work on my firefly-rk3399 which made me notice
>> some shortcomings:
>>
>> 1. The vpcie1v8 and vpcie0v9 supplies are optional, just like the
>> vpcie3v3 supply.
FWIW those are "non-optional" in Linux in the sense that supplies to the
PCIE_AVDD_0V9 and PCIE_AVDD_1V8 pins of the SoC must physically exist,
even if they aren't described. If U-Boot doesn't have the same "create a
dummy regulator if none is specified" behaviour then you might need some
slightly different logic there.
The 3.3V and 12V supplies on the other hand may legitimately not be part
of the board at all, depending on whether it implements a full-size
slot, a mini-PCI/M.2 socket, a hard-wired endpoint chip, or just the
data and clock signal pairs exposed on some non-standard connector.
Robin.
next prev parent reply other threads:[~2020-04-27 17:19 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-25 11:03 [PATCH 0/8] rockchip: Add PCIe host support Jagan Teki
2020-04-25 11:03 ` Jagan Teki
[not found] ` <20200425110354.12381-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2020-04-25 11:03 ` [PATCH 1/8] iopoll: Add dealy to read poll Jagan Teki
2020-04-25 11:03 ` Jagan Teki
2020-04-25 11:03 ` [PATCH 2/8] iopoll: Add readl_poll_sleep_timeout Jagan Teki
2020-04-25 11:03 ` Jagan Teki
2020-04-25 11:03 ` [PATCH 3/8] clk: rk3399: Enable PCIE_PHY clock Jagan Teki
2020-04-25 11:03 ` Jagan Teki
2020-04-25 20:24 ` Mark Kettenis
2020-04-25 20:24 ` Mark Kettenis
[not found] ` <016196395ae8077b-Sse5TxTiDWuxJFhkpKByzTXZidJgq2Oi@public.gmane.org>
2020-04-26 9:38 ` Jagan Teki
2020-04-26 9:38 ` Jagan Teki
2020-04-25 11:03 ` [PATCH 4/8] clk: rk3399: Disable " Jagan Teki
2020-04-25 11:03 ` Jagan Teki
[not found] ` <20200425110354.12381-5-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2020-04-28 9:53 ` [PATCH 4/8] clk: rk3399: Disable PCIE_PHY clock【请注意，邮件由linux-rockchip-bounces+kever.yang=rock-chips.com@lists.infradead.org代发】 Kever Yang
2020-04-28 9:53 ` Kever Yang
2020-04-25 11:03 ` [PATCH 5/8] pci: Add Rockchip PCIe controller driver Jagan Teki
2020-04-25 11:03 ` Jagan Teki
2020-04-25 18:53 ` Mark Kettenis
2020-04-25 18:53 ` Mark Kettenis
2020-04-25 19:36 ` Jagan Teki
2020-04-25 19:36 ` Jagan Teki
2020-04-25 20:29 ` Mark Kettenis
2020-04-25 20:29 ` Mark Kettenis
2020-04-28 19:09 ` Jagan Teki
2020-04-28 19:09 ` Jagan Teki
[not found] ` <CAMty3ZC+DiW2gGjN3rWcrwHPXZfxuGhjJN-1caUXW-Ry7VNR+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-04-27 17:19 ` Robin Murphy [this message]
2020-04-27 17:19 ` Robin Murphy
[not found] ` <20200425110354.12381-6-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2020-04-25 23:51 ` [PATCH 5/8] pci: Add Rockchip PCIe controller driver【请注意，邮件由linux-rockchip-bounces+shawn.lin=rock-chips.com@lists.infradead.org代发】 Shawn Lin
2020-04-25 23:51 ` Shawn Lin
2020-04-28 19:39 ` Jagan Teki
2020-04-28 19:39 ` Jagan Teki
2020-04-28 9:53 ` [PATCH 5/8] pci: Add Rockchip PCIe controller driver Kever Yang
2020-04-28 9:53 ` Kever Yang
2020-04-25 11:03 ` [PATCH 6/8] pci: Add Rockchip PCIe PHY " Jagan Teki
2020-04-25 11:03 ` Jagan Teki
2020-04-25 11:03 ` [PATCH 7/8] rockchip: Enable PCIe/M.2 on rk3399 board w/ M.2 Jagan Teki
2020-04-25 11:03 ` Jagan Teki
2020-04-25 11:03 ` [PATCH 8/8] rockchip: Enable PCIe/M.2 on rock960 board Jagan Teki
2020-04-25 11:03 ` Jagan Teki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9c00b50f-cf17-9c4e-4c75-b6e85668f9a2@arm.com \
--to=robin.murphy-5wv7dgnigg8@public.gmane.org \
--cc=jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org \
--cc=kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org \
--cc=linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org \
--cc=linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=mark.kettenis-qWit8jRvyhVmR6Xm/wNWPw@public.gmane.org \
--cc=patrick-Er2xLVyhcs+zQB+pC5nmwQ@public.gmane.org \
--cc=philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org \
--cc=sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org \
--cc=sunil-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org \
--cc=u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.