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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Swapnil Jakhade <sjakhade@cadence.com>, <vkoul@kernel.org>,
	<p.zabel@pengutronix.de>, <linux-phy@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: <mparab@cadence.com>, <lokeshvutla@ti.com>
Subject: Re: [PATCH 09/14] phy: cadence-torrent: Add separate functions for reusable code
Date: Thu, 13 May 2021 12:30:38 +0530	[thread overview]
Message-ID: <9d234a02-d1f4-ab09-56e0-81676ef1bf21@ti.com> (raw)
In-Reply-To: <1617946456-27773-10-git-send-email-sjakhade@cadence.com>



On 09/04/21 11:04 am, Swapnil Jakhade wrote:
> Torrent PHY driver currently supports single link DP configuration.
> Prepare driver to support multilink DP configurations by adding
> separate functions for common initialization sequence.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>

Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  drivers/phy/cadence/phy-cadence-torrent.c | 53 +++++++++++++++--------
>  1 file changed, 35 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
> index 69466481af26..e4dd8d1711a6 100644
> --- a/drivers/phy/cadence/phy-cadence-torrent.c
> +++ b/drivers/phy/cadence/phy-cadence-torrent.c
> @@ -1472,24 +1472,11 @@ static int cdns_torrent_phy_off(struct phy *phy)
>  	return reset_control_assert(inst->lnk_rst);
>  }
>  
> -static int cdns_torrent_dp_init(struct phy *phy)
> +static void cdns_torrent_dp_common_init(struct cdns_torrent_phy *cdns_phy,
> +					struct cdns_torrent_inst *inst)
>  {
> -	unsigned char lane_bits;
> -	int ret;
> -	struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
> -	struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
>  	struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
> -
> -	switch (cdns_phy->ref_clk_rate) {
> -	case CLK_19_2_MHZ:
> -	case CLK_25_MHZ:
> -	case CLK_100_MHZ:
> -		/* Valid Ref Clock Rate */
> -		break;
> -	default:
> -		dev_err(cdns_phy->dev, "Unsupported Ref Clock Rate\n");
> -		return -EINVAL;
> -	}
> +	unsigned char lane_bits;
>  
>  	cdns_torrent_dp_write(regmap, PHY_AUX_CTRL, 0x0003); /* enable AUX */
>  
> @@ -1510,8 +1497,10 @@ static int cdns_torrent_dp_init(struct phy *phy)
>  	/* release pma_xcvr_pllclk_en_ln_*, only for the master lane */
>  	cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, 0x0001);
>  
> -	/* PHY PMA registers configuration functions */
> -	/* Initialize PHY with max supported link rate, without SSC. */
> +	/*
> +	 * PHY PMA registers configuration functions
> +	 * Initialize PHY with max supported link rate, without SSC.
> +	 */
>  	if (cdns_phy->ref_clk_rate == CLK_19_2_MHZ)
>  		cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz(cdns_phy,
>  							cdns_phy->max_bit_rate,
> @@ -1530,6 +1519,13 @@ static int cdns_torrent_dp_init(struct phy *phy)
>  
>  	/* take out of reset */
>  	regmap_field_write(cdns_phy->phy_reset_ctrl, 0x1);
> +}
> +
> +static int cdns_torrent_dp_start(struct cdns_torrent_phy *cdns_phy,
> +				 struct cdns_torrent_inst *inst,
> +				 struct phy *phy)
> +{
> +	int ret;
>  
>  	cdns_torrent_phy_on(phy);
>  
> @@ -1542,6 +1538,27 @@ static int cdns_torrent_dp_init(struct phy *phy)
>  	return ret;
>  }
>  
> +static int cdns_torrent_dp_init(struct phy *phy)
> +{
> +	struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
> +	struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
> +
> +	switch (cdns_phy->ref_clk_rate) {
> +	case CLK_19_2_MHZ:
> +	case CLK_25_MHZ:
> +	case CLK_100_MHZ:
> +		/* Valid Ref Clock Rate */
> +		break;
> +	default:
> +		dev_err(cdns_phy->dev, "Unsupported Ref Clock Rate\n");
> +		return -EINVAL;
> +	}
> +
> +	cdns_torrent_dp_common_init(cdns_phy, inst);
> +
> +	return cdns_torrent_dp_start(cdns_phy, inst, phy);
> +}
> +
>  static int cdns_torrent_derived_refclk_enable(struct clk_hw *hw)
>  {
>  	struct cdns_torrent_derived_refclk *derived_refclk = to_cdns_torrent_derived_refclk(hw);
> 

WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Swapnil Jakhade <sjakhade@cadence.com>, <vkoul@kernel.org>,
	<p.zabel@pengutronix.de>, <linux-phy@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: <mparab@cadence.com>, <lokeshvutla@ti.com>
Subject: Re: [PATCH 09/14] phy: cadence-torrent: Add separate functions for reusable code
Date: Thu, 13 May 2021 12:30:38 +0530	[thread overview]
Message-ID: <9d234a02-d1f4-ab09-56e0-81676ef1bf21@ti.com> (raw)
In-Reply-To: <1617946456-27773-10-git-send-email-sjakhade@cadence.com>



On 09/04/21 11:04 am, Swapnil Jakhade wrote:
> Torrent PHY driver currently supports single link DP configuration.
> Prepare driver to support multilink DP configurations by adding
> separate functions for common initialization sequence.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>

Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  drivers/phy/cadence/phy-cadence-torrent.c | 53 +++++++++++++++--------
>  1 file changed, 35 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
> index 69466481af26..e4dd8d1711a6 100644
> --- a/drivers/phy/cadence/phy-cadence-torrent.c
> +++ b/drivers/phy/cadence/phy-cadence-torrent.c
> @@ -1472,24 +1472,11 @@ static int cdns_torrent_phy_off(struct phy *phy)
>  	return reset_control_assert(inst->lnk_rst);
>  }
>  
> -static int cdns_torrent_dp_init(struct phy *phy)
> +static void cdns_torrent_dp_common_init(struct cdns_torrent_phy *cdns_phy,
> +					struct cdns_torrent_inst *inst)
>  {
> -	unsigned char lane_bits;
> -	int ret;
> -	struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
> -	struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
>  	struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
> -
> -	switch (cdns_phy->ref_clk_rate) {
> -	case CLK_19_2_MHZ:
> -	case CLK_25_MHZ:
> -	case CLK_100_MHZ:
> -		/* Valid Ref Clock Rate */
> -		break;
> -	default:
> -		dev_err(cdns_phy->dev, "Unsupported Ref Clock Rate\n");
> -		return -EINVAL;
> -	}
> +	unsigned char lane_bits;
>  
>  	cdns_torrent_dp_write(regmap, PHY_AUX_CTRL, 0x0003); /* enable AUX */
>  
> @@ -1510,8 +1497,10 @@ static int cdns_torrent_dp_init(struct phy *phy)
>  	/* release pma_xcvr_pllclk_en_ln_*, only for the master lane */
>  	cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, 0x0001);
>  
> -	/* PHY PMA registers configuration functions */
> -	/* Initialize PHY with max supported link rate, without SSC. */
> +	/*
> +	 * PHY PMA registers configuration functions
> +	 * Initialize PHY with max supported link rate, without SSC.
> +	 */
>  	if (cdns_phy->ref_clk_rate == CLK_19_2_MHZ)
>  		cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz(cdns_phy,
>  							cdns_phy->max_bit_rate,
> @@ -1530,6 +1519,13 @@ static int cdns_torrent_dp_init(struct phy *phy)
>  
>  	/* take out of reset */
>  	regmap_field_write(cdns_phy->phy_reset_ctrl, 0x1);
> +}
> +
> +static int cdns_torrent_dp_start(struct cdns_torrent_phy *cdns_phy,
> +				 struct cdns_torrent_inst *inst,
> +				 struct phy *phy)
> +{
> +	int ret;
>  
>  	cdns_torrent_phy_on(phy);
>  
> @@ -1542,6 +1538,27 @@ static int cdns_torrent_dp_init(struct phy *phy)
>  	return ret;
>  }
>  
> +static int cdns_torrent_dp_init(struct phy *phy)
> +{
> +	struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
> +	struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
> +
> +	switch (cdns_phy->ref_clk_rate) {
> +	case CLK_19_2_MHZ:
> +	case CLK_25_MHZ:
> +	case CLK_100_MHZ:
> +		/* Valid Ref Clock Rate */
> +		break;
> +	default:
> +		dev_err(cdns_phy->dev, "Unsupported Ref Clock Rate\n");
> +		return -EINVAL;
> +	}
> +
> +	cdns_torrent_dp_common_init(cdns_phy, inst);
> +
> +	return cdns_torrent_dp_start(cdns_phy, inst, phy);
> +}
> +
>  static int cdns_torrent_derived_refclk_enable(struct clk_hw *hw)
>  {
>  	struct cdns_torrent_derived_refclk *derived_refclk = to_cdns_torrent_derived_refclk(hw);
> 

-- 
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2021-05-13  7:01 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-09  5:34 [PATCH 00/14] PHY: Add multilink DP support in Cadence Torrent PHY driver Swapnil Jakhade
2021-04-09  5:34 ` Swapnil Jakhade
2021-04-09  5:34 ` [PATCH 01/14] phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  6:35   ` Kishon Vijay Abraham I
2021-05-13  6:35     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 02/14] phy: cadence-torrent: Reorder few functions to remove function declarations Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  6:37   ` Kishon Vijay Abraham I
2021-05-13  6:37     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 03/14] phy: cadence-torrent: Add enum to support different input reference clocks Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  6:43   ` Kishon Vijay Abraham I
2021-05-13  6:43     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 04/14] phy: cadence-torrent: Select register configuration based on PHY reference clock Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  6:48   ` Kishon Vijay Abraham I
2021-05-13  6:48     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 05/14] phy: cadence-torrent: Add PHY registers for DP in array format Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  6:52   ` Kishon Vijay Abraham I
2021-05-13  6:52     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 06/14] phy: cadence-torrent: Reorder functions to avoid function declarations Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-04-09  5:34 ` [PATCH 07/14] " Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-04-09  5:34 ` [PATCH 08/14] phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  6:59   ` Kishon Vijay Abraham I
2021-05-13  6:59     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 09/14] phy: cadence-torrent: Add separate functions for reusable code Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  7:00   ` Kishon Vijay Abraham I [this message]
2021-05-13  7:00     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 10/14] phy: cadence-torrent: Add function to get PLL to be configured for DP Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  7:12   ` Kishon Vijay Abraham I
2021-05-13  7:12     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 11/14] phy: cadence-torrent: Add multilink DP support Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  7:44   ` Kishon Vijay Abraham I
2021-05-13  7:44     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 12/14] phy: cadence-torrent: Add PCIe + DP multilink configuration Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  7:47   ` Kishon Vijay Abraham I
2021-05-13  7:47     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 13/14] phy: cadence-torrent: Add debug information for PHY configuration Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  7:54   ` Kishon Vijay Abraham I
2021-05-13  7:54     ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 14/14] phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation Swapnil Jakhade
2021-04-09  5:34   ` Swapnil Jakhade
2021-05-13  7:55   ` Kishon Vijay Abraham I
2021-05-13  7:55     ` Kishon Vijay Abraham I

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