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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Alexander Stein" <alexander.stein@ew.tq-group.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Olof Johansson" <olof@lixom.net>,
	"Shawn Guo" <shawnguo@kernel.org>, "Li Yang" <leoyang.li@nxp.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Marek Vasut" <marex@denx.de>,
	"Marcel Ziswiler" <marcel.ziswiler@toradex.com>
Cc: soc@kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 9/9] [DNI] ARM: multi_v7_defconfig: Enable CONFIG_ARM_LPAE for multi_v7_config
Date: Thu, 19 Jan 2023 17:07:30 +0100	[thread overview]
Message-ID: <9e2aa58c-10dc-49d0-a492-4d724cf29c2b@app.fastmail.com> (raw)
In-Reply-To: <2617470.BddDVKsqQX@steina-w>

On Thu, Jan 19, 2023, at 16:27, Alexander Stein wrote:
> Am Donnerstag, 19. Januar 2023, 16:09:05 CET schrieb Arnd Bergmann:
>> On Thu, Jan 19, 2023, at 15:42, Alexander Stein wrote:
>> > This is necessary to support PCIe on LS1021A.
>> > 
>> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
>> 
>> Can you explain why this is actually required? I can see that the
>> ranges in the PCIe device point to a high address (0x4000000000,
>> 2^40), but I can't tell if this is hardwired in the SoC or a
>> setting that is applied by software (either the bootloader or
>> the PCIe driver).
>
> The RM ([1]) memory map (Table 2-1) says that 'PCI Express 1' is located at 
> '400000_0000', 'PCI Express 2' at '480000_0000', so I assume this is hardcoded 
> in SoC.
> It also explicitly lists in that table PCIe 1&2 is only accessible with 40-bit 
> addressing.
>
>> If you can reprogram the memory map, I would expect this to fit
>> easily into the 32-bit address space, with 1GB for DDR3 memory
>> and 1GB for PCIe BARs.
>
> I'm not sure which part of memory map you can reprogram and where, but I guess 
> this is fixed on this SoC.

Ok, I see it now. It looks like they fell victim to the 
cursed "Principles of ARM® Memory Maps White Paper"
document and messed it up even further ;-)

In particular, it seems that the memory map of the PCI address
spaces is configurable, but only within that area you listed.
I see that section "28.4.2 PEX register descriptions" does list
a 64-bit prefetchable address space in addition to the 32-bit
non-prefetchable memory space, but the 64-bit space is not
listed in the DT. It would be a good idea to configure that
as well in order for devices to work that need a larger BAR,
such as a GPU, but it wouldn't help with fitting the PCIe
into non-LPAE 32-bit CPU address space.

In the datasheet I also see that the chip theoretically
supports 8GB of DDR4, which would definitely put it beyond
the highmem limit, even with the 4G:4G memory split. Do you
know if there are ls1021a devices with more than 4GB of
installed memory?

    Arnd

WARNING: multiple messages have this Message-ID (diff)
From: "Arnd Bergmann" <arnd@arndb.de>
To: "Alexander Stein" <alexander.stein@ew.tq-group.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Olof Johansson" <olof@lixom.net>,
	"Shawn Guo" <shawnguo@kernel.org>, "Li Yang" <leoyang.li@nxp.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Marek Vasut" <marex@denx.de>,
	"Marcel Ziswiler" <marcel.ziswiler@toradex.com>
Cc: soc@kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 9/9] [DNI] ARM: multi_v7_defconfig: Enable CONFIG_ARM_LPAE for multi_v7_config
Date: Thu, 19 Jan 2023 17:07:30 +0100	[thread overview]
Message-ID: <9e2aa58c-10dc-49d0-a492-4d724cf29c2b@app.fastmail.com> (raw)
In-Reply-To: <2617470.BddDVKsqQX@steina-w>

On Thu, Jan 19, 2023, at 16:27, Alexander Stein wrote:
> Am Donnerstag, 19. Januar 2023, 16:09:05 CET schrieb Arnd Bergmann:
>> On Thu, Jan 19, 2023, at 15:42, Alexander Stein wrote:
>> > This is necessary to support PCIe on LS1021A.
>> > 
>> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
>> 
>> Can you explain why this is actually required? I can see that the
>> ranges in the PCIe device point to a high address (0x4000000000,
>> 2^40), but I can't tell if this is hardwired in the SoC or a
>> setting that is applied by software (either the bootloader or
>> the PCIe driver).
>
> The RM ([1]) memory map (Table 2-1) says that 'PCI Express 1' is located at 
> '400000_0000', 'PCI Express 2' at '480000_0000', so I assume this is hardcoded 
> in SoC.
> It also explicitly lists in that table PCIe 1&2 is only accessible with 40-bit 
> addressing.
>
>> If you can reprogram the memory map, I would expect this to fit
>> easily into the 32-bit address space, with 1GB for DDR3 memory
>> and 1GB for PCIe BARs.
>
> I'm not sure which part of memory map you can reprogram and where, but I guess 
> this is fixed on this SoC.

Ok, I see it now. It looks like they fell victim to the 
cursed "Principles of ARM® Memory Maps White Paper"
document and messed it up even further ;-)

In particular, it seems that the memory map of the PCI address
spaces is configurable, but only within that area you listed.
I see that section "28.4.2 PEX register descriptions" does list
a 64-bit prefetchable address space in addition to the 32-bit
non-prefetchable memory space, but the 64-bit space is not
listed in the DT. It would be a good idea to configure that
as well in order for devices to work that need a larger BAR,
such as a GPU, but it wouldn't help with fitting the PCIe
into non-LPAE 32-bit CPU address space.

In the datasheet I also see that the chip theoretically
supports 8GB of DDR4, which would definitely put it beyond
the highmem limit, even with the 4G:4G memory split. Do you
know if there are ls1021a devices with more than 4GB of
installed memory?

    Arnd

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  reply	other threads:[~2023-01-19 16:07 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-19 14:42 [PATCH 0/9] TQMLS1021A support Alexander Stein
2023-01-19 14:42 ` Alexander Stein
2023-01-19 14:42 ` [PATCH 1/9] dt-bindings: arm: fsl: add TQ-Systems LS1021A board Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 16:59   ` Krzysztof Kozlowski
2023-01-19 16:59     ` Krzysztof Kozlowski
2023-01-20  8:58     ` Alexander Stein
2023-01-20  8:58       ` Alexander Stein
2023-01-20  9:07       ` Krzysztof Kozlowski
2023-01-20  9:07         ` Krzysztof Kozlowski
2023-01-19 14:42 ` [PATCH 2/9] ARM: dts: ls1021a: add TQ-Systems MBLS102xA device tree Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 17:03   ` Krzysztof Kozlowski
2023-01-19 17:03     ` Krzysztof Kozlowski
2023-01-20 10:08     ` Alexander Stein
2023-01-20 10:08       ` Alexander Stein
2023-01-20 10:21       ` Krzysztof Kozlowski
2023-01-20 10:21         ` Krzysztof Kozlowski
2023-01-19 14:42 ` [PATCH 3/9] ARM: dts: ls1021a: add TQMLS1021A flash partition layout Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 14:42 ` [PATCH 4/9] ARM: dts: ls1021a: add TQMLS1021A/MBLS102xA LVDS TM070JVHG33 overlay Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 14:42 ` [PATCH 5/9] ARM: dts: ls1021a: add TQMLS1021A/MBLS102xA HDMI overlay Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 14:42 ` [PATCH 6/9] ARM: dts: ls1021a: add TQMLS1021A/MBLS102xA LVDS CDTECH DC44 overlay Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 14:42 ` [PATCH 7/9] ARM: dts: ls1021a: add TQMLS1021A/MBLS102xA LVDS CDTECH FC21 overlay Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 14:42 ` [PATCH 8/9] ARM: multi_v7_defconfig: Add options to support TQMLS102xA series Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 17:04   ` Krzysztof Kozlowski
2023-01-19 17:04     ` Krzysztof Kozlowski
2023-01-20 11:12     ` Alexander Stein
2023-01-20 11:12       ` Alexander Stein
2023-01-20 11:35       ` Krzysztof Kozlowski
2023-01-20 11:35         ` Krzysztof Kozlowski
2023-01-20 14:57         ` Russell King (Oracle)
2023-01-20 14:57           ` Russell King (Oracle)
2023-01-21 20:27           ` Krzysztof Kozlowski
2023-01-21 20:27             ` Krzysztof Kozlowski
2023-01-21 22:33             ` Russell King (Oracle)
2023-01-21 22:33               ` Russell King (Oracle)
2023-01-19 14:42 ` [PATCH 9/9] [DNI] ARM: multi_v7_defconfig: Enable CONFIG_ARM_LPAE for multi_v7_config Alexander Stein
2023-01-19 14:42   ` Alexander Stein
2023-01-19 15:09   ` Arnd Bergmann
2023-01-19 15:09     ` Arnd Bergmann
2023-01-19 15:27     ` Alexander Stein
2023-01-19 15:27       ` Alexander Stein
2023-01-19 16:07       ` Arnd Bergmann [this message]
2023-01-19 16:07         ` Arnd Bergmann
2023-01-20 12:43         ` Alexander Stein
2023-01-20 12:43           ` Alexander Stein
2023-01-20 14:00           ` Arnd Bergmann
2023-01-20 14:00             ` Arnd Bergmann
2023-01-24 10:30             ` Alexander Stein
2023-01-24 10:30               ` Alexander Stein
2023-01-24 11:37               ` Arnd Bergmann
2023-01-24 11:37                 ` Arnd Bergmann
2023-01-19 16:00   ` Russell King (Oracle)
2023-01-19 16:00     ` Russell King (Oracle)

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