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From: "Tian, Kevin" <kevin.tian@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>, Paolo Bonzini <pbonzini@redhat.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
	"airlied@linux.ie" <airlied@linux.ie>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"Chen, Tiejun" <tiejun.chen@intel.com>,
	"Kay, Allen M" <allen.m.kay@intel.com>
Subject: RE: [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type
Date: Thu, 10 Jul 2014 21:08:24 +0000	[thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D125FCA7FF@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <20140707184006.GU5821@phenom.ffwll.local>

> From: Daniel Vetter
> Sent: Monday, July 07, 2014 11:40 AM
> 
> On Mon, Jul 07, 2014 at 07:58:30PM +0200, Paolo Bonzini wrote:
> > Il 07/07/2014 19:54, Daniel Vetter ha scritto:
> > >On Mon, Jul 07, 2014 at 04:57:45PM +0200, Paolo Bonzini wrote:
> > >>Il 07/07/2014 16:49, Daniel Vetter ha scritto:
> > >>>So the correct fix to forward intel gpus to guests is indeed to somehow
> > >>>fake the pch pci ids since the driver really needs them. Gross design, but
> > >>>that's how the hardware works.
> > >>
> > >>A way that could work for virtualization is this: if you find the card has a
> > >>magic subsystem vendor id, fetch the subsystem device id and use _that_
> as
> > >>the PCH device id.
> > >>
> > >>Would that work for you?
> > >
> > >I guess for quemu it also depends upon what windows does since we can't
> > >change that. If we care about that part. Another consideration is
> > >supporting older kernels, if that's possible at all.
> >
> > Yes, but right now it's more important to get something that's not too gross
> > for the future, for both Linux and Windows.  Hacks for existing guests can
> > be done separately, especially since they might differ between Linux (check
> > ISA bridge) and Windows (check 1f.0).
> 
> Well old Linux also checked 1f.0, so kinda the same really. As long as
> 1f.0 is an isa bridge. Wrt Windows I don't really expect them to change
> this (they're probably more focuesed on the windows hypervisor or whatever).

discussion is also on-going with Windows driver folks. Add Allen here.

> 
> In the end if the approach is ok for quemu and isn't much worse than what
> we currently have I don't mind at all about the i915.ko code. I just want
> to avoid flip-flopping around on the hack du jour like we seem to do just
> now.
> -Daniel

actually I'm curious whether it's still necessary to __detect__ PCH. Could
we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard
code the knowledge:

              } else if (IS_BROADWELL(dev)) {
                      dev_priv->pch_type = PCH_LPT;
                      dev_priv->pch_id =
                              INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
                      DRM_DEBUG_KMS("This is Broadwell, assuming "
                                    "LynxPoint LP PCH\n");

Or if there is real usage on non-fixed mapping (not majority), could it be a 
better option to have fixed mapping as a fallback instead of leaving as 
PCH_NONE? Then even when Qemu doesn't provide a special tweaked PCH,
the majority case just works.

Thanks
Kevin

WARNING: multiple messages have this Message-ID (diff)
From: "Tian, Kevin" <kevin.tian@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>, Paolo Bonzini <pbonzini@redhat.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
	"airlied@linux.ie" <airlied@linux.ie>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Kay, Allen M" <allen.m.kay@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"Chen, Tiejun" <tiejun.chen@intel.com>
Subject: Re: [Qemu-devel] [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type
Date: Thu, 10 Jul 2014 21:08:24 +0000	[thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D125FCA7FF@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <20140707184006.GU5821@phenom.ffwll.local>

> From: Daniel Vetter
> Sent: Monday, July 07, 2014 11:40 AM
> 
> On Mon, Jul 07, 2014 at 07:58:30PM +0200, Paolo Bonzini wrote:
> > Il 07/07/2014 19:54, Daniel Vetter ha scritto:
> > >On Mon, Jul 07, 2014 at 04:57:45PM +0200, Paolo Bonzini wrote:
> > >>Il 07/07/2014 16:49, Daniel Vetter ha scritto:
> > >>>So the correct fix to forward intel gpus to guests is indeed to somehow
> > >>>fake the pch pci ids since the driver really needs them. Gross design, but
> > >>>that's how the hardware works.
> > >>
> > >>A way that could work for virtualization is this: if you find the card has a
> > >>magic subsystem vendor id, fetch the subsystem device id and use _that_
> as
> > >>the PCH device id.
> > >>
> > >>Would that work for you?
> > >
> > >I guess for quemu it also depends upon what windows does since we can't
> > >change that. If we care about that part. Another consideration is
> > >supporting older kernels, if that's possible at all.
> >
> > Yes, but right now it's more important to get something that's not too gross
> > for the future, for both Linux and Windows.  Hacks for existing guests can
> > be done separately, especially since they might differ between Linux (check
> > ISA bridge) and Windows (check 1f.0).
> 
> Well old Linux also checked 1f.0, so kinda the same really. As long as
> 1f.0 is an isa bridge. Wrt Windows I don't really expect them to change
> this (they're probably more focuesed on the windows hypervisor or whatever).

discussion is also on-going with Windows driver folks. Add Allen here.

> 
> In the end if the approach is ok for quemu and isn't much worse than what
> we currently have I don't mind at all about the i915.ko code. I just want
> to avoid flip-flopping around on the hack du jour like we seem to do just
> now.
> -Daniel

actually I'm curious whether it's still necessary to __detect__ PCH. Could
we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard
code the knowledge:

              } else if (IS_BROADWELL(dev)) {
                      dev_priv->pch_type = PCH_LPT;
                      dev_priv->pch_id =
                              INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
                      DRM_DEBUG_KMS("This is Broadwell, assuming "
                                    "LynxPoint LP PCH\n");

Or if there is real usage on non-fixed mapping (not majority), could it be a 
better option to have fixed mapping as a fallback instead of leaving as 
PCH_NONE? Then even when Qemu doesn't provide a special tweaked PCH,
the majority case just works.

Thanks
Kevin

WARNING: multiple messages have this Message-ID (diff)
From: "Tian, Kevin" <kevin.tian@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>, Paolo Bonzini <pbonzini@redhat.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
	"airlied@linux.ie" <airlied@linux.ie>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"Chen, Tiejun" <tiejun.chen@intel.com>
Subject: Re: [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type
Date: Thu, 10 Jul 2014 21:08:24 +0000	[thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D125FCA7FF@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <20140707184006.GU5821@phenom.ffwll.local>

> From: Daniel Vetter
> Sent: Monday, July 07, 2014 11:40 AM
> 
> On Mon, Jul 07, 2014 at 07:58:30PM +0200, Paolo Bonzini wrote:
> > Il 07/07/2014 19:54, Daniel Vetter ha scritto:
> > >On Mon, Jul 07, 2014 at 04:57:45PM +0200, Paolo Bonzini wrote:
> > >>Il 07/07/2014 16:49, Daniel Vetter ha scritto:
> > >>>So the correct fix to forward intel gpus to guests is indeed to somehow
> > >>>fake the pch pci ids since the driver really needs them. Gross design, but
> > >>>that's how the hardware works.
> > >>
> > >>A way that could work for virtualization is this: if you find the card has a
> > >>magic subsystem vendor id, fetch the subsystem device id and use _that_
> as
> > >>the PCH device id.
> > >>
> > >>Would that work for you?
> > >
> > >I guess for quemu it also depends upon what windows does since we can't
> > >change that. If we care about that part. Another consideration is
> > >supporting older kernels, if that's possible at all.
> >
> > Yes, but right now it's more important to get something that's not too gross
> > for the future, for both Linux and Windows.  Hacks for existing guests can
> > be done separately, especially since they might differ between Linux (check
> > ISA bridge) and Windows (check 1f.0).
> 
> Well old Linux also checked 1f.0, so kinda the same really. As long as
> 1f.0 is an isa bridge. Wrt Windows I don't really expect them to change
> this (they're probably more focuesed on the windows hypervisor or whatever).

discussion is also on-going with Windows driver folks. Add Allen here.

> 
> In the end if the approach is ok for quemu and isn't much worse than what
> we currently have I don't mind at all about the i915.ko code. I just want
> to avoid flip-flopping around on the hack du jour like we seem to do just
> now.
> -Daniel

actually I'm curious whether it's still necessary to __detect__ PCH. Could
we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard
code the knowledge:

              } else if (IS_BROADWELL(dev)) {
                      dev_priv->pch_type = PCH_LPT;
                      dev_priv->pch_id =
                              INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
                      DRM_DEBUG_KMS("This is Broadwell, assuming "
                                    "LynxPoint LP PCH\n");

Or if there is real usage on non-fixed mapping (not majority), could it be a 
better option to have fixed mapping as a fallback instead of leaving as 
PCH_NONE? Then even when Qemu doesn't provide a special tweaked PCH,
the majority case just works.

Thanks
Kevin

  reply	other threads:[~2014-07-10 21:09 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-19  9:53 [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type Tiejun Chen
2014-06-19  9:53 ` Tiejun Chen
2014-06-19  9:53 ` [Qemu-devel] " Tiejun Chen
2014-06-20  9:40 ` Chen, Tiejun
2014-06-20  9:40   ` Chen, Tiejun
2014-06-20  9:40   ` [Qemu-devel] " Chen, Tiejun
2014-06-20 12:32   ` Daniel Vetter
2014-06-20 12:32     ` Daniel Vetter
2014-06-20 12:32     ` [Qemu-devel] " Daniel Vetter
2014-06-22  8:00     ` Chen, Tiejun
2014-06-22  8:00       ` Chen, Tiejun
2014-06-22  8:00       ` [Qemu-devel] " Chen, Tiejun
2014-06-20 12:48 ` Paolo Bonzini
2014-06-20 12:48   ` [Qemu-devel] " Paolo Bonzini
2014-06-22  8:25   ` Chen, Tiejun
2014-06-22  8:25     ` [Qemu-devel] " Chen, Tiejun
2014-06-25  6:48     ` Paolo Bonzini
2014-06-25  6:48       ` [Qemu-devel] " Paolo Bonzini
2014-06-25  7:34       ` Chen, Tiejun
2014-06-25  7:34         ` [Qemu-devel] " Chen, Tiejun
2014-06-25  7:55         ` Paolo Bonzini
2014-06-25  7:55           ` [Qemu-devel] " Paolo Bonzini
2014-06-30  3:13           ` Chen, Tiejun
2014-06-30  3:13             ` [Qemu-devel] " Chen, Tiejun
2014-06-30 10:56             ` Paolo Bonzini
2014-06-30 10:56               ` [Qemu-devel] " Paolo Bonzini
2014-07-07 14:49       ` Daniel Vetter
2014-07-07 14:49         ` Daniel Vetter
2014-07-07 14:49         ` [Qemu-devel] " Daniel Vetter
2014-07-07 14:57         ` Paolo Bonzini
2014-07-07 14:57           ` [Qemu-devel] " Paolo Bonzini
2014-07-07 17:54           ` [Intel-gfx] " Daniel Vetter
2014-07-07 17:54             ` Daniel Vetter
2014-07-07 17:54             ` [Qemu-devel] " Daniel Vetter
2014-07-07 17:58             ` Paolo Bonzini
2014-07-07 17:58               ` [Qemu-devel] " Paolo Bonzini
2014-07-07 18:40               ` Daniel Vetter
2014-07-07 18:40                 ` Daniel Vetter
2014-07-07 18:40                 ` [Qemu-devel] [Intel-gfx] " Daniel Vetter
2014-07-10 21:08                 ` Tian, Kevin [this message]
2014-07-10 21:08                   ` Tian, Kevin
2014-07-10 21:08                   ` [Qemu-devel] [Intel-gfx] " Tian, Kevin
2014-07-11  6:29                   ` Daniel Vetter
2014-07-11  6:29                     ` Daniel Vetter
2014-07-11  6:29                     ` [Qemu-devel] " Daniel Vetter
2014-07-11 19:42                     ` [Xen-devel] " Konrad Rzeszutek Wilk
2014-07-11 19:42                       ` [Xen-devel] " Konrad Rzeszutek Wilk
2014-07-11 19:42                       ` [Qemu-devel] [Xen-devel] [Intel-gfx] " Konrad Rzeszutek Wilk
2014-07-11 20:30                       ` Tian, Kevin
2014-07-11 20:30                         ` [Xen-devel] " Tian, Kevin
2014-07-11 20:30                         ` [Qemu-devel] [Xen-devel] [Intel-gfx] " Tian, Kevin
2014-07-12 10:13                         ` [Intel-gfx] [Xen-devel] " Daniel Vetter
2014-07-12 10:13                           ` Daniel Vetter
2014-07-12 10:13                           ` [Qemu-devel] [Intel-gfx] " Daniel Vetter
2014-06-24  2:59 ` [Intel-gfx] " Zhenyu Wang
2014-06-24  2:59   ` Zhenyu Wang
2014-06-24  2:59   ` [Qemu-devel] [Intel-gfx] " Zhenyu Wang
2014-06-25  2:28   ` Chen, Tiejun
2014-06-25  2:28     ` Chen, Tiejun
2014-06-25  2:28     ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun
2014-07-07 14:51     ` Daniel Vetter
2014-07-07 14:51       ` Daniel Vetter
2014-07-07 14:51       ` [Qemu-devel] " Daniel Vetter
2014-06-30 11:18 ` Michael S. Tsirkin
2014-06-30 11:18   ` Michael S. Tsirkin
2014-06-30 11:18   ` [Qemu-devel] " Michael S. Tsirkin
2014-07-01  1:52   ` Chen, Tiejun
2014-07-01  1:52     ` Chen, Tiejun
2014-07-01  1:52     ` [Qemu-devel] " Chen, Tiejun
2014-07-02  6:21 ` Michael S. Tsirkin
2014-07-02  6:21   ` Michael S. Tsirkin
2014-07-02  6:21   ` [Qemu-devel] " Michael S. Tsirkin
2014-07-02  8:27   ` Chen, Tiejun
2014-07-02  8:27     ` Chen, Tiejun
2014-07-02  8:27     ` [Qemu-devel] " Chen, Tiejun

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