From: Blue Swirl <blauwirbel@gmail.com>
To: adnan@khaleel.us
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Single 64bit memory transaction instead of two 32bit memory transaction.
Date: Tue, 9 Nov 2010 17:57:28 +0000 [thread overview]
Message-ID: <AANLkTikrfKnEH+G4C8RYAtygMoouCtS+W9AJpbmAHu2k@mail.gmail.com> (raw)
In-Reply-To: <20101108232709.c98bf86f@shadowfax.no-ip.com>
On Mon, Nov 8, 2010 at 11:27 PM, Adnan Khaleel <adnan@khaleel.us> wrote:
> In the file exec.c:
>
> The memory Write/Read functions are declared as an array of 4 entries where
> the index values of 0,1,2 correspond to 8,16 and 32bit write and read
> functions respectively.
>
> CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];
> CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
>
> Is there any reason why we can't extend this to include 64bit writes and
> read by increasing the array size? This is because 64bit reads are currently
> handled as two separate 32bit reads for eg: sommu_template.h
>
> static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
> target_ulong addr,
> void *retaddr)
> {
> :
> res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
> res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr +
> 4) << 32;
> :
> return res;
> }
>
> I'm sure this is happening in other places as well. Is there a reason for
> this or could we arbitrarily increase this (within limits ofcourse)?
Legacy. Patches have been submitted to add 64 bit IO handlers. But
there have been other discussions to change the whole I/O interface.
next prev parent reply other threads:[~2010-11-09 17:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-08 23:27 [Qemu-devel] Single 64bit memory transaction instead of two 32bit memory transaction Adnan Khaleel
2010-11-09 17:57 ` Blue Swirl [this message]
2011-09-01 19:16 Adnan Khaleel
2011-09-03 1:53 ` Richard Henderson
2011-09-03 22:36 Adnan Khaleel
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