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* synchronized block of register writes
@ 2011-04-06 22:28 Peter Hsiang
  2011-04-06 22:48 ` Mark Brown
  0 siblings, 1 reply; 3+ messages in thread
From: Peter Hsiang @ 2011-04-06 22:28 UTC (permalink / raw)
  To: Mark Brown, Jaroslav Kysela, Takashi Iwai, Liam Girdwood,
	Dimitris Papastamos

Hi Mark and Everyone,

When a codec driver control handling function needs to write a group of registers without any other register of the same codec being written to in parallel by ALSA, what is the best way to do this under the snd-soc codec driver architecture?  In the current architecture, does the driver's control handling function execute serially with other ALSA automated activities?

For example, the codec has filter coefficient data registers in a secondary registers "segment"  i.e. a portion of the register map is banked, and the secondary bank is purely for coefficients and they do not require caching.  The coefficient registers share the same register numbers as those in the normal primary segment.  To write the coefficients, one would first write to a register bit to select the desired segment, and then switch back when done.  This means when writing the coefficients, I use the un-cached write.

Thanks in advance for your sound advice.

Peter

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: synchronized block of register writes
  2011-04-06 22:28 synchronized block of register writes Peter Hsiang
@ 2011-04-06 22:48 ` Mark Brown
  2011-04-07  0:01   ` Peter Hsiang
  0 siblings, 1 reply; 3+ messages in thread
From: Mark Brown @ 2011-04-06 22:48 UTC (permalink / raw)
  To: Peter Hsiang
  Cc: Dimitris Papastamos, alsa-devel, Lars-Peter Clausen,
	Takashi Iwai, Liam Girdwood

On Wed, Apr 06, 2011 at 03:28:10PM -0700, Peter Hsiang wrote:

> Hi Mark and Everyone,

Fix your mailer to word wrap at 80 columns, I've reflowed your text.

> When a codec driver control handling function needs to write a group
> of registers without any other register of the same codec being
> written to in parallel by ALSA, what is the best way to do this under
> the snd-soc codec driver architecture?  In the current architecture,
> does the driver's control handling function execute serially with
> other ALSA automated activities?

The framework should be taking care of locking for you in most
situations.  If you implement custom controls you will want to take the
CODEC mutex while applying changes from them (most of the existing
drivers are lax about this) and similarly for IRQs.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: synchronized block of register writes
  2011-04-06 22:48 ` Mark Brown
@ 2011-04-07  0:01   ` Peter Hsiang
  0 siblings, 0 replies; 3+ messages in thread
From: Peter Hsiang @ 2011-04-07  0:01 UTC (permalink / raw)
  To: Mark Brown
  Cc: Dimitris Papastamos, alsa-devel, Lars-Peter Clausen,
	Takashi Iwai, Liam, Girdwood

On Wed, Apr 06, Mark Brown wrote:
> On Wed, Apr 06, 2011 at 03:28:10PM -0700, Peter Hsiang wrote:
> 
> > Hi Mark and Everyone,
> 
> Fix your mailer to word wrap at 80 columns, I've reflowed your text.

Sorry about that.  The email client/server is too "smart."
It is already set to 80 columns.  Until I figure out a more 
permanent solution, I will add a [return] at the end of each line.
> 
> > When a codec driver control handling function needs to write a group
> > of registers without any other register of the same codec being
> > written to in parallel by ALSA, what is the best way to do this under
> > the snd-soc codec driver architecture?  In the current architecture,
> > does the driver's control handling function execute serially with
> > other ALSA automated activities?
> 
> The framework should be taking care of locking for you in most
> situations.  If you implement custom controls you will want to take the
> CODEC mutex while applying changes from them (most of the existing
> drivers are lax about this) and similarly for IRQs.

Ok thanks!

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2011-04-07  0:03 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2011-04-06 22:28 synchronized block of register writes Peter Hsiang
2011-04-06 22:48 ` Mark Brown
2011-04-07  0:01   ` Peter Hsiang

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