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From: "Deucher, Alexander" <Alexander.Deucher-5C7GfCeVMHo@public.gmane.org>
To: "Liu, Aaron" <Aaron.Liu-5C7GfCeVMHo@public.gmane.org>,
	"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw
Date: Thu, 6 Dec 2018 02:45:45 +0000	[thread overview]
Message-ID: <BN6PR12MB1809F17C96E262711D536C8BF7A90@BN6PR12MB1809.namprd12.prod.outlook.com> (raw)
In-Reply-To: <1544059612-3380-1-git-send-email-aaron.liu-5C7GfCeVMHo@public.gmane.org>


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Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>

________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Aaron Liu <aaron.liu-5C7GfCeVMHo@public.gmane.org>
Sent: Wednesday, December 5, 2018 8:26:52 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Liu, Aaron
Subject: [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw

For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
For Picasso && FP5 SOCKET board, we use picasso_rlc.bin

Judgment method:
PCO AM4: revision >= 0xC8 && revision <= 0xCF
         or revision >= 0xD8 && revision <= 0xDF
otherwise is PCO FP5

Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259
Signed-off-by: Aaron Liu <aaron.liu-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 94740ea..7556716 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -86,6 +86,7 @@ MODULE_FIRMWARE("amdgpu/picasso_me.bin");
 MODULE_FIRMWARE("amdgpu/picasso_mec.bin");
 MODULE_FIRMWARE("amdgpu/picasso_mec2.bin");
 MODULE_FIRMWARE("amdgpu/picasso_rlc.bin");
+MODULE_FIRMWARE("amdgpu/picasso_rlc_am4.bin");

 MODULE_FIRMWARE("amdgpu/raven2_ce.bin");
 MODULE_FIRMWARE("amdgpu/raven2_pfp.bin");
@@ -645,7 +646,20 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev)
         adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
         adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+       /*
+        * For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
+        * instead of picasso_rlc.bin.
+        * Judgment method:
+        * PCO AM4: revision >= 0xC8 && revision <= 0xCF
+        *          or revision >= 0xD8 && revision <= 0xDF
+        * otherwise is PCO FP5
+        */
+       if (!strcmp(chip_name, "picasso") &&
+               (((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) ||
+               ((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF))))
+               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc_am4.bin", chip_name);
+       else
+               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
         err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
         if (err)
                 goto out;
--
2.7.4

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      parent reply	other threads:[~2018-12-06  2:45 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06  1:26 [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw Aaron Liu
     [not found] ` <1544059612-3380-1-git-send-email-aaron.liu-5C7GfCeVMHo@public.gmane.org>
2018-12-06  2:13   ` Huang, Ray
2018-12-06  2:45   ` Deucher, Alexander [this message]

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