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* [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw
@ 2018-12-06  1:26 Aaron Liu
       [not found] ` <1544059612-3380-1-git-send-email-aaron.liu-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 3+ messages in thread
From: Aaron Liu @ 2018-12-06  1:26 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Aaron Liu

For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
For Picasso && FP5 SOCKET board, we use picasso_rlc.bin

Judgment method:
PCO AM4: revision >= 0xC8 && revision <= 0xCF
         or revision >= 0xD8 && revision <= 0xDF
otherwise is PCO FP5

Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 94740ea..7556716 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -86,6 +86,7 @@ MODULE_FIRMWARE("amdgpu/picasso_me.bin");
 MODULE_FIRMWARE("amdgpu/picasso_mec.bin");
 MODULE_FIRMWARE("amdgpu/picasso_mec2.bin");
 MODULE_FIRMWARE("amdgpu/picasso_rlc.bin");
+MODULE_FIRMWARE("amdgpu/picasso_rlc_am4.bin");
 
 MODULE_FIRMWARE("amdgpu/raven2_ce.bin");
 MODULE_FIRMWARE("amdgpu/raven2_pfp.bin");
@@ -645,7 +646,20 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev)
 	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
 	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
-	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+	/*
+	 * For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
+	 * instead of picasso_rlc.bin.
+	 * Judgment method:
+	 * PCO AM4: revision >= 0xC8 && revision <= 0xCF
+	 *          or revision >= 0xD8 && revision <= 0xDF
+	 * otherwise is PCO FP5
+	 */
+	if (!strcmp(chip_name, "picasso") &&
+		(((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) ||
+		((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF))))
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc_am4.bin", chip_name);
+	else
+		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
 	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
 	if (err)
 		goto out;
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* RE: [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw
       [not found] ` <1544059612-3380-1-git-send-email-aaron.liu-5C7GfCeVMHo@public.gmane.org>
@ 2018-12-06  2:13   ` Huang, Ray
  2018-12-06  2:45   ` Deucher, Alexander
  1 sibling, 0 replies; 3+ messages in thread
From: Huang, Ray @ 2018-12-06  2:13 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Liu, Aaron

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Aaron Liu
> Sent: Thursday, December 06, 2018 9:27 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Aaron <Aaron.Liu@amd.com>
> Subject: [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw
> 
> For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin For Picasso
> && FP5 SOCKET board, we use picasso_rlc.bin
> 
> Judgment method:
> PCO AM4: revision >= 0xC8 && revision <= 0xCF
>          or revision >= 0xD8 && revision <= 0xDF otherwise is PCO FP5
> 
> Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259
> Signed-off-by: Aaron Liu <aaron.liu@amd.com>

Reviewed-by: Huang Rui <ray.huang@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 94740ea..7556716 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -86,6 +86,7 @@ MODULE_FIRMWARE("amdgpu/picasso_me.bin");
>  MODULE_FIRMWARE("amdgpu/picasso_mec.bin");
>  MODULE_FIRMWARE("amdgpu/picasso_mec2.bin");
>  MODULE_FIRMWARE("amdgpu/picasso_rlc.bin");
> +MODULE_FIRMWARE("amdgpu/picasso_rlc_am4.bin");
> 
>  MODULE_FIRMWARE("amdgpu/raven2_ce.bin");
>  MODULE_FIRMWARE("amdgpu/raven2_pfp.bin");
> @@ -645,7 +646,20 @@ static int gfx_v9_0_init_microcode(struct
> amdgpu_device *adev)
>  	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr-
> >header.ucode_version);
>  	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr-
> >ucode_feature_version);
> 
> -	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin",
> chip_name);
> +	/*
> +	 * For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
> +	 * instead of picasso_rlc.bin.
> +	 * Judgment method:
> +	 * PCO AM4: revision >= 0xC8 && revision <= 0xCF
> +	 *          or revision >= 0xD8 && revision <= 0xDF
> +	 * otherwise is PCO FP5
> +	 */
> +	if (!strcmp(chip_name, "picasso") &&
> +		(((adev->pdev->revision >= 0xC8) && (adev->pdev->revision
> <= 0xCF)) ||
> +		((adev->pdev->revision >= 0xD8) && (adev->pdev->revision
> <= 0xDF))))
> +		snprintf(fw_name, sizeof(fw_name),
> "amdgpu/%s_rlc_am4.bin", chip_name);
> +	else
> +		snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin",
> chip_name);
>  	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
>  	if (err)
>  		goto out;
> --
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw
       [not found] ` <1544059612-3380-1-git-send-email-aaron.liu-5C7GfCeVMHo@public.gmane.org>
  2018-12-06  2:13   ` Huang, Ray
@ 2018-12-06  2:45   ` Deucher, Alexander
  1 sibling, 0 replies; 3+ messages in thread
From: Deucher, Alexander @ 2018-12-06  2:45 UTC (permalink / raw)
  To: Liu, Aaron, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW


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Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>

________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Aaron Liu <aaron.liu-5C7GfCeVMHo@public.gmane.org>
Sent: Wednesday, December 5, 2018 8:26:52 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Liu, Aaron
Subject: [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw

For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
For Picasso && FP5 SOCKET board, we use picasso_rlc.bin

Judgment method:
PCO AM4: revision >= 0xC8 && revision <= 0xCF
         or revision >= 0xD8 && revision <= 0xDF
otherwise is PCO FP5

Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259
Signed-off-by: Aaron Liu <aaron.liu-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 94740ea..7556716 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -86,6 +86,7 @@ MODULE_FIRMWARE("amdgpu/picasso_me.bin");
 MODULE_FIRMWARE("amdgpu/picasso_mec.bin");
 MODULE_FIRMWARE("amdgpu/picasso_mec2.bin");
 MODULE_FIRMWARE("amdgpu/picasso_rlc.bin");
+MODULE_FIRMWARE("amdgpu/picasso_rlc_am4.bin");

 MODULE_FIRMWARE("amdgpu/raven2_ce.bin");
 MODULE_FIRMWARE("amdgpu/raven2_pfp.bin");
@@ -645,7 +646,20 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev)
         adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
         adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+       /*
+        * For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
+        * instead of picasso_rlc.bin.
+        * Judgment method:
+        * PCO AM4: revision >= 0xC8 && revision <= 0xCF
+        *          or revision >= 0xD8 && revision <= 0xDF
+        * otherwise is PCO FP5
+        */
+       if (!strcmp(chip_name, "picasso") &&
+               (((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) ||
+               ((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF))))
+               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc_am4.bin", chip_name);
+       else
+               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
         err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
         if (err)
                 goto out;
--
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-12-06  2:45 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2018-12-06  1:26 [PATCH] drm/amdgpu: both support PCO FP5/AM4 rlc fw Aaron Liu
     [not found] ` <1544059612-3380-1-git-send-email-aaron.liu-5C7GfCeVMHo@public.gmane.org>
2018-12-06  2:13   ` Huang, Ray
2018-12-06  2:45   ` Deucher, Alexander

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