* [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440
@ 2021-01-06 1:05 Emily.Deng
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Emily.Deng @ 2021-01-06 1:05 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
Add one more 2k resolution which appears frequently in market.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index ffcc64ec6473..9810af712cc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -294,7 +294,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
static const struct mode_size {
int w;
int h;
- } common_modes[21] = {
+ } common_modes[] = {
{ 640, 480},
{ 720, 480},
{ 800, 600},
@@ -312,13 +312,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
{1600, 1200},
{1920, 1080},
{1920, 1200},
+ {2560, 1440},
{4096, 3112},
{3656, 2664},
{3840, 2160},
{4096, 2160},
};
- for (i = 0; i < 21; i++) {
+ for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
drm_mode_probed_add(connector, mode);
}
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-06 1:05 [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Emily.Deng
@ 2021-01-06 1:05 ` Emily.Deng
2021-01-06 19:46 ` Alex Deucher
` (2 more replies)
2021-01-06 1:05 ` [PATCH 3/3] drm/amdgpu:Limit the resolution for virtual_display Emily.Deng
2021-01-06 19:46 ` [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Alex Deucher
2 siblings, 3 replies; 10+ messages in thread
From: Emily.Deng @ 2021-01-06 1:05 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
According to hw, after navi10,it runs in dfll mode, and should
read sclk from AverageGfxclkFrequency.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
- ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+ ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
@ 2021-01-06 19:46 ` Alex Deucher
2021-01-07 2:48 ` Quan, Evan
2021-01-07 2:57 ` Feng, Kenneth
2 siblings, 0 replies; 10+ messages in thread
From: Alex Deucher @ 2021-01-06 19:46 UTC (permalink / raw)
To: Emily.Deng; +Cc: amd-gfx list
On Tue, Jan 5, 2021 at 8:05 PM Emily.Deng <Emily.Deng@amd.com> wrote:
>
> According to hw, after navi10,it runs in dfll mode, and should
> read sclk from AverageGfxclkFrequency.
>
> Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index 51e83123f72a..7ebf9588983f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
> *size = 4;
> break;
> case AMDGPU_PP_SENSOR_GFX_SCLK:
> - ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
> + ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
> *(uint32_t *)data *= 100;
> *size = 4;
> break;
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
2021-01-06 19:46 ` Alex Deucher
@ 2021-01-07 2:48 ` Quan, Evan
2021-01-07 2:57 ` Feng, Kenneth
2 siblings, 0 replies; 10+ messages in thread
From: Quan, Evan @ 2021-01-07 2:48 UTC (permalink / raw)
To: Deng, Emily, amd-gfx; +Cc: Deng, Emily
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Evan Quan <evan.quan@amd.com>
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Emily.Deng
Sent: Wednesday, January 6, 2021 9:05 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily <Emily.Deng@amd.com>
Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
According to hw, after navi10,it runs in dfll mode, and should
read sclk from AverageGfxclkFrequency.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
-ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cevan.quan%40amd.com%7Cf8dd063d81db4666206308d8b1df2912%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637454919343172670%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=gA1B8ytfQj0g5TMPHYYC%2FKNUli2qY7iY%2Fc1vn4M7vWA%3D&reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
2021-01-06 19:46 ` Alex Deucher
2021-01-07 2:48 ` Quan, Evan
@ 2021-01-07 2:57 ` Feng, Kenneth
2 siblings, 0 replies; 10+ messages in thread
From: Feng, Kenneth @ 2021-01-07 2:57 UTC (permalink / raw)
To: Deng, Emily, amd-gfx; +Cc: Deng, Emily
[AMD Official Use Only - Internal Distribution Only]
Hello Emily,
The average clock value is a little different from the 'current clock' value.
May I know what's the purpose of this patch to display the average clock? Any issue or any customer requirement?
Thanks.
Best Regards
Kenneth
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Emily.Deng
Sent: Wednesday, January 6, 2021 9:05 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily <Emily.Deng@amd.com>
Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
[CAUTION: External Email]
According to hw, after navi10,it runs in dfll mode, and should read sclk from AverageGfxclkFrequency.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
- ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+ ret = navi10_get_smu_metrics_data(smu,
+ METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7CKenneth.Feng%40amd.com%7Cf8dd063d81db4666206308d8b1df2912%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637454919344238874%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=mXK3%2F5g4lqMFFN1ovavfXdbuypZK2FUGbAEce9VPTWs%3D&reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] drm/amdgpu:Limit the resolution for virtual_display
2021-01-06 1:05 [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Emily.Deng
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
@ 2021-01-06 1:05 ` Emily.Deng
2021-01-06 19:46 ` [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Alex Deucher
2 siblings, 0 replies; 10+ messages in thread
From: Emily.Deng @ 2021-01-06 1:05 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
Limit the resolution not bigger than 16384, which means
dev->mode_info.num_crtc * common_modes[i].w not bigger than 16384.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 9810af712cc0..6fc864cfef61 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -289,6 +289,7 @@ dce_virtual_encoder(struct drm_connector *connector)
static int dce_virtual_get_modes(struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
+ struct amdgpu_device *adev = dev->dev_private;
struct drm_display_mode *mode = NULL;
unsigned i;
static const struct mode_size {
@@ -320,8 +321,10 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
};
for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
- mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
- drm_mode_probed_add(connector, mode);
+ if (adev->mode_info.num_crtc <= 4 || common_modes[i].w <= 2560) {
+ mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
+ drm_mode_probed_add(connector, mode);
+ }
}
return 0;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440
2021-01-06 1:05 [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Emily.Deng
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
2021-01-06 1:05 ` [PATCH 3/3] drm/amdgpu:Limit the resolution for virtual_display Emily.Deng
@ 2021-01-06 19:46 ` Alex Deucher
2 siblings, 0 replies; 10+ messages in thread
From: Alex Deucher @ 2021-01-06 19:46 UTC (permalink / raw)
To: Emily.Deng; +Cc: amd-gfx list
On Tue, Jan 5, 2021 at 8:05 PM Emily.Deng <Emily.Deng@amd.com> wrote:
>
> Add one more 2k resolution which appears frequently in market.
>
> Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> index ffcc64ec6473..9810af712cc0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> @@ -294,7 +294,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
> static const struct mode_size {
> int w;
> int h;
> - } common_modes[21] = {
> + } common_modes[] = {
> { 640, 480},
> { 720, 480},
> { 800, 600},
> @@ -312,13 +312,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
> {1600, 1200},
> {1920, 1080},
> {1920, 1200},
> + {2560, 1440},
> {4096, 3112},
> {3656, 2664},
> {3840, 2160},
> {4096, 2160},
> };
>
> - for (i = 0; i < 21; i++) {
> + for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
> mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
> drm_mode_probed_add(connector, mode);
> }
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440
@ 2021-01-05 8:37 Emily.Deng
2021-01-05 8:37 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
0 siblings, 1 reply; 10+ messages in thread
From: Emily.Deng @ 2021-01-05 8:37 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index bc3dcc262fc2..2b16c8faca34 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -324,7 +324,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
static const struct mode_size {
int w;
int h;
- } common_modes[21] = {
+ } common_modes[] = {
{ 640, 480},
{ 720, 480},
{ 800, 600},
@@ -342,13 +342,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
{1600, 1200},
{1920, 1080},
{1920, 1200},
+ {2560, 1440},
{4096, 3112},
{3656, 2664},
{3840, 2160},
{4096, 2160},
};
- for (i = 0; i < 21; i++) {
+ for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
drm_mode_probed_add(connector, mode);
}
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-05 8:37 Emily.Deng
@ 2021-01-05 8:37 ` Emily.Deng
2021-01-05 9:07 ` Quan, Evan
0 siblings, 1 reply; 10+ messages in thread
From: Emily.Deng @ 2021-01-05 8:37 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
- ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+ ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-05 8:37 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
@ 2021-01-05 9:07 ` Quan, Evan
2021-01-06 1:00 ` Deng, Emily
0 siblings, 1 reply; 10+ messages in thread
From: Quan, Evan @ 2021-01-05 9:07 UTC (permalink / raw)
To: Deng, Emily, amd-gfx; +Cc: Deng, Emily
[AMD Official Use Only - Internal Distribution Only]
What's the issue with original implementation?
And does other clock domains(e.g uclk) need this fix also?
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Emily.Deng
Sent: Tuesday, January 5, 2021 4:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily <Emily.Deng@amd.com>
Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
*size = 4;
break;
case AMDGPU_PP_SENSOR_GFX_SCLK:
-ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
*(uint32_t *)data *= 100;
*size = 4;
break;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cevan.quan%40amd.com%7C8f2af901fd044c0978a408d8b155289f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637454326608630462%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=mzE040qzS6j1%2Fy85pZgUE1q3Pl6LLYOIe6Z7S3zsxJw%3D&reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
2021-01-05 9:07 ` Quan, Evan
@ 2021-01-06 1:00 ` Deng, Emily
0 siblings, 0 replies; 10+ messages in thread
From: Deng, Emily @ 2021-01-06 1:00 UTC (permalink / raw)
To: Quan, Evan, amd-gfx
[AMD Official Use Only - Internal Distribution Only]
>-----Original Message-----
>From: Quan, Evan <Evan.Quan@amd.com>
>Sent: Tuesday, January 5, 2021 5:07 PM
>To: Deng, Emily <Emily.Deng@amd.com>; amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily <Emily.Deng@amd.com>
>Subject: RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
>
>[AMD Official Use Only - Internal Distribution Only]
>
>What's the issue with original implementation?
> And does other clock domains(e.g uclk) need this fix also?
According to smu team, after navi10, it will use dfll mode, for sclk read from CurrClock is not correct, need to read from AverageGfxclkFrequency in SmuMetrics_t. Will add this in comment.
>
>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>Emily.Deng
>Sent: Tuesday, January 5, 2021 4:37 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily <Emily.Deng@amd.com>
>Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
>
>Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
>---
> drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>index 51e83123f72a..7ebf9588983f 100644
>--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context
>*smu, *size = 4; break; case AMDGPU_PP_SENSOR_GFX_SCLK:
>-ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t
>*)data);
>+ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK,
>+(uint32_t *)data);
> *(uint32_t *)data *= 100;
> *size = 4;
> break;
>--
>2.25.1
>
>_______________________________________________
>amd-gfx mailing list
>amd-gfx@lists.freedesktop.org
>https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.f
>reedesktop.org%2Fmailman%2Flistinfo%2Famd-
>gfx&data=04%7C01%7Cevan.quan%40amd.com%7C8f2af901fd044c097
>8a408d8b155289f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C
>637454326608630462%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwM
>DAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata
>=mzE040qzS6j1%2Fy85pZgUE1q3Pl6LLYOIe6Z7S3zsxJw%3D&reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-01-07 2:57 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-06 1:05 [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Emily.Deng
2021-01-06 1:05 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
2021-01-06 19:46 ` Alex Deucher
2021-01-07 2:48 ` Quan, Evan
2021-01-07 2:57 ` Feng, Kenneth
2021-01-06 1:05 ` [PATCH 3/3] drm/amdgpu:Limit the resolution for virtual_display Emily.Deng
2021-01-06 19:46 ` [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440 Alex Deucher
-- strict thread matches above, loose matches on Subject: below --
2021-01-05 8:37 Emily.Deng
2021-01-05 8:37 ` [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10 Emily.Deng
2021-01-05 9:07 ` Quan, Evan
2021-01-06 1:00 ` Deng, Emily
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.