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* Re: [Qemu-devel] [PATCH arm-devs v1 5/5] sd/sdhci:ADMA: fix interrupt
@ 2013-05-22 13:38 Igor Mitsyanko
  0 siblings, 0 replies; 2+ messages in thread
From: Igor Mitsyanko @ 2013-05-22 13:38 UTC (permalink / raw)
  To: peter.crosthwaite; +Cc: Peter Maydell, qemu-devel, edgar.iglesias

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On 05/21/2013 10:53 AM, peter.crosthwaite@xilinx.com wrote:

From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
<peter.crosthwaite@xilinx.com>

The end of transfer check was occurring and potentially returning before
the interrupt flag was checked. This means the interrupt will be missed
if it occurs on the last packet. Fix by checking for the interrupt
before checking for the end of transfer.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
<peter.crosthwaite@xilinx.com>
---

 hw/sd/sdhci.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 15345dc..e64899c 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -730,6 +730,15 @@ static void sdhci_do_adma(SDHCIState *s)
             break;
         }

+        if (dscr.attr & SDHC_ADMA_ATTR_INT) {
+            DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr);
+            if (s->norintstsen & SDHC_NISEN_DMA) {
+                s->norintsts |= SDHC_NIS_DMA;
+            }
+
+            sdhci_update_irq(s);
+        }
+
         /* ADMA transfer terminates if blkcnt == 0 or by END attribute */
         if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) &&
                     (s->blkcnt == 0)) || (dscr.attr & SDHC_ADMA_ATTR_END)) {
@@ -752,15 +761,6 @@ static void sdhci_do_adma(SDHCIState *s)
             return;
         }

-        if (dscr.attr & SDHC_ADMA_ATTR_INT) {
-            DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr);
-            if (s->norintstsen & SDHC_NISEN_DMA) {
-                s->norintsts |= SDHC_NIS_DMA;
-            }
-
-            sdhci_update_irq(s);
-            return;
-        }
     }

     /* we have unfinished business - reschedule to continue ADMA */


Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> <i.mitsyanko@gmail.com>

-- 
Best wishes,
Igor Mitsyanko
email: i.mitsyanko@gmail.com

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^ permalink raw reply related	[flat|nested] 2+ messages in thread
* [Qemu-devel] [PATCH arm-devs v1 0/5]  SD and SDHCI Fixes
@ 2013-05-21  6:49 peter.crosthwaite
  2013-05-21  6:53 ` [Qemu-devel] [PATCH arm-devs v1 5/5] sd/sdhci:ADMA: fix interrupt peter.crosthwaite
  0 siblings, 1 reply; 2+ messages in thread
From: peter.crosthwaite @ 2013-05-21  6:49 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, i.mitsyanko, edgar.iglesias

From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

Fixes found in SD and SDHCI found doing some corner case testing.


Peter Crosthwaite (5):
  sd/sd.c: Fix "inquiry" ACMD41
  sd/sdhci.c: Only reset data_count on new commands
  sd/sdhci: Fix Buffer Write Ready interrupt
  sd/sdhci.c: Fix bdata_read DPRINT message
  sd/sdhci:ADMA: fix interrupt

 hw/sd/sd.c    |  1 +
 hw/sd/sdhci.c | 28 ++++++++++++++--------------
 2 files changed, 15 insertions(+), 14 deletions(-)

-- 
1.8.3.rc1.44.gb387c77.dirty

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2013-05-22 13:38 UTC | newest]

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2013-05-22 13:38 [Qemu-devel] [PATCH arm-devs v1 5/5] sd/sdhci:ADMA: fix interrupt Igor Mitsyanko
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2013-05-21  6:49 [Qemu-devel] [PATCH arm-devs v1 0/5] SD and SDHCI Fixes peter.crosthwaite
2013-05-21  6:53 ` [Qemu-devel] [PATCH arm-devs v1 5/5] sd/sdhci:ADMA: fix interrupt peter.crosthwaite

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