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From: Jassi Brar <jassisinghbrar-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>
Cc: Vincent Yang
	<vincent.cw.yang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
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	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>,
	"andy.green-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org"
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	Tetsuya Nuriya
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	<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Pawel Moll <Pawel.Moll-5wv7dgnIgG8@public.gmane.org>,
	"patches-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org"
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	<olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>,
	Vincent Yang
	<vincent.yang-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
Subject: Re: [PATCH v7 2/7] mailbox: arm_mhu: add driver for ARM MHU controller
Date: Wed, 18 Mar 2015 18:26:14 +0530	[thread overview]
Message-ID: <CABb+yY2woK6qWbrgPGRBRXJqJdf=1HxE_-Am-SY1_Uf_dNgTew@mail.gmail.com> (raw)
In-Reply-To: <55094BEF.9060006-5wv7dgnIgG8@public.gmane.org>

On Wed, Mar 18, 2015 at 3:27 PM, Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> wrote:
> Hi Vincent,
>
> I see that this driver is queued but most of my earlier comments were
> not addressed.
>
Some of your comments have been addressed as changes and some as replies.

> *No ACK from DT binding maintainers too*.
>
Yeah it would have been great to have some ack. It has been many
months now, but I see its not uncommon for bindings go in via
maintainers. I assume folks find it just normal.


>> +++ b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt
>> @@ -0,0 +1,43 @@
>> +ARM MHU Mailbox Driver
>> +======================
>> +
>> +The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has
>> +3 independent channels/links to communicate with remote processor(s).
>> + MHU links are hardwired on a platform. A link raises interrupt for any
>
>
> As I had mentioned before it's just one implementation, the IP had
> provision bi-directional interrupts and the binding *has to consider*
> that instead of having to workaround that later.
>
I will reply in yet another way.... the spec I have don't mention that
(and it makes sense) and your platform doesn't do that either. I would
have had to do something about it, had there been such a weird setup,
but there's none known.

 So let us please avoid getting into bikeshedding discussion yet
again. Otherwise almost every binding is broken because there could
always be some platform that does weird things with irqs.

>> +The last channel is specified to be a 'Secure' resource, hence can't be
>> +used by Linux running NS.
>
> Correct so drop the support for secure channel until the first user
> comes up.
>
In your last post you said:
  "Sorry my statement was not clear, I wanted to ask you to add that info
to the binding."
  Not that it makes sense to say the obvious, I added it just to
address your comment.

> I am worried it might generate abort if someone tries to
> access it in ARM64 which always runs in non-secure.
>
Abort should have happened years ago if someone _tries_ to access a
secure resource from non-secure mode ;)
How do you protect such people from "trying to" dereference NULL
pointers?  (you made me repeat Nth time).

>> +
>> +static struct amba_id mhu_ids[] = {
>> +       {
>> +               .id     = 0x1bb098,
>
>
> As I mentioned couple of times this is broken. Please refer my earlier mail
> for details. You are skipping a field to compare which incorrect.
> You are just trying to get it working with existing AMBA driver without any
> changes matching the IDs partially.
>
I did not miss your last mail. Let me try to reply in even simpler
terms... PID[0,3] identification is fine grained enough. If/when we
have some platform with non-ARM MHU, we could catch that in this
driver. Most likely even then the reg-map won't change drastically, if
at all. So we could ignore the PID4, otherwise we check PID4 in this
driver and adapt the behavior.

-Jassi
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WARNING: multiple messages have this Message-ID (diff)
From: jassisinghbrar@gmail.com (Jassi Brar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 2/7] mailbox: arm_mhu: add driver for ARM MHU controller
Date: Wed, 18 Mar 2015 18:26:14 +0530	[thread overview]
Message-ID: <CABb+yY2woK6qWbrgPGRBRXJqJdf=1HxE_-Am-SY1_Uf_dNgTew@mail.gmail.com> (raw)
In-Reply-To: <55094BEF.9060006@arm.com>

On Wed, Mar 18, 2015 at 3:27 PM, Sudeep Holla <sudeep.holla@arm.com> wrote:
> Hi Vincent,
>
> I see that this driver is queued but most of my earlier comments were
> not addressed.
>
Some of your comments have been addressed as changes and some as replies.

> *No ACK from DT binding maintainers too*.
>
Yeah it would have been great to have some ack. It has been many
months now, but I see its not uncommon for bindings go in via
maintainers. I assume folks find it just normal.


>> +++ b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt
>> @@ -0,0 +1,43 @@
>> +ARM MHU Mailbox Driver
>> +======================
>> +
>> +The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has
>> +3 independent channels/links to communicate with remote processor(s).
>> + MHU links are hardwired on a platform. A link raises interrupt for any
>
>
> As I had mentioned before it's just one implementation, the IP had
> provision bi-directional interrupts and the binding *has to consider*
> that instead of having to workaround that later.
>
I will reply in yet another way.... the spec I have don't mention that
(and it makes sense) and your platform doesn't do that either. I would
have had to do something about it, had there been such a weird setup,
but there's none known.

 So let us please avoid getting into bikeshedding discussion yet
again. Otherwise almost every binding is broken because there could
always be some platform that does weird things with irqs.

>> +The last channel is specified to be a 'Secure' resource, hence can't be
>> +used by Linux running NS.
>
> Correct so drop the support for secure channel until the first user
> comes up.
>
In your last post you said:
  "Sorry my statement was not clear, I wanted to ask you to add that info
to the binding."
  Not that it makes sense to say the obvious, I added it just to
address your comment.

> I am worried it might generate abort if someone tries to
> access it in ARM64 which always runs in non-secure.
>
Abort should have happened years ago if someone _tries_ to access a
secure resource from non-secure mode ;)
How do you protect such people from "trying to" dereference NULL
pointers?  (you made me repeat Nth time).

>> +
>> +static struct amba_id mhu_ids[] = {
>> +       {
>> +               .id     = 0x1bb098,
>
>
> As I mentioned couple of times this is broken. Please refer my earlier mail
> for details. You are skipping a field to compare which incorrect.
> You are just trying to get it working with existing AMBA driver without any
> changes matching the IDs partially.
>
I did not miss your last mail. Let me try to reply in even simpler
terms... PID[0,3] identification is fine grained enough. If/when we
have some platform with non-ARM MHU, we could catch that in this
driver. Most likely even then the reg-map won't change drastically, if
at all. So we could ignore the PID4, otherwise we check PID4 in this
driver and adapt the behavior.

-Jassi

  parent reply	other threads:[~2015-03-18 12:56 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-04 10:52 [PATCH v7 0/7] Support for Fujitsu MB86S7X SoCs Vincent Yang
2015-03-04 10:52 ` Vincent Yang
2015-03-04 11:02 ` [PATCH v7 3/7] ARM: MB86S7X: Add MCPM support Vincent Yang
     [not found] ` <1425466367-30556-1-git-send-email-vincent.yang-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
2015-03-04 10:58   ` [PATCH v7 1/7] ARM: Add platform support for Fujitsu MB86S7X SoCs Vincent Yang
2015-03-04 10:58     ` Vincent Yang
2015-03-04 11:01   ` [PATCH v7 2/7] mailbox: arm_mhu: add driver for ARM MHU controller Vincent Yang
2015-03-04 11:01     ` Vincent Yang
     [not found]     ` <1425466884-30648-1-git-send-email-vincent.yang-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
2015-03-18  9:57       ` Sudeep Holla
2015-03-18  9:57         ` Sudeep Holla
     [not found]         ` <55094BEF.9060006-5wv7dgnIgG8@public.gmane.org>
2015-03-18 12:56           ` Jassi Brar [this message]
2015-03-18 12:56             ` Jassi Brar
     [not found]             ` <CABb+yY2woK6qWbrgPGRBRXJqJdf=1HxE_-Am-SY1_Uf_dNgTew-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-18 14:08               ` Sudeep Holla
2015-03-18 14:08                 ` Sudeep Holla
2015-03-18 10:25       ` Sudeep Holla
2015-03-18 10:25         ` Sudeep Holla
     [not found]         ` <55095297.5060605-5wv7dgnIgG8@public.gmane.org>
2015-03-18 13:19           ` Jassi Brar
2015-03-18 13:19             ` Jassi Brar
     [not found]             ` <CABb+yY0qRSocL-ePosUzszAh4X6161ve8_qUq4VizbLWMAmMCQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-18 14:23               ` Sudeep Holla
2015-03-18 14:23                 ` Sudeep Holla
2015-03-26 11:43     ` Sudeep Holla
2015-03-26 11:43       ` Sudeep Holla
     [not found]       ` <5513F0D9.5080807-5wv7dgnIgG8@public.gmane.org>
2015-03-26 11:49         ` Russell King - ARM Linux
2015-03-26 11:49           ` Russell King - ARM Linux
     [not found]           ` <20150326114955.GE8656-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-03-26 11:58             ` Sudeep Holla
2015-03-26 11:58               ` Sudeep Holla
2015-03-04 11:04   ` [PATCH v7 4/7] clk: Add clock driver for mb86s7x Vincent Yang
2015-03-04 11:04     ` Vincent Yang
     [not found]     ` <1425467043-30733-1-git-send-email-vincent.yang-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
2015-04-10 20:52       ` Michael Turquette
2015-04-10 20:52         ` Michael Turquette
2015-03-04 11:05   ` [PATCH v7 5/7] dt: mb86s7x: add dt files for MB86S7x evbs Vincent Yang
2015-03-04 11:05     ` Vincent Yang
2015-03-04 11:07   ` [PATCH v7 6/7] of: add Fujitsu vendor prefix Vincent Yang
2015-03-04 11:07     ` Vincent Yang
2015-03-04 11:08 ` [PATCH v7 7/7] ARM: MB86S7x: Add configs Vincent Yang

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