From: Kamal Dasu <kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, MTD Maling List <linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>, vigneshr-l0cyMroinI0@public.gmane.org, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, "Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>, bcm-kernel-feedback-list" <bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>, Vikram Prakash <vikram.prakash-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>, Andy Fung <andy.fung-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>, Jon Mason <jon.mason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>, "Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>, bcm-kernel-feedback-list" <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> Subject: Re: [PATCH v5 8/8] spi: nsp-qspi: Add Broadcom NSP, NS2, Cygnus SoC support Date: Fri, 19 Aug 2016 11:43:24 -0400 [thread overview] Message-ID: <CAC=U0a31LOphD=21-tBtiCxN-JqxSArxqhQ4_=fXwH-vEKnbHA@mail.gmail.com> (raw) In-Reply-To: <20160816184030.GB9347-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> On Tue, Aug 16, 2016 at 2:40 PM, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote: > On Fri, Jul 29, 2016 at 06:13:13PM -0400, Kamal Dasu wrote: > >> - irq = platform_get_irq_byname(pdev, name); >> + if (soc && qspi_irq_tab[val].irq_source == MUXED_L1) { >> + /* all mspi, bspi intrs muxed to one L1 intr */ >> + irq = platform_get_irq(pdev, 0); >> + of_property_read_string(dev->of_node, >> + "interrupt-names", >> + &name); >> + } > > I am confused why we are parsing the interrupt-names property here? > For Muxed L1 single source interrupt, there is only one irq, and SoCs could use a different different name wanted to use that name. But I could force a name as well. >> + /* >> + * Some SoCs integrate spi controller (e.g., its interrupt bits) >> + * in specific ways >> + */ >> + if (soc) { >> + qspi->soc = soc; >> + soc->bcm_qspi_int_set(soc, MSPI_DONE, true); >> + } else { >> + qspi->soc = NULL; >> + } > > The variable name "soc" here doesn't seem hugely descriptive when it's > just for the interrupt controller. Named it that way since it could potentially have other SoC specific settings for spi master bus needed in future. Kamal -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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From: Kamal Dasu <kdasu.kdev@gmail.com> To: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org, MTD Maling List <linux-mtd@lists.infradead.org>, vigneshr@ti.com, Florian Fainelli <f.fainelli@gmail.com>, "Jayachandran C <jchandra@broadcom.com>, bcm-kernel-feedback-list" <bcm-kernel-feedback-list@broadcom.com>, Vikram Prakash <vikram.prakash@broadcom.com>, Andy Fung <andy.fung@broadcom.com>, Jon Mason <jon.mason@broadcom.com>, "Jayachandran C <jchandra@broadcom.com>, bcm-kernel-feedback-list" <jchandra@broadcom.com> Subject: Re: [PATCH v5 8/8] spi: nsp-qspi: Add Broadcom NSP, NS2, Cygnus SoC support Date: Fri, 19 Aug 2016 11:43:24 -0400 [thread overview] Message-ID: <CAC=U0a31LOphD=21-tBtiCxN-JqxSArxqhQ4_=fXwH-vEKnbHA@mail.gmail.com> (raw) In-Reply-To: <20160816184030.GB9347@sirena.org.uk> On Tue, Aug 16, 2016 at 2:40 PM, Mark Brown <broonie@kernel.org> wrote: > On Fri, Jul 29, 2016 at 06:13:13PM -0400, Kamal Dasu wrote: > >> - irq = platform_get_irq_byname(pdev, name); >> + if (soc && qspi_irq_tab[val].irq_source == MUXED_L1) { >> + /* all mspi, bspi intrs muxed to one L1 intr */ >> + irq = platform_get_irq(pdev, 0); >> + of_property_read_string(dev->of_node, >> + "interrupt-names", >> + &name); >> + } > > I am confused why we are parsing the interrupt-names property here? > For Muxed L1 single source interrupt, there is only one irq, and SoCs could use a different different name wanted to use that name. But I could force a name as well. >> + /* >> + * Some SoCs integrate spi controller (e.g., its interrupt bits) >> + * in specific ways >> + */ >> + if (soc) { >> + qspi->soc = soc; >> + soc->bcm_qspi_int_set(soc, MSPI_DONE, true); >> + } else { >> + qspi->soc = NULL; >> + } > > The variable name "soc" here doesn't seem hugely descriptive when it's > just for the interrupt controller. Named it that way since it could potentially have other SoC specific settings for spi master bus needed in future. Kamal
next prev parent reply other threads:[~2016-08-19 15:43 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-07-29 22:13 [PATCH v5 0/8] Broadcom stb, nsp, ns2, cygnus QSPI driver Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-1-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-07-29 22:13 ` [PATCH v5 1/8] Documentation: dt: spi: Add BRCMSTB SoC bindings Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-2-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-04 21:06 ` Mark Brown 2016-08-04 21:06 ` Mark Brown [not found] ` <20160804210634.GM10383-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-08-04 22:20 ` Florian Fainelli 2016-08-04 22:20 ` Florian Fainelli [not found] ` <1fddf72d-cbc1-225f-b482-d6ba99dab823-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-05 11:03 ` Mark Brown 2016-08-05 11:03 ` Mark Brown 2016-08-16 18:19 ` Mark Brown 2016-08-16 18:19 ` Mark Brown [not found] ` <20160816181944.GY9347-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-08-19 15:07 ` Kamal Dasu 2016-08-19 15:07 ` Kamal Dasu 2016-07-29 22:13 ` [PATCH v5 2/8] spi: bcm-qspi: Add Broadcom MSPI driver Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-3-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-16 18:15 ` Mark Brown 2016-08-16 18:15 ` Mark Brown [not found] ` <20160816181536.GX9347-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-08-19 15:20 ` Kamal Dasu 2016-08-19 15:20 ` Kamal Dasu 2016-07-29 22:13 ` [PATCH v5 3/8] spi: bcm-qspi: Add BSPI spi-nor flash controller driver Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-4-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-16 18:31 ` Mark Brown 2016-08-16 18:31 ` Mark Brown [not found] ` <20160816183148.GZ9347-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-08-19 15:33 ` Kamal Dasu 2016-08-19 15:33 ` Kamal Dasu 2016-07-29 22:13 ` [PATCH v5 4/8] mtd: m25p80: Let m25p80_read() fallback to spi transfer Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-5-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-04 21:07 ` Mark Brown 2016-08-04 21:07 ` Mark Brown [not found] ` <20160804210747.GN10383-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-08-19 14:59 ` Kamal Dasu 2016-08-19 14:59 ` Kamal Dasu 2016-07-29 22:13 ` [PATCH v5 5/8] Documentation: dt: spi: Add Broadcom NSP, NS2 SoC bindings Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-6-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-16 18:32 ` Mark Brown 2016-08-16 18:32 ` Mark Brown 2016-07-29 22:13 ` [PATCH v5 6/8] arm: dts: Add bcm-nsp and bcm958625k support Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu 2016-08-01 15:09 ` Jonas Gorski 2016-08-01 15:09 ` Jonas Gorski [not found] ` <CAOiHx=n8a64d-2LGGFHuyBQBg3Cz=ALVXEbvPRHxTyzFjWRMXA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-08-02 19:51 ` Kamal Dasu 2016-08-02 19:51 ` Kamal Dasu 2016-07-29 22:13 ` [PATCH v5 7/8] arm64: dts: Add ns2 SoC support Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu 2016-07-29 22:13 ` [PATCH v5 8/8] spi: nsp-qspi: Add Broadcom NSP, NS2, Cygnus " Kamal Dasu 2016-07-29 22:13 ` Kamal Dasu [not found] ` <1469830393-13295-9-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2016-08-16 18:40 ` Mark Brown 2016-08-16 18:40 ` Mark Brown [not found] ` <20160816184030.GB9347-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-08-19 15:43 ` Kamal Dasu [this message] 2016-08-19 15:43 ` Kamal Dasu [not found] ` <CAC=U0a31LOphD=21-tBtiCxN-JqxSArxqhQ4_=fXwH-vEKnbHA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-08-19 16:42 ` Mark Brown 2016-08-19 16:42 ` Mark Brown
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