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From: Linus Walleij <linus.walleij@linaro.org>
To: Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <mripard@kernel.org>,  Ondrej Jirman <x@xff.cz>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-gpio@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
Date: Mon, 11 Jul 2022 10:58:47 +0200	[thread overview]
Message-ID: <CACRpkdY65q12sjDwH0UOOAa8GkBO--EDTsKrnEwn8NoTYTgtPQ@mail.gmail.com> (raw)
In-Reply-To: <20220626021148.56740-2-samuel@sholland.org>

On Sun, Jun 26, 2022 at 4:11 AM Samuel Holland <samuel@sholland.org> wrote:

> D1 contains a pin controller similar to previous SoCs, but with some
> register layout changes. It includes 6 interrupt-capable pin banks.
>
> D1s is a low pin count version of the D1 SoC, with some pins omitted.
> The remaining pins have the same function assignments as D1.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>

All 6 patches applied to the pinctrl tree, the last patch 6/6
required some fuzzing so please check the result!

Yours,
Linus Walleij

WARNING: multiple messages have this Message-ID (diff)
From: Linus Walleij <linus.walleij@linaro.org>
To: Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <mripard@kernel.org>,  Ondrej Jirman <x@xff.cz>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-gpio@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
Date: Mon, 11 Jul 2022 10:58:47 +0200	[thread overview]
Message-ID: <CACRpkdY65q12sjDwH0UOOAa8GkBO--EDTsKrnEwn8NoTYTgtPQ@mail.gmail.com> (raw)
In-Reply-To: <20220626021148.56740-2-samuel@sholland.org>

On Sun, Jun 26, 2022 at 4:11 AM Samuel Holland <samuel@sholland.org> wrote:

> D1 contains a pin controller similar to previous SoCs, but with some
> register layout changes. It includes 6 interrupt-capable pin banks.
>
> D1s is a low pin count version of the D1 SoC, with some pins omitted.
> The remaining pins have the same function assignments as D1.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>

All 6 patches applied to the pinctrl tree, the last patch 6/6
required some fuzzing so please check the result!

Yours,
Linus Walleij

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-07-11  8:58 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-26  2:11 [PATCH 0/6] pinctrl: sunxi: Allwinner D1/D1s support Samuel Holland
2022-06-26  2:11 ` Samuel Holland
2022-06-26  2:11 ` [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s Samuel Holland
2022-06-26  2:11   ` Samuel Holland
2022-06-26 10:37   ` Krzysztof Kozlowski
2022-06-26 10:37     ` Krzysztof Kozlowski
2022-07-01 13:02   ` Heiko Stuebner
2022-07-01 13:02     ` Heiko Stuebner
2022-07-11  8:58   ` Linus Walleij [this message]
2022-07-11  8:58     ` Linus Walleij
2022-07-12 10:14     ` Samuel Holland
2022-07-12 10:14       ` Samuel Holland
2022-07-13  2:56       ` Samuel Holland
2022-07-13  2:56         ` Samuel Holland
2022-06-26  2:11 ` [PATCH 2/6] pinctrl: sunxi: Add I/O bias setting for H6 R-PIO Samuel Holland
2022-06-26  2:11   ` Samuel Holland
2022-06-27 20:34   ` Jernej Škrabec
2022-06-27 20:34     ` Jernej Škrabec
2022-06-28  3:18     ` Samuel Holland
2022-06-28  3:18       ` Samuel Holland
2022-07-01 13:03   ` Heiko Stuebner
2022-07-01 13:03     ` Heiko Stuebner
2022-06-26  2:11 ` [PATCH 3/6] pinctrl: sunxi: Support the 2.5V I/O bias mode Samuel Holland
2022-06-26  2:11   ` Samuel Holland
2022-06-27 20:43   ` Jernej Škrabec
2022-06-27 20:43     ` Jernej Škrabec
2022-06-28  3:29     ` Samuel Holland
2022-06-28  3:29       ` Samuel Holland
2022-07-02 19:48       ` Jernej Škrabec
2022-07-02 19:48         ` Jernej Škrabec
2022-07-01 13:04   ` Heiko Stuebner
2022-07-01 13:04     ` Heiko Stuebner
2022-06-26  2:11 ` [PATCH 4/6] pinctrl: sunxi: Refactor register/offset calculation Samuel Holland
2022-06-26  2:11   ` Samuel Holland
2022-07-01 13:07   ` Heiko Stuebner
2022-07-01 13:07     ` Heiko Stuebner
2022-07-02 20:29   ` Jernej Škrabec
2022-07-02 20:29     ` Jernej Škrabec
2022-06-26  2:11 ` [PATCH 5/6] pinctrl: sunxi: Make some layout parameters dynamic Samuel Holland
2022-06-26  2:11   ` Samuel Holland
2022-07-01 13:09   ` Heiko Stuebner
2022-07-01 13:09     ` Heiko Stuebner
2022-07-02 20:33   ` Jernej Škrabec
2022-07-02 20:33     ` Jernej Škrabec
2022-06-26  2:11 ` [PATCH 6/6] pinctrl: sunxi: Add driver for Allwinner D1/D1s Samuel Holland
2022-06-26  2:11   ` Samuel Holland
2022-07-01 13:13   ` Heiko Stuebner
2022-07-01 13:13     ` Heiko Stuebner
2022-07-01 15:16     ` Samuel Holland
2022-07-01 15:16       ` Samuel Holland
2022-07-02 14:47   ` Andre Przywara
2022-07-02 14:47     ` Andre Przywara
2022-07-02 15:43     ` Samuel Holland
2022-07-02 15:43       ` Samuel Holland
2022-07-04  9:42       ` Andre Przywara
2022-07-04  9:42         ` Andre Przywara

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