* [PATCH v2 0/2] Add pinctrl input schmitt support
@ 2017-03-02 7:11 David Wu
[not found] ` <1488438684-1801-1-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
0 siblings, 1 reply; 12+ messages in thread
From: David Wu @ 2017-03-02 7:11 UTC (permalink / raw)
To: heiko, linus.walleij
Cc: huangtao, linux-rockchip, linux-gpio, linux-kernel, David Wu
Some pins need to enable Schmitt triggers which are used
in open loop configurations for noise immunity and closed
loop configurations to implement function generators.
david.wu (2):
pinctrl: rockchip：Add input schmitt support
pinctrl: rockchip: Add input schmitt support for rk3328
drivers/pinctrl/pinctrl-rockchip.c | 96 ++++++++++++++++++++++++++++++++++++++
1 file changed, 96 insertions(+)
--
1.9.1
^ permalink raw reply [flat|nested] 12+ messages in thread[parent not found: <1488438684-1801-1-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support 2017-03-02 7:11 [PATCH v2 0/2] Add pinctrl input schmitt support David Wu @ 2017-03-02 7:11 ` David Wu 0 siblings, 0 replies; 12+ messages in thread From: David Wu @ 2017-03-02 7:11 UTC (permalink / raw) To: heiko-4mtYJXux2i+zQB+pC5nmwQ, linus.walleij-QSEj5FYQhm4dnm+yROfE0A Cc: huangtao-TNX95d0MmH7DzftRWevZcw, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, david.wu, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-gpio-u79uwXL29TY76Z2rM5mHXA From: "david.wu" <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> To prevent external signal crosstalk, some pins need to enable input schmitt, like i2c pins, 32k-input pin and so on. Signed-off-by: david.wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> --- changes in v2: - check the return value (Heiko) drivers/pinctrl/pinctrl-rockchip.c | 73 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index a20ce9f..9b8d516 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -308,6 +308,9 @@ struct rockchip_pin_ctrl { int *reg, u8 *bit); void (*iomux_recalc)(u8 bank_num, int pin, int *reg, u8 *bit, int *mask); + int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank, + int pin_num, struct regmap **regmap, + int *reg, u8 *bit); }; struct rockchip_pin_config { @@ -1355,6 +1358,57 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, return ret; } +static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) +{ + struct rockchip_pinctrl *info = bank->drvdata; + struct rockchip_pin_ctrl *ctrl = info->ctrl; + struct regmap *regmap; + int reg, ret; + u8 bit; + u32 data; + + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); + if (ret) + return ret; + + ret = regmap_read(regmap, reg, &data); + if (ret) + return ret; + + data >>= bit; + return data & 0x1; +} + +static int rockchip_set_schmitt(struct rockchip_pin_bank *bank, + int pin_num, int enable) +{ + struct rockchip_pinctrl *info = bank->drvdata; + struct rockchip_pin_ctrl *ctrl = info->ctrl; + struct regmap *regmap; + int reg, ret; + unsigned long flags; + u8 bit; + u32 data, rmask; + + dev_dbg(info->dev, "setting input schmitt of GPIO%d-%d to %d\n", + bank->bank_num, pin_num, enable); + + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); + if (ret) + return ret; + + spin_lock_irqsave(&bank->slock, flags); + + /* enable the write to the equivalent lower bits */ + data = BIT(bit + 16) | (enable << bit); + rmask = BIT(bit + 16) | BIT(bit); + + ret = regmap_update_bits(regmap, reg, rmask, data); + spin_unlock_irqrestore(&bank->slock, flags); + + return ret; +} + /* * Pinmux_ops handling */ @@ -1574,6 +1628,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, if (rc < 0) return rc; break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (!info->ctrl->schmitt_calc_reg) + return -ENOTSUPP; + + rc = rockchip_set_schmitt(bank, + pin - bank->pin_base, arg); + if (rc < 0) + return rc; + break; default: return -ENOTSUPP; break; @@ -1634,6 +1697,16 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, arg = rc; break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (!info->ctrl->schmitt_calc_reg) + return -ENOTSUPP; + + rc = rockchip_get_schmitt(bank, pin - bank->pin_base); + if (rc < 0) + return rc; + + arg = rc; + break; default: return -ENOTSUPP; break; -- 1.9.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support @ 2017-03-02 7:11 ` David Wu 0 siblings, 0 replies; 12+ messages in thread From: David Wu @ 2017-03-02 7:11 UTC (permalink / raw) To: heiko, linus.walleij Cc: huangtao, linux-rockchip, linux-gpio, linux-kernel, david.wu From: "david.wu" <david.wu@rock-chips.com> To prevent external signal crosstalk, some pins need to enable input schmitt, like i2c pins, 32k-input pin and so on. Signed-off-by: david.wu <david.wu@rock-chips.com> --- changes in v2: - check the return value (Heiko) drivers/pinctrl/pinctrl-rockchip.c | 73 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index a20ce9f..9b8d516 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -308,6 +308,9 @@ struct rockchip_pin_ctrl { int *reg, u8 *bit); void (*iomux_recalc)(u8 bank_num, int pin, int *reg, u8 *bit, int *mask); + int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank, + int pin_num, struct regmap **regmap, + int *reg, u8 *bit); }; struct rockchip_pin_config { @@ -1355,6 +1358,57 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, return ret; } +static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) +{ + struct rockchip_pinctrl *info = bank->drvdata; + struct rockchip_pin_ctrl *ctrl = info->ctrl; + struct regmap *regmap; + int reg, ret; + u8 bit; + u32 data; + + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); + if (ret) + return ret; + + ret = regmap_read(regmap, reg, &data); + if (ret) + return ret; + + data >>= bit; + return data & 0x1; +} + +static int rockchip_set_schmitt(struct rockchip_pin_bank *bank, + int pin_num, int enable) +{ + struct rockchip_pinctrl *info = bank->drvdata; + struct rockchip_pin_ctrl *ctrl = info->ctrl; + struct regmap *regmap; + int reg, ret; + unsigned long flags; + u8 bit; + u32 data, rmask; + + dev_dbg(info->dev, "setting input schmitt of GPIO%d-%d to %d\n", + bank->bank_num, pin_num, enable); + + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); + if (ret) + return ret; + + spin_lock_irqsave(&bank->slock, flags); + + /* enable the write to the equivalent lower bits */ + data = BIT(bit + 16) | (enable << bit); + rmask = BIT(bit + 16) | BIT(bit); + + ret = regmap_update_bits(regmap, reg, rmask, data); + spin_unlock_irqrestore(&bank->slock, flags); + + return ret; +} + /* * Pinmux_ops handling */ @@ -1574,6 +1628,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, if (rc < 0) return rc; break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (!info->ctrl->schmitt_calc_reg) + return -ENOTSUPP; + + rc = rockchip_set_schmitt(bank, + pin - bank->pin_base, arg); + if (rc < 0) + return rc; + break; default: return -ENOTSUPP; break; @@ -1634,6 +1697,16 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, arg = rc; break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (!info->ctrl->schmitt_calc_reg) + return -ENOTSUPP; + + rc = rockchip_get_schmitt(bank, pin - bank->pin_base); + if (rc < 0) + return rc; + + arg = rc; + break; default: return -ENOTSUPP; break; -- 1.9.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
[parent not found: <1488438684-1801-2-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support 2017-03-02 7:11 ` David Wu @ 2017-03-02 8:30 ` Kever Yang -1 siblings, 0 replies; 12+ messages in thread From: Kever Yang @ 2017-03-02 8:30 UTC (permalink / raw) To: David Wu, heiko-4mtYJXux2i+zQB+pC5nmwQ, linus.walleij-QSEj5FYQhm4dnm+yROfE0A Cc: huangtao-TNX95d0MmH7DzftRWevZcw, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-gpio-u79uwXL29TY76Z2rM5mHXA Hi David, On 03/02/2017 03:11 PM, David Wu wrote: > From: "david.wu" <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> You do not need to add this when you send mail for yourself, it's need when you send mail for others. > > To prevent external signal crosstalk, some pins need to > enable input schmitt, like i2c pins, 32k-input pin and so on. > > Signed-off-by: david.wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Better to use "David Wu" for full name, you can correct this in your gitconfig file. Thanks, - Kever > --- > changes in v2: > - check the return value (Heiko) > > drivers/pinctrl/pinctrl-rockchip.c | 73 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > > diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c > index a20ce9f..9b8d516 100644 > --- a/drivers/pinctrl/pinctrl-rockchip.c > +++ b/drivers/pinctrl/pinctrl-rockchip.c > @@ -308,6 +308,9 @@ struct rockchip_pin_ctrl { > int *reg, u8 *bit); > void (*iomux_recalc)(u8 bank_num, int pin, int *reg, > u8 *bit, int *mask); > + int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank, > + int pin_num, struct regmap **regmap, > + int *reg, u8 *bit); > }; > > struct rockchip_pin_config { > @@ -1355,6 +1358,57 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, > return ret; > } > > +static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) > +{ > + struct rockchip_pinctrl *info = bank->drvdata; > + struct rockchip_pin_ctrl *ctrl = info->ctrl; > + struct regmap *regmap; > + int reg, ret; > + u8 bit; > + u32 data; > + > + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); > + if (ret) > + return ret; > + > + ret = regmap_read(regmap, reg, &data); > + if (ret) > + return ret; > + > + data >>= bit; > + return data & 0x1; > +} > + > +static int rockchip_set_schmitt(struct rockchip_pin_bank *bank, > + int pin_num, int enable) > +{ > + struct rockchip_pinctrl *info = bank->drvdata; > + struct rockchip_pin_ctrl *ctrl = info->ctrl; > + struct regmap *regmap; > + int reg, ret; > + unsigned long flags; > + u8 bit; > + u32 data, rmask; > + > + dev_dbg(info->dev, "setting input schmitt of GPIO%d-%d to %d\n", > + bank->bank_num, pin_num, enable); > + > + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); > + if (ret) > + return ret; > + > + spin_lock_irqsave(&bank->slock, flags); > + > + /* enable the write to the equivalent lower bits */ > + data = BIT(bit + 16) | (enable << bit); > + rmask = BIT(bit + 16) | BIT(bit); > + > + ret = regmap_update_bits(regmap, reg, rmask, data); > + spin_unlock_irqrestore(&bank->slock, flags); > + > + return ret; > +} > + > /* > * Pinmux_ops handling > */ > @@ -1574,6 +1628,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, > if (rc < 0) > return rc; > break; > + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: > + if (!info->ctrl->schmitt_calc_reg) > + return -ENOTSUPP; > + > + rc = rockchip_set_schmitt(bank, > + pin - bank->pin_base, arg); > + if (rc < 0) > + return rc; > + break; > default: > return -ENOTSUPP; > break; > @@ -1634,6 +1697,16 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, > > arg = rc; > break; > + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: > + if (!info->ctrl->schmitt_calc_reg) > + return -ENOTSUPP; > + > + rc = rockchip_get_schmitt(bank, pin - bank->pin_base); > + if (rc < 0) > + return rc; > + > + arg = rc; > + break; > default: > return -ENOTSUPP; > break; ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support @ 2017-03-02 8:30 ` Kever Yang 0 siblings, 0 replies; 12+ messages in thread From: Kever Yang @ 2017-03-02 8:30 UTC (permalink / raw) To: David Wu, heiko, linus.walleij Cc: huangtao, linux-rockchip, linux-kernel, linux-gpio Hi David, On 03/02/2017 03:11 PM, David Wu wrote: > From: "david.wu" <david.wu@rock-chips.com> You do not need to add this when you send mail for yourself, it's need when you send mail for others. > > To prevent external signal crosstalk, some pins need to > enable input schmitt, like i2c pins, 32k-input pin and so on. > > Signed-off-by: david.wu <david.wu@rock-chips.com> Better to use "David Wu" for full name, you can correct this in your gitconfig file. Thanks, - Kever > --- > changes in v2: > - check the return value (Heiko) > > drivers/pinctrl/pinctrl-rockchip.c | 73 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > > diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c > index a20ce9f..9b8d516 100644 > --- a/drivers/pinctrl/pinctrl-rockchip.c > +++ b/drivers/pinctrl/pinctrl-rockchip.c > @@ -308,6 +308,9 @@ struct rockchip_pin_ctrl { > int *reg, u8 *bit); > void (*iomux_recalc)(u8 bank_num, int pin, int *reg, > u8 *bit, int *mask); > + int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank, > + int pin_num, struct regmap **regmap, > + int *reg, u8 *bit); > }; > > struct rockchip_pin_config { > @@ -1355,6 +1358,57 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, > return ret; > } > > +static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) > +{ > + struct rockchip_pinctrl *info = bank->drvdata; > + struct rockchip_pin_ctrl *ctrl = info->ctrl; > + struct regmap *regmap; > + int reg, ret; > + u8 bit; > + u32 data; > + > + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); > + if (ret) > + return ret; > + > + ret = regmap_read(regmap, reg, &data); > + if (ret) > + return ret; > + > + data >>= bit; > + return data & 0x1; > +} > + > +static int rockchip_set_schmitt(struct rockchip_pin_bank *bank, > + int pin_num, int enable) > +{ > + struct rockchip_pinctrl *info = bank->drvdata; > + struct rockchip_pin_ctrl *ctrl = info->ctrl; > + struct regmap *regmap; > + int reg, ret; > + unsigned long flags; > + u8 bit; > + u32 data, rmask; > + > + dev_dbg(info->dev, "setting input schmitt of GPIO%d-%d to %d\n", > + bank->bank_num, pin_num, enable); > + > + ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); > + if (ret) > + return ret; > + > + spin_lock_irqsave(&bank->slock, flags); > + > + /* enable the write to the equivalent lower bits */ > + data = BIT(bit + 16) | (enable << bit); > + rmask = BIT(bit + 16) | BIT(bit); > + > + ret = regmap_update_bits(regmap, reg, rmask, data); > + spin_unlock_irqrestore(&bank->slock, flags); > + > + return ret; > +} > + > /* > * Pinmux_ops handling > */ > @@ -1574,6 +1628,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, > if (rc < 0) > return rc; > break; > + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: > + if (!info->ctrl->schmitt_calc_reg) > + return -ENOTSUPP; > + > + rc = rockchip_set_schmitt(bank, > + pin - bank->pin_base, arg); > + if (rc < 0) > + return rc; > + break; > default: > return -ENOTSUPP; > break; > @@ -1634,6 +1697,16 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, > > arg = rc; > break; > + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: > + if (!info->ctrl->schmitt_calc_reg) > + return -ENOTSUPP; > + > + rc = rockchip_get_schmitt(bank, pin - bank->pin_base); > + if (rc < 0) > + return rc; > + > + arg = rc; > + break; > default: > return -ENOTSUPP; > break; ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support 2017-03-02 8:30 ` Kever Yang (?) @ 2017-03-14 13:41 ` Linus Walleij -1 siblings, 0 replies; 12+ messages in thread From: Linus Walleij @ 2017-03-14 13:41 UTC (permalink / raw) To: Kever Yang Cc: David Wu, Heiko Stübner, Tao Huang, open list:ARM/Rockchip SoC..., linux-kernel, linux-gpio On Thu, Mar 2, 2017 at 9:30 AM, Kever Yang <kever.yang@rock-chips.com> wrote: >> Signed-off-by: david.wu <david.wu@rock-chips.com> > > Better to use "David Wu" for full name, you can correct this in your > gitconfig file. Yeah please do that, I fix it up manually every time. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support 2017-03-02 7:11 ` David Wu @ 2017-03-14 13:40 ` Linus Walleij -1 siblings, 0 replies; 12+ messages in thread From: Linus Walleij @ 2017-03-14 13:40 UTC (permalink / raw) To: David Wu Cc: Tao Huang, open list:ARM/Rockchip SoC..., Heiko Stübner, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-gpio-u79uwXL29TY76Z2rM5mHXA On Thu, Mar 2, 2017 at 8:11 AM, David Wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> wrote: > From: "david.wu" <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> > > To prevent external signal crosstalk, some pins need to > enable input schmitt, like i2c pins, 32k-input pin and so on. > > Signed-off-by: david.wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> > --- > changes in v2: > - check the return value (Heiko) Patch applied. I assume Heiko's ACK on this too. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support @ 2017-03-14 13:40 ` Linus Walleij 0 siblings, 0 replies; 12+ messages in thread From: Linus Walleij @ 2017-03-14 13:40 UTC (permalink / raw) To: David Wu Cc: Heiko Stübner, Tao Huang, open list:ARM/Rockchip SoC..., linux-gpio, linux-kernel On Thu, Mar 2, 2017 at 8:11 AM, David Wu <david.wu@rock-chips.com> wrote: > From: "david.wu" <david.wu@rock-chips.com> > > To prevent external signal crosstalk, some pins need to > enable input schmitt, like i2c pins, 32k-input pin and so on. > > Signed-off-by: david.wu <david.wu@rock-chips.com> > --- > changes in v2: > - check the return value (Heiko) Patch applied. I assume Heiko's ACK on this too. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 2/2] pinctrl: rockchip: Add input schmitt support for rk3328 2017-03-02 7:11 [PATCH v2 0/2] Add pinctrl input schmitt support David Wu @ 2017-03-02 7:11 ` David Wu 0 siblings, 0 replies; 12+ messages in thread From: David Wu @ 2017-03-02 7:11 UTC (permalink / raw) To: heiko-4mtYJXux2i+zQB+pC5nmwQ, linus.walleij-QSEj5FYQhm4dnm+yROfE0A Cc: huangtao-TNX95d0MmH7DzftRWevZcw, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, david.wu, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-gpio-u79uwXL29TY76Z2rM5mHXA From: "david.wu" <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Signed-off-by: david.wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> --- drivers/pinctrl/pinctrl-rockchip.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 9b8d516..91b5051 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -1358,6 +1358,28 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, return ret; } +#define RK3328_SCHMITT_BITS_PER_PIN 1 +#define RK3328_SCHMITT_PINS_PER_REG 16 +#define RK3328_SCHMITT_BANK_STRIDE 8 +#define RK3328_SCHMITT_GRF_OFFSET 0x380 + +static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, + int pin_num, + struct regmap **regmap, + int *reg, u8 *bit) +{ + struct rockchip_pinctrl *info = bank->drvdata; + + *regmap = info->regmap_base; + *reg = RK3328_SCHMITT_GRF_OFFSET; + + *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE; + *reg += ((pin_num / RK3328_SCHMITT_PINS_PER_REG) * 4); + *bit = pin_num % RK3328_SCHMITT_PINS_PER_REG; + + return 0; +} + static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) { struct rockchip_pinctrl *info = bank->drvdata; @@ -2861,6 +2883,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) .pull_calc_reg = rk3228_calc_pull_reg_and_bit, .drv_calc_reg = rk3228_calc_drv_reg_and_bit, .iomux_recalc = rk3328_recalc_mux, + .schmitt_calc_reg = rk3328_calc_schmitt_reg_and_bit, }; static struct rockchip_pin_bank rk3368_pin_banks[] = { -- 1.9.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/2] pinctrl: rockchip: Add input schmitt support for rk3328 @ 2017-03-02 7:11 ` David Wu 0 siblings, 0 replies; 12+ messages in thread From: David Wu @ 2017-03-02 7:11 UTC (permalink / raw) To: heiko, linus.walleij Cc: huangtao, linux-rockchip, linux-gpio, linux-kernel, david.wu From: "david.wu" <david.wu@rock-chips.com> Signed-off-by: david.wu <david.wu@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> --- drivers/pinctrl/pinctrl-rockchip.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 9b8d516..91b5051 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -1358,6 +1358,28 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, return ret; } +#define RK3328_SCHMITT_BITS_PER_PIN 1 +#define RK3328_SCHMITT_PINS_PER_REG 16 +#define RK3328_SCHMITT_BANK_STRIDE 8 +#define RK3328_SCHMITT_GRF_OFFSET 0x380 + +static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, + int pin_num, + struct regmap **regmap, + int *reg, u8 *bit) +{ + struct rockchip_pinctrl *info = bank->drvdata; + + *regmap = info->regmap_base; + *reg = RK3328_SCHMITT_GRF_OFFSET; + + *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE; + *reg += ((pin_num / RK3328_SCHMITT_PINS_PER_REG) * 4); + *bit = pin_num % RK3328_SCHMITT_PINS_PER_REG; + + return 0; +} + static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) { struct rockchip_pinctrl *info = bank->drvdata; @@ -2861,6 +2883,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) .pull_calc_reg = rk3228_calc_pull_reg_and_bit, .drv_calc_reg = rk3228_calc_drv_reg_and_bit, .iomux_recalc = rk3328_recalc_mux, + .schmitt_calc_reg = rk3328_calc_schmitt_reg_and_bit, }; static struct rockchip_pin_bank rk3368_pin_banks[] = { -- 1.9.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
[parent not found: <1488438684-1801-3-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v2 2/2] pinctrl: rockchip: Add input schmitt support for rk3328 2017-03-02 7:11 ` David Wu @ 2017-03-14 13:39 ` Linus Walleij -1 siblings, 0 replies; 12+ messages in thread From: Linus Walleij @ 2017-03-14 13:39 UTC (permalink / raw) To: David Wu Cc: Tao Huang, open list:ARM/Rockchip SoC..., Heiko Stübner, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-gpio-u79uwXL29TY76Z2rM5mHXA On Thu, Mar 2, 2017 at 8:11 AM, David Wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> wrote: > From: "david.wu" <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> > > Signed-off-by: david.wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> > Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> Patch applied. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/2] pinctrl: rockchip: Add input schmitt support for rk3328 @ 2017-03-14 13:39 ` Linus Walleij 0 siblings, 0 replies; 12+ messages in thread From: Linus Walleij @ 2017-03-14 13:39 UTC (permalink / raw) To: David Wu Cc: Heiko Stübner, Tao Huang, open list:ARM/Rockchip SoC..., linux-gpio, linux-kernel On Thu, Mar 2, 2017 at 8:11 AM, David Wu <david.wu@rock-chips.com> wrote: > From: "david.wu" <david.wu@rock-chips.com> > > Signed-off-by: david.wu <david.wu@rock-chips.com> > Reviewed-by: Heiko Stuebner <heiko@sntech.de> Patch applied. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 12+ messages in thread
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2017-03-02 7:11 [PATCH v2 0/2] Add pinctrl input schmitt support David Wu
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2017-03-02 7:11 ` [PATCH v2 1/2] pinctrl: rockchip：Add " David Wu
2017-03-02 7:11 ` David Wu
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2017-03-02 8:30 ` Kever Yang
2017-03-02 8:30 ` Kever Yang
2017-03-14 13:41 ` Linus Walleij
2017-03-14 13:40 ` Linus Walleij
2017-03-14 13:40 ` Linus Walleij
2017-03-02 7:11 ` [PATCH v2 2/2] pinctrl: rockchip: Add input schmitt support for rk3328 David Wu
2017-03-02 7:11 ` David Wu
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2017-03-14 13:39 ` Linus Walleij
2017-03-14 13:39 ` Linus Walleij
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