All of lore.kernel.org
 help / color / mirror / Atom feed
* [U-Boot] [PATCH] sun8i_emac: Fix mdio read sequence
@ 2016-11-16  1:40 Andre Przywara
  2016-11-25 16:18 ` Jagan Teki
  0 siblings, 1 reply; 4+ messages in thread
From: Andre Przywara @ 2016-11-16  1:40 UTC (permalink / raw)
  To: u-boot

From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

To send a parametrized command to the PHY over MDIO, we should write
the data first, the trigger the execution by the command register
write. Fix the access pattern in our MDIO write routine.
Apparently this doesn't really matter with the Realtek PHY on the
Pine64, but other PHYs (which require more setup) will choke on
the wrong order.
[Andre: add commit message]

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/net/sun8i_emac.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 6ac8ba3..abd9cc8 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -180,8 +180,8 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
 	miiaddr |= MDIO_CMD_MII_WRITE;
 	miiaddr |= MDIO_CMD_MII_BUSY;
 
-	writel(miiaddr, priv->mac_reg + EMAC_MII_CMD);
 	writel(val, priv->mac_reg + EMAC_MII_DATA);
+	writel(miiaddr, priv->mac_reg + EMAC_MII_CMD);
 
 	start = get_timer(0);
 	while (get_timer(start) < timeout) {
-- 
2.8.2

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] sun8i_emac: Fix mdio read sequence
  2016-11-16  1:40 [U-Boot] [PATCH] sun8i_emac: Fix mdio read sequence Andre Przywara
@ 2016-11-25 16:18 ` Jagan Teki
  2016-11-25 16:20   ` Dr. Philipp Tomsich
  0 siblings, 1 reply; 4+ messages in thread
From: Jagan Teki @ 2016-11-25 16:18 UTC (permalink / raw)
  To: u-boot

On Wed, Nov 16, 2016 at 7:10 AM, Andre Przywara <andre.przywara@arm.com> wrote:
> From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>
> To send a parametrized command to the PHY over MDIO, we should write
> the data first, the trigger the execution by the command register
> write. Fix the access pattern in our MDIO write routine.
> Apparently this doesn't really matter with the Realtek PHY on the
> Pine64, but other PHYs (which require more setup) will choke on
> the wrong order.

Any tested-by this on non-realtek, because I always remember to have
CMD with DATA sequence for mdio write for most of the PHY's and ie
default sequence though.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] sun8i_emac: Fix mdio read sequence
  2016-11-25 16:18 ` Jagan Teki
@ 2016-11-25 16:20   ` Dr. Philipp Tomsich
  2016-11-28  8:01     ` Jagan Teki
  0 siblings, 1 reply; 4+ messages in thread
From: Dr. Philipp Tomsich @ 2016-11-25 16:20 UTC (permalink / raw)
  To: u-boot

Jagan,

> On 25 Nov 2016, at 17:18, Jagan Teki <jagan@openedev.com> wrote:
> 
> On Wed, Nov 16, 2016 at 7:10 AM, Andre Przywara <andre.przywara@arm.com> wrote:
>> From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>> 
>> To send a parametrized command to the PHY over MDIO, we should write
>> the data first, the trigger the execution by the command register
>> write. Fix the access pattern in our MDIO write routine.
>> Apparently this doesn't really matter with the Realtek PHY on the
>> Pine64, but other PHYs (which require more setup) will choke on
>> the wrong order.
> 
> Any tested-by this on non-realtek, because I always remember to have
> CMD with DATA sequence for mdio write for most of the PHY's and ie
> default sequence though.

We have a KSZ9031 on all our boards? so it was tested against the KSZ9031.

Cheers,
Philipp.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] sun8i_emac: Fix mdio read sequence
  2016-11-25 16:20   ` Dr. Philipp Tomsich
@ 2016-11-28  8:01     ` Jagan Teki
  0 siblings, 0 replies; 4+ messages in thread
From: Jagan Teki @ 2016-11-28  8:01 UTC (permalink / raw)
  To: u-boot

On Fri, Nov 25, 2016 at 9:50 PM, Dr. Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> Jagan,
>
>> On 25 Nov 2016, at 17:18, Jagan Teki <jagan@openedev.com> wrote:
>>
>> On Wed, Nov 16, 2016 at 7:10 AM, Andre Przywara <andre.przywara@arm.com> wrote:
>>> From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
>>>
>>> To send a parametrized command to the PHY over MDIO, we should write
>>> the data first, the trigger the execution by the command register
>>> write. Fix the access pattern in our MDIO write routine.
>>> Apparently this doesn't really matter with the Realtek PHY on the
>>> Pine64, but other PHYs (which require more setup) will choke on
>>> the wrong order.
>>
>> Any tested-by this on non-realtek, because I always remember to have
>> CMD with DATA sequence for mdio write for most of the PHY's and ie
>> default sequence though.
>
> We have a KSZ9031 on all our boards? so it was tested against the KSZ9031.

Applied to u-boot-spi/sunxi

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-11-28  8:01 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-16  1:40 [U-Boot] [PATCH] sun8i_emac: Fix mdio read sequence Andre Przywara
2016-11-25 16:18 ` Jagan Teki
2016-11-25 16:20   ` Dr. Philipp Tomsich
2016-11-28  8:01     ` Jagan Teki

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.