* [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
@ 2019-12-27 5:59 Peter Chen
2020-01-02 11:26 ` Felipe Balbi
2020-01-03 13:36 ` Roger Quadros
0 siblings, 2 replies; 10+ messages in thread
From: Peter Chen @ 2019-12-27 5:59 UTC (permalink / raw)
To: balbi; +Cc: linux-usb, linux-imx, pawell, rogerq, gregkh, Peter Chen
There is a Cadence USB3 core for imx8qm and imx8qxp SoCs, the cdns
core is the child for this glue layer device.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
drivers/usb/cdns3/Kconfig | 10 ++
drivers/usb/cdns3/Makefile | 1 +
drivers/usb/cdns3/cdns3-imx.c | 220 ++++++++++++++++++++++++++++++++++
3 files changed, 231 insertions(+)
create mode 100644 drivers/usb/cdns3/cdns3-imx.c
diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
index 2a1e89d12ed9..b1f526d20f03 100644
--- a/drivers/usb/cdns3/Kconfig
+++ b/drivers/usb/cdns3/Kconfig
@@ -53,4 +53,14 @@ config USB_CDNS3_TI
e.g. J721e.
+config USB_CDNS3_IMX
+ tristate "Cadence USB3 support on NXP i.MX platforms"
+ depends on ARCH_MXC
+ default USB_CDNS3
+ help
+ Say 'Y' or 'M' here if you are building for NXP i.MX
+ platforms that contain Cadence USB3 controller core.
+
+ For example, imx8qm and imx8qxp.
+
endif
diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile
index 948e6b88d1a9..d47e341a6f39 100644
--- a/drivers/usb/cdns3/Makefile
+++ b/drivers/usb/cdns3/Makefile
@@ -15,3 +15,4 @@ cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o
obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci-wrap.o
obj-$(CONFIG_USB_CDNS3_TI) += cdns3-ti.o
+obj-$(CONFIG_USB_CDNS3_IMX) += cdns3-imx.o
diff --git a/drivers/usb/cdns3/cdns3-imx.c b/drivers/usb/cdns3/cdns3-imx.c
new file mode 100644
index 000000000000..53b47306bcc2
--- /dev/null
+++ b/drivers/usb/cdns3/cdns3-imx.c
@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * cdns3-imx.c - NXP i.MX specific Glue layer for Cadence USB Controller
+ *
+ * Copyright (C) 2019 NXP
+ */
+
+#include <linux/bits.h>
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/io.h>
+#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
+#include <linux/iopoll.h>
+
+#define USB3_CORE_CTRL1 0x00
+#define USB3_CORE_CTRL2 0x04
+#define USB3_INT_REG 0x08
+#define USB3_CORE_STATUS 0x0c
+#define XHCI_DEBUG_LINK_ST 0x10
+#define XHCI_DEBUG_BUS 0x14
+#define USB3_SSPHY_CTRL1 0x40
+#define USB3_SSPHY_CTRL2 0x44
+#define USB3_SSPHY_STATUS 0x4c
+#define USB2_PHY_CTRL1 0x50
+#define USB2_PHY_CTRL2 0x54
+#define USB2_PHY_STATUS 0x5c
+
+/* Register bits definition */
+
+/* USB3_CORE_CTRL1 */
+#define SW_RESET_MASK (0x3f << 26)
+#define PWR_SW_RESET (1 << 31)
+#define APB_SW_RESET (1 << 30)
+#define AXI_SW_RESET (1 << 29)
+#define RW_SW_RESET (1 << 28)
+#define PHY_SW_RESET (1 << 27)
+#define PHYAHB_SW_RESET (1 << 26)
+#define ALL_SW_RESET (PWR_SW_RESET | APB_SW_RESET | AXI_SW_RESET | \
+ RW_SW_RESET | PHY_SW_RESET | PHYAHB_SW_RESET)
+#define OC_DISABLE (1 << 9)
+#define MDCTRL_CLK_SEL (1 << 7)
+#define MODE_STRAP_MASK (0x7)
+#define DEV_MODE (1 << 2)
+#define HOST_MODE (1 << 1)
+#define OTG_MODE (1 << 0)
+
+/* USB3_INT_REG */
+#define CLK_125_REQ (1 << 29)
+#define LPM_CLK_REQ (1 << 28)
+#define DEVU3_WAEKUP_EN (1 << 14)
+#define OTG_WAKEUP_EN (1 << 12)
+#define DEV_INT_EN (3 << 8) /* DEV INT b9:8 */
+#define HOST_INT1_EN (1 << 0) /* HOST INT b7:0 */
+
+/* USB3_CORE_STATUS */
+#define MDCTRL_CLK_STATUS (1 << 15)
+#define DEV_POWER_ON_READY (1 << 13)
+#define HOST_POWER_ON_READY (1 << 12)
+
+/* USB3_SSPHY_STATUS */
+#define CLK_VALID_MASK (0x3f << 26)
+#define CLK_VALID_COMPARE_BITS (0xf << 28)
+#define PHY_REFCLK_REQ (1 << 0)
+
+struct cdns_imx {
+ struct device *dev;
+ void __iomem *noncore;
+ struct clk_bulk_data *clks;
+ int num_clks;
+};
+
+static inline u32 cdns_imx_readl(struct cdns_imx *data, u32 offset)
+{
+ return readl(data->noncore + offset);
+}
+
+static inline void cdns_imx_writel(struct cdns_imx *data, u32 offset, u32 value)
+{
+ writel(value, data->noncore + offset);
+}
+
+static const struct clk_bulk_data imx_cdns3_core_clks[] = {
+ { .id = "usb3_lpm_clk" },
+ { .id = "usb3_bus_clk" },
+ { .id = "usb3_aclk" },
+ { .id = "usb3_ipg_clk" },
+ { .id = "usb3_core_pclk" },
+};
+
+static int cdns_imx_noncore_init(struct cdns_imx *data)
+{
+ u32 value;
+ int ret;
+ struct device *dev = data->dev;
+
+ cdns_imx_writel(data, USB3_SSPHY_STATUS, CLK_VALID_MASK);
+ udelay(1);
+ ret = readl_poll_timeout(data->noncore + USB3_SSPHY_STATUS, value,
+ (value & CLK_VALID_COMPARE_BITS) == CLK_VALID_COMPARE_BITS,
+ 10, 100000);
+ if (ret) {
+ dev_err(dev, "wait clkvld timeout\n");
+ return ret;
+ }
+
+ value = cdns_imx_readl(data, USB3_CORE_CTRL1);
+ value |= ALL_SW_RESET;
+ cdns_imx_writel(data, USB3_CORE_CTRL1, value);
+ udelay(1);
+
+ value = cdns_imx_readl(data, USB3_CORE_CTRL1);
+ value = (value & ~MODE_STRAP_MASK) | OTG_MODE | OC_DISABLE;
+ cdns_imx_writel(data, USB3_CORE_CTRL1, value);
+
+ value = cdns_imx_readl(data, USB3_INT_REG);
+ value |= HOST_INT1_EN | DEV_INT_EN;
+ cdns_imx_writel(data, USB3_INT_REG, value);
+
+ value = cdns_imx_readl(data, USB3_CORE_CTRL1);
+ value &= ~ALL_SW_RESET;
+ cdns_imx_writel(data, USB3_CORE_CTRL1, value);
+ return ret;
+}
+
+static int cdns_imx_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->of_node;
+ struct cdns_imx *data;
+ int ret;
+
+ if (!node)
+ return -ENODEV;
+
+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, data);
+ data->dev = dev;
+ data->noncore = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(data->noncore)) {
+ dev_err(dev, "can't map IOMEM resource\n");
+ return PTR_ERR(data->noncore);
+ }
+
+ data->num_clks = ARRAY_SIZE(imx_cdns3_core_clks);
+ data->clks = (struct clk_bulk_data *)imx_cdns3_core_clks;
+ ret = devm_clk_bulk_get(dev, data->num_clks, data->clks);
+ if (ret)
+ return ret;
+
+ ret = clk_bulk_prepare_enable(data->num_clks, data->clks);
+ if (ret)
+ return ret;
+
+ ret = cdns_imx_noncore_init(data);
+ if (ret)
+ goto err;
+
+ ret = of_platform_populate(node, NULL, NULL, dev);
+ if (ret) {
+ dev_err(dev, "failed to create children: %d\n", ret);
+ goto err;
+ }
+
+ return ret;
+
+err:
+ clk_bulk_disable_unprepare(data->num_clks, data->clks);
+ return ret;
+}
+
+static int cdns_imx_remove_core(struct device *dev, void *data)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+
+ platform_device_unregister(pdev);
+
+ return 0;
+}
+
+static int cdns_imx_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+
+ device_for_each_child(dev, NULL, cdns_imx_remove_core);
+ pm_runtime_put_sync(dev);
+ pm_runtime_disable(dev);
+
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static const struct of_device_id cdns_imx_of_match[] = {
+ { .compatible = "fsl,imx8qm-usb3", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cdns_imx_of_match);
+
+static struct platform_driver cdns_imx_driver = {
+ .probe = cdns_imx_probe,
+ .remove = cdns_imx_remove,
+ .driver = {
+ .name = "cdns3-imx",
+ .of_match_table = cdns_imx_of_match,
+ },
+};
+module_platform_driver(cdns_imx_driver);
+
+MODULE_ALIAS("platform:cdns3-imx");
+MODULE_AUTHOR("Peter Chen <peter.chen@nxp.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Cadence USB3 i.MX Glue Layer");
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2019-12-27 5:59 [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer Peter Chen
@ 2020-01-02 11:26 ` Felipe Balbi
2020-01-03 2:31 ` Peter Chen
2020-01-03 13:36 ` Roger Quadros
1 sibling, 1 reply; 10+ messages in thread
From: Felipe Balbi @ 2020-01-02 11:26 UTC (permalink / raw)
To: Peter Chen; +Cc: linux-usb, linux-imx, pawell, rogerq, gregkh, Peter Chen
[-- Attachment #1: Type: text/plain, Size: 952 bytes --]
Peter Chen <peter.chen@nxp.com> writes:
> There is a Cadence USB3 core for imx8qm and imx8qxp SoCs, the cdns
> core is the child for this glue layer device.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
> drivers/usb/cdns3/Kconfig | 10 ++
> drivers/usb/cdns3/Makefile | 1 +
> drivers/usb/cdns3/cdns3-imx.c | 220 ++++++++++++++++++++++++++++++++++
> 3 files changed, 231 insertions(+)
> create mode 100644 drivers/usb/cdns3/cdns3-imx.c
>
> diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
> index 2a1e89d12ed9..b1f526d20f03 100644
> --- a/drivers/usb/cdns3/Kconfig
> +++ b/drivers/usb/cdns3/Kconfig
> @@ -53,4 +53,14 @@ config USB_CDNS3_TI
>
> e.g. J721e.
>
> +config USB_CDNS3_IMX
> + tristate "Cadence USB3 support on NXP i.MX platforms"
> + depends on ARCH_MXC
I want to be able to compile this in any arch. Please add COMPILE_TEST
and make sure it works
--
balbi
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^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-02 11:26 ` Felipe Balbi
@ 2020-01-03 2:31 ` Peter Chen
2020-01-03 2:41 ` Baolin Wang
0 siblings, 1 reply; 10+ messages in thread
From: Peter Chen @ 2020-01-03 2:31 UTC (permalink / raw)
To: Felipe Balbi; +Cc: linux-usb, dl-linux-imx, pawell, rogerq, gregkh
> > ++++++++++++++++++++++++++++++++++
> > 3 files changed, 231 insertions(+)
> > create mode 100644 drivers/usb/cdns3/cdns3-imx.c
> >
> > diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
> > index 2a1e89d12ed9..b1f526d20f03 100644
> > --- a/drivers/usb/cdns3/Kconfig
> > +++ b/drivers/usb/cdns3/Kconfig
> > @@ -53,4 +53,14 @@ config USB_CDNS3_TI
> >
> > e.g. J721e.
> >
> > +config USB_CDNS3_IMX
> > + tristate "Cadence USB3 support on NXP i.MX platforms"
> > + depends on ARCH_MXC
>
> I want to be able to compile this in any arch. Please add COMPILE_TEST and
> make sure it works
>
Hi Felipe,
How to make sure it works? Except for enabling CONFIG_COMPLIE_TEST, what else
I need to do? Thanks.
Peter
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-03 2:31 ` Peter Chen
@ 2020-01-03 2:41 ` Baolin Wang
2020-01-03 3:20 ` Peter Chen
0 siblings, 1 reply; 10+ messages in thread
From: Baolin Wang @ 2020-01-03 2:41 UTC (permalink / raw)
To: Peter Chen; +Cc: Felipe Balbi, linux-usb, dl-linux-imx, pawell, rogerq, gregkh
Hi Peter,
On Fri, Jan 3, 2020 at 10:33 AM Peter Chen <peter.chen@nxp.com> wrote:
>
>
> > > ++++++++++++++++++++++++++++++++++
> > > 3 files changed, 231 insertions(+)
> > > create mode 100644 drivers/usb/cdns3/cdns3-imx.c
> > >
> > > diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
> > > index 2a1e89d12ed9..b1f526d20f03 100644
> > > --- a/drivers/usb/cdns3/Kconfig
> > > +++ b/drivers/usb/cdns3/Kconfig
> > > @@ -53,4 +53,14 @@ config USB_CDNS3_TI
> > >
> > > e.g. J721e.
> > >
> > > +config USB_CDNS3_IMX
> > > + tristate "Cadence USB3 support on NXP i.MX platforms"
> > > + depends on ARCH_MXC
> >
> > I want to be able to compile this in any arch. Please add COMPILE_TEST and
> > make sure it works
> >
>
> Hi Felipe,
>
> How to make sure it works? Except for enabling CONFIG_COMPLIE_TEST, what else
> I need to do? Thanks.
Felipe's suggestion is you should change your config dependency as:
depends on ARCH_MXC || COMPILE_TEST
Then user can compile your driver to find warning or something else
though the ARCH_MXC config is not enabled.
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-03 2:41 ` Baolin Wang
@ 2020-01-03 3:20 ` Peter Chen
2020-01-03 3:35 ` Baolin Wang
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Peter Chen @ 2020-01-03 3:20 UTC (permalink / raw)
To: Baolin Wang; +Cc: Felipe Balbi, linux-usb, dl-linux-imx, pawell, rogerq, gregkh
> > Hi Felipe,
> >
> > How to make sure it works? Except for enabling CONFIG_COMPLIE_TEST,
> > what else I need to do? Thanks.
>
> Felipe's suggestion is you should change your config dependency as:
> depends on ARCH_MXC || COMPILE_TEST
>
> Then user can compile your driver to find warning or something else though the
> ARCH_MXC config is not enabled.
Hi Baolin,
I know that, I have already changed that, unset ARCH_MXC and enable
CONFIG_COMPILE_TEST. What else I could do to make sure it could compile OK
at every architecture?
Peter
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-03 3:20 ` Peter Chen
@ 2020-01-03 3:35 ` Baolin Wang
2020-01-03 8:44 ` gregkh
2020-01-03 9:26 ` Felipe Balbi
2 siblings, 0 replies; 10+ messages in thread
From: Baolin Wang @ 2020-01-03 3:35 UTC (permalink / raw)
To: Peter Chen; +Cc: Felipe Balbi, linux-usb, dl-linux-imx, pawell, rogerq, gregkh
Hi Peter,
On Fri, Jan 3, 2020 at 11:20 AM Peter Chen <peter.chen@nxp.com> wrote:
>
>
> > > Hi Felipe,
> > >
> > > How to make sure it works? Except for enabling CONFIG_COMPLIE_TEST,
> > > what else I need to do? Thanks.
> >
> > Felipe's suggestion is you should change your config dependency as:
> > depends on ARCH_MXC || COMPILE_TEST
> >
> > Then user can compile your driver to find warning or something else though the
> > ARCH_MXC config is not enabled.
>
> Hi Baolin,
>
> I know that, I have already changed that, unset ARCH_MXC and enable
> CONFIG_COMPILE_TEST.
OK. I think this is enough if you can compile successfully.
> What else I could do to make sure it could compile OK
> at every architecture?
I think Felipe's meaning is we should not only compile drivers under
the specific ARCH limitation, we can add COMPILE_TEST dependency to
allow drivers to be complied in any ARCHs. And you've done that, so I
think nothing else need to do here.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-03 3:20 ` Peter Chen
2020-01-03 3:35 ` Baolin Wang
@ 2020-01-03 8:44 ` gregkh
2020-01-03 9:26 ` Felipe Balbi
2 siblings, 0 replies; 10+ messages in thread
From: gregkh @ 2020-01-03 8:44 UTC (permalink / raw)
To: Peter Chen
Cc: Baolin Wang, Felipe Balbi, linux-usb, dl-linux-imx, pawell, rogerq
On Fri, Jan 03, 2020 at 03:20:17AM +0000, Peter Chen wrote:
>
> > > Hi Felipe,
> > >
> > > How to make sure it works? Except for enabling CONFIG_COMPLIE_TEST,
> > > what else I need to do? Thanks.
> >
> > Felipe's suggestion is you should change your config dependency as:
> > depends on ARCH_MXC || COMPILE_TEST
> >
> > Then user can compile your driver to find warning or something else though the
> > ARCH_MXC config is not enabled.
>
> Hi Baolin,
>
> I know that, I have already changed that, unset ARCH_MXC and enable
> CONFIG_COMPILE_TEST. What else I could do to make sure it could compile OK
> at every architecture?
Add that option and then actually build it for all arches :)
thanks,
greg k-h
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-03 3:20 ` Peter Chen
2020-01-03 3:35 ` Baolin Wang
2020-01-03 8:44 ` gregkh
@ 2020-01-03 9:26 ` Felipe Balbi
2 siblings, 0 replies; 10+ messages in thread
From: Felipe Balbi @ 2020-01-03 9:26 UTC (permalink / raw)
To: Peter Chen, Baolin Wang; +Cc: linux-usb, dl-linux-imx, pawell, rogerq, gregkh
[-- Attachment #1: Type: text/plain, Size: 860 bytes --]
Hi,
Peter Chen <peter.chen@nxp.com> writes:
>
>> > Hi Felipe,
>> >
>> > How to make sure it works? Except for enabling CONFIG_COMPLIE_TEST,
>> > what else I need to do? Thanks.
>>
>> Felipe's suggestion is you should change your config dependency as:
>> depends on ARCH_MXC || COMPILE_TEST
>>
>> Then user can compile your driver to find warning or something else though the
>> ARCH_MXC config is not enabled.
>
> Hi Baolin,
>
> I know that, I have already changed that, unset ARCH_MXC and enable
> CONFIG_COMPILE_TEST. What else I could do to make sure it could compile OK
> at every architecture?
If it works fine on ARM and x86 it's rather unlikely that it will break
anywhere else. In any case, once I apply the patch to my tree, it will
be compiled by 0-day build service in several different architectures.
--
balbi
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2019-12-27 5:59 [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer Peter Chen
2020-01-02 11:26 ` Felipe Balbi
@ 2020-01-03 13:36 ` Roger Quadros
2020-01-06 2:45 ` Peter Chen
1 sibling, 1 reply; 10+ messages in thread
From: Roger Quadros @ 2020-01-03 13:36 UTC (permalink / raw)
To: Peter Chen, balbi; +Cc: linux-usb, linux-imx, pawell, gregkh
Hi Peter,
On 27/12/2019 07:59, Peter Chen wrote:
> There is a Cadence USB3 core for imx8qm and imx8qxp SoCs, the cdns
> core is the child for this glue layer device.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
> drivers/usb/cdns3/Kconfig | 10 ++
> drivers/usb/cdns3/Makefile | 1 +
> drivers/usb/cdns3/cdns3-imx.c | 220 ++++++++++++++++++++++++++++++++++
> 3 files changed, 231 insertions(+)
> create mode 100644 drivers/usb/cdns3/cdns3-imx.c
>
> diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
> index 2a1e89d12ed9..b1f526d20f03 100644
> --- a/drivers/usb/cdns3/Kconfig
> +++ b/drivers/usb/cdns3/Kconfig
> @@ -53,4 +53,14 @@ config USB_CDNS3_TI
>
> e.g. J721e.
>
> +config USB_CDNS3_IMX
> + tristate "Cadence USB3 support on NXP i.MX platforms"
> + depends on ARCH_MXC
> + default USB_CDNS3
> + help
> + Say 'Y' or 'M' here if you are building for NXP i.MX
> + platforms that contain Cadence USB3 controller core.
> +
> + For example, imx8qm and imx8qxp.
> +
> endif
> diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile
> index 948e6b88d1a9..d47e341a6f39 100644
> --- a/drivers/usb/cdns3/Makefile
> +++ b/drivers/usb/cdns3/Makefile
> @@ -15,3 +15,4 @@ cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o
>
> obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci-wrap.o
> obj-$(CONFIG_USB_CDNS3_TI) += cdns3-ti.o
> +obj-$(CONFIG_USB_CDNS3_IMX) += cdns3-imx.o
> diff --git a/drivers/usb/cdns3/cdns3-imx.c b/drivers/usb/cdns3/cdns3-imx.c
> new file mode 100644
> index 000000000000..53b47306bcc2
> --- /dev/null
> +++ b/drivers/usb/cdns3/cdns3-imx.c
> @@ -0,0 +1,220 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/**
> + * cdns3-imx.c - NXP i.MX specific Glue layer for Cadence USB Controller
> + *
> + * Copyright (C) 2019 NXP
> + */
> +
> +#include <linux/bits.h>
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/kernel.h>
> +#include <linux/interrupt.h>
> +#include <linux/platform_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/io.h>
> +#include <linux/of_platform.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/iopoll.h>
> +
> +#define USB3_CORE_CTRL1 0x00
> +#define USB3_CORE_CTRL2 0x04
> +#define USB3_INT_REG 0x08
> +#define USB3_CORE_STATUS 0x0c
> +#define XHCI_DEBUG_LINK_ST 0x10
> +#define XHCI_DEBUG_BUS 0x14
> +#define USB3_SSPHY_CTRL1 0x40
> +#define USB3_SSPHY_CTRL2 0x44
> +#define USB3_SSPHY_STATUS 0x4c
> +#define USB2_PHY_CTRL1 0x50
> +#define USB2_PHY_CTRL2 0x54
> +#define USB2_PHY_STATUS 0x5c
> +
> +/* Register bits definition */
> +
> +/* USB3_CORE_CTRL1 */
> +#define SW_RESET_MASK (0x3f << 26)
> +#define PWR_SW_RESET (1 << 31)
You could use BIT() macro here.
> +#define APB_SW_RESET (1 << 30)
> +#define AXI_SW_RESET (1 << 29)
> +#define RW_SW_RESET (1 << 28)
> +#define PHY_SW_RESET (1 << 27)
> +#define PHYAHB_SW_RESET (1 << 26)
> +#define ALL_SW_RESET (PWR_SW_RESET | APB_SW_RESET | AXI_SW_RESET | \
> + RW_SW_RESET | PHY_SW_RESET | PHYAHB_SW_RESET)
> +#define OC_DISABLE (1 << 9)
> +#define MDCTRL_CLK_SEL (1 << 7)
> +#define MODE_STRAP_MASK (0x7)
> +#define DEV_MODE (1 << 2)
> +#define HOST_MODE (1 << 1)
> +#define OTG_MODE (1 << 0)
> +
> +/* USB3_INT_REG */
> +#define CLK_125_REQ (1 << 29)
> +#define LPM_CLK_REQ (1 << 28)
> +#define DEVU3_WAEKUP_EN (1 << 14)
> +#define OTG_WAKEUP_EN (1 << 12)
> +#define DEV_INT_EN (3 << 8) /* DEV INT b9:8 */
> +#define HOST_INT1_EN (1 << 0) /* HOST INT b7:0 */
> +
> +/* USB3_CORE_STATUS */
> +#define MDCTRL_CLK_STATUS (1 << 15)
> +#define DEV_POWER_ON_READY (1 << 13)
> +#define HOST_POWER_ON_READY (1 << 12)
> +
> +/* USB3_SSPHY_STATUS */
> +#define CLK_VALID_MASK (0x3f << 26)
> +#define CLK_VALID_COMPARE_BITS (0xf << 28)
> +#define PHY_REFCLK_REQ (1 << 0)
> +
> +struct cdns_imx {
> + struct device *dev;
> + void __iomem *noncore;
> + struct clk_bulk_data *clks;
> + int num_clks;
> +};
> +
> +static inline u32 cdns_imx_readl(struct cdns_imx *data, u32 offset)
> +{
> + return readl(data->noncore + offset);
> +}
> +
> +static inline void cdns_imx_writel(struct cdns_imx *data, u32 offset, u32 value)
> +{
> + writel(value, data->noncore + offset);
> +}
> +
> +static const struct clk_bulk_data imx_cdns3_core_clks[] = {
> + { .id = "usb3_lpm_clk" },
> + { .id = "usb3_bus_clk" },
> + { .id = "usb3_aclk" },
> + { .id = "usb3_ipg_clk" },
> + { .id = "usb3_core_pclk" },
> +};
> +
> +static int cdns_imx_noncore_init(struct cdns_imx *data)
> +{
> + u32 value;
> + int ret;
> + struct device *dev = data->dev;
> +
> + cdns_imx_writel(data, USB3_SSPHY_STATUS, CLK_VALID_MASK);
> + udelay(1);
> + ret = readl_poll_timeout(data->noncore + USB3_SSPHY_STATUS, value,
> + (value & CLK_VALID_COMPARE_BITS) == CLK_VALID_COMPARE_BITS,
> + 10, 100000);
> + if (ret) {
> + dev_err(dev, "wait clkvld timeout\n");
> + return ret;
> + }
> +
> + value = cdns_imx_readl(data, USB3_CORE_CTRL1);
> + value |= ALL_SW_RESET;
> + cdns_imx_writel(data, USB3_CORE_CTRL1, value);
> + udelay(1);
> +
> + value = cdns_imx_readl(data, USB3_CORE_CTRL1);
> + value = (value & ~MODE_STRAP_MASK) | OTG_MODE | OC_DISABLE;
> + cdns_imx_writel(data, USB3_CORE_CTRL1, value);
> +
> + value = cdns_imx_readl(data, USB3_INT_REG);
> + value |= HOST_INT1_EN | DEV_INT_EN;
> + cdns_imx_writel(data, USB3_INT_REG, value);
> +
> + value = cdns_imx_readl(data, USB3_CORE_CTRL1);
> + value &= ~ALL_SW_RESET;
> + cdns_imx_writel(data, USB3_CORE_CTRL1, value);
> + return ret;
> +}
> +
> +static int cdns_imx_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->of_node;
> + struct cdns_imx *data;
> + int ret;
> +
> + if (!node)
> + return -ENODEV;
> +
> + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + platform_set_drvdata(pdev, data);
> + data->dev = dev;
> + data->noncore = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(data->noncore)) {
> + dev_err(dev, "can't map IOMEM resource\n");
> + return PTR_ERR(data->noncore);
> + }
> +
> + data->num_clks = ARRAY_SIZE(imx_cdns3_core_clks);
> + data->clks = (struct clk_bulk_data *)imx_cdns3_core_clks;
> + ret = devm_clk_bulk_get(dev, data->num_clks, data->clks);
> + if (ret)
> + return ret;
> +
> + ret = clk_bulk_prepare_enable(data->num_clks, data->clks);
> + if (ret)
> + return ret;
> +
> + ret = cdns_imx_noncore_init(data);
> + if (ret)
> + goto err;
> +
> + ret = of_platform_populate(node, NULL, NULL, dev);
> + if (ret) {
> + dev_err(dev, "failed to create children: %d\n", ret);
> + goto err;
> + }
> +
> + return ret;
> +
> +err:
> + clk_bulk_disable_unprepare(data->num_clks, data->clks);
> + return ret;
> +}
> +
> +static int cdns_imx_remove_core(struct device *dev, void *data)
> +{
> + struct platform_device *pdev = to_platform_device(dev);
> +
> + platform_device_unregister(pdev);
> +
> + return 0;
> +}
> +
> +static int cdns_imx_remove(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> +
> + device_for_each_child(dev, NULL, cdns_imx_remove_core);
> + pm_runtime_put_sync(dev);
You didn't do a pm_runtime_get_sync() in probe().
doesn't this complain on module remove?
> + pm_runtime_disable(dev);
> +
What about disabling the bulk clocks that were enabled in probe?
> + platform_set_drvdata(pdev, NULL);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id cdns_imx_of_match[] = {
> + { .compatible = "fsl,imx8qm-usb3", },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, cdns_imx_of_match);
> +
> +static struct platform_driver cdns_imx_driver = {
> + .probe = cdns_imx_probe,
> + .remove = cdns_imx_remove,
> + .driver = {
> + .name = "cdns3-imx",
> + .of_match_table = cdns_imx_of_match,
> + },
> +};
> +module_platform_driver(cdns_imx_driver);
> +
> +MODULE_ALIAS("platform:cdns3-imx");
> +MODULE_AUTHOR("Peter Chen <peter.chen@nxp.com>");
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Cadence USB3 i.MX Glue Layer");
>
--
cheers,
-roger
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer
2020-01-03 13:36 ` Roger Quadros
@ 2020-01-06 2:45 ` Peter Chen
0 siblings, 0 replies; 10+ messages in thread
From: Peter Chen @ 2020-01-06 2:45 UTC (permalink / raw)
To: Roger Quadros; +Cc: balbi, linux-usb, dl-linux-imx, pawell, gregkh
On 20-01-03 15:36:50, Roger Quadros wrote:
> > +/* Register bits definition */
> > +
> > +/* USB3_CORE_CTRL1 */
> > +#define SW_RESET_MASK (0x3f << 26)
> > +#define PWR_SW_RESET (1 << 31)
>
> You could use BIT() macro here.
Ok.
>
> > +#define APB_SW_RESET (1 << 30)
> > +#define AXI_SW_RESET (1 << 29)
> > +#define RW_SW_RESET (1 << 28)
> > +#define PHY_SW_RESET (1 << 27)
> > +#define PHYAHB_SW_RESET (1 << 26)
> > +#define ALL_SW_RESET (PWR_SW_RESET | APB_SW_RESET | AXI_SW_RESET | \
> > + RW_SW_RESET | PHY_SW_RESET | PHYAHB_SW_RESET)
> > +#define OC_DISABLE (1 << 9)
> > +#define MDCTRL_CLK_SEL (1 << 7)
> > +#define MODE_STRAP_MASK (0x7)
> > +#define DEV_MODE (1 << 2)
> > +#define HOST_MODE (1 << 1)
> > +#define OTG_MODE (1 << 0)
> > +
> > +/* USB3_INT_REG */
> > +#define CLK_125_REQ (1 << 29)
> > +#define LPM_CLK_REQ (1 << 28)
> > +#define DEVU3_WAEKUP_EN (1 << 14)
> > +#define OTG_WAKEUP_EN (1 << 12)
> > +#define DEV_INT_EN (3 << 8) /* DEV INT b9:8 */
> > +#define HOST_INT1_EN (1 << 0) /* HOST INT b7:0 */
> > +
> > +/* USB3_CORE_STATUS */
> > +#define MDCTRL_CLK_STATUS (1 << 15)
> > +#define DEV_POWER_ON_READY (1 << 13)
> > +#define HOST_POWER_ON_READY (1 << 12)
> > +
> > +/* USB3_SSPHY_STATUS */
> > +#define CLK_VALID_MASK (0x3f << 26)
> > +#define CLK_VALID_COMPARE_BITS (0xf << 28)
> > +#define PHY_REFCLK_REQ (1 << 0)
> > +
> > +struct cdns_imx {
> > + struct device *dev;
> > + void __iomem *noncore;
> > + struct clk_bulk_data *clks;
> > + int num_clks;
> > +};
> > +
> > +static inline u32 cdns_imx_readl(struct cdns_imx *data, u32 offset)
> > +{
> > + return readl(data->noncore + offset);
> > +}
> > +
> > +static inline void cdns_imx_writel(struct cdns_imx *data, u32 offset, u32 value)
> > +{
> > + writel(value, data->noncore + offset);
> > +}
> > +
> > +static const struct clk_bulk_data imx_cdns3_core_clks[] = {
> > + { .id = "usb3_lpm_clk" },
> > + { .id = "usb3_bus_clk" },
> > + { .id = "usb3_aclk" },
> > + { .id = "usb3_ipg_clk" },
> > + { .id = "usb3_core_pclk" },
> > +};
> > +
> > +static int cdns_imx_noncore_init(struct cdns_imx *data)
> > +{
> > + u32 value;
> > + int ret;
> > + struct device *dev = data->dev;
> > +
> > + cdns_imx_writel(data, USB3_SSPHY_STATUS, CLK_VALID_MASK);
> > + udelay(1);
> > + ret = readl_poll_timeout(data->noncore + USB3_SSPHY_STATUS, value,
> > + (value & CLK_VALID_COMPARE_BITS) == CLK_VALID_COMPARE_BITS,
> > + 10, 100000);
> > + if (ret) {
> > + dev_err(dev, "wait clkvld timeout\n");
> > + return ret;
> > + }
> > +
> > + value = cdns_imx_readl(data, USB3_CORE_CTRL1);
> > + value |= ALL_SW_RESET;
> > + cdns_imx_writel(data, USB3_CORE_CTRL1, value);
> > + udelay(1);
> > +
> > + value = cdns_imx_readl(data, USB3_CORE_CTRL1);
> > + value = (value & ~MODE_STRAP_MASK) | OTG_MODE | OC_DISABLE;
> > + cdns_imx_writel(data, USB3_CORE_CTRL1, value);
> > +
> > + value = cdns_imx_readl(data, USB3_INT_REG);
> > + value |= HOST_INT1_EN | DEV_INT_EN;
> > + cdns_imx_writel(data, USB3_INT_REG, value);
> > +
> > + value = cdns_imx_readl(data, USB3_CORE_CTRL1);
> > + value &= ~ALL_SW_RESET;
> > + cdns_imx_writel(data, USB3_CORE_CTRL1, value);
> > + return ret;
> > +}
> > +
> > +static int cdns_imx_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->of_node;
> > + struct cdns_imx *data;
> > + int ret;
> > +
> > + if (!node)
> > + return -ENODEV;
> > +
> > + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> > + if (!data)
> > + return -ENOMEM;
> > +
> > + platform_set_drvdata(pdev, data);
> > + data->dev = dev;
> > + data->noncore = devm_platform_ioremap_resource(pdev, 0);
> > + if (IS_ERR(data->noncore)) {
> > + dev_err(dev, "can't map IOMEM resource\n");
> > + return PTR_ERR(data->noncore);
> > + }
> > +
> > + data->num_clks = ARRAY_SIZE(imx_cdns3_core_clks);
> > + data->clks = (struct clk_bulk_data *)imx_cdns3_core_clks;
> > + ret = devm_clk_bulk_get(dev, data->num_clks, data->clks);
> > + if (ret)
> > + return ret;
> > +
> > + ret = clk_bulk_prepare_enable(data->num_clks, data->clks);
> > + if (ret)
> > + return ret;
> > +
> > + ret = cdns_imx_noncore_init(data);
> > + if (ret)
> > + goto err;
> > +
> > + ret = of_platform_populate(node, NULL, NULL, dev);
> > + if (ret) {
> > + dev_err(dev, "failed to create children: %d\n", ret);
> > + goto err;
> > + }
> > +
> > + return ret;
> > +
> > +err:
> > + clk_bulk_disable_unprepare(data->num_clks, data->clks);
> > + return ret;
> > +}
> > +
> > +static int cdns_imx_remove_core(struct device *dev, void *data)
> > +{
> > + struct platform_device *pdev = to_platform_device(dev);
> > +
> > + platform_device_unregister(pdev);
> > +
> > + return 0;
> > +}
> > +
> > +static int cdns_imx_remove(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > +
> > + device_for_each_child(dev, NULL, cdns_imx_remove_core);
> > + pm_runtime_put_sync(dev);
>
> You didn't do a pm_runtime_get_sync() in probe().
> doesn't this complain on module remove?
>
> > + pm_runtime_disable(dev);
> > +
>
> What about disabling the bulk clocks that were enabled in probe?
I will remove all runtime pm operations since it is not supported
well for current submitted version, and add clock disable operation
at .remove.
Thanks for reviewing, Roger.
Peter
>
> > + platform_set_drvdata(pdev, NULL);
> > +
> > + return 0;
> > +}
> > +
> > +static const struct of_device_id cdns_imx_of_match[] = {
> > + { .compatible = "fsl,imx8qm-usb3", },
> > + {},
> > +};
> > +MODULE_DEVICE_TABLE(of, cdns_imx_of_match);
> > +
> > +static struct platform_driver cdns_imx_driver = {
> > + .probe = cdns_imx_probe,
> > + .remove = cdns_imx_remove,
> > + .driver = {
> > + .name = "cdns3-imx",
> > + .of_match_table = cdns_imx_of_match,
> > + },
> > +};
> > +module_platform_driver(cdns_imx_driver);
> > +
> > +MODULE_ALIAS("platform:cdns3-imx");
> > +MODULE_AUTHOR("Peter Chen <peter.chen@nxp.com>");
> > +MODULE_LICENSE("GPL v2");
> > +MODULE_DESCRIPTION("Cadence USB3 i.MX Glue Layer");
> >
>
> --
> cheers,
> -roger
>
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
--
Thanks,
Peter Chen
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-01-06 2:45 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-12-27 5:59 [PATCH 1/1] usb: cdns3: add NXP imx8qm glue layer Peter Chen
2020-01-02 11:26 ` Felipe Balbi
2020-01-03 2:31 ` Peter Chen
2020-01-03 2:41 ` Baolin Wang
2020-01-03 3:20 ` Peter Chen
2020-01-03 3:35 ` Baolin Wang
2020-01-03 8:44 ` gregkh
2020-01-03 9:26 ` Felipe Balbi
2020-01-03 13:36 ` Roger Quadros
2020-01-06 2:45 ` Peter Chen
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