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* [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-30 15:33 ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: dri-devel, linux-kernel, Christian König, Huacai Chen,
	Dan Horák, Alex Deucher, David Airlie, Xℹ Ruoyao

In AMDGPU driver, the bo mapping should always align to CPU page or
the page table is corrupted.

The first patch is cherry-picked from Loongson community, which sets a
suitable dev_info.gart_page_size so Mesa will handle the alignment
correctly.

The second patch is added to ensure an ioctl with unaligned parameter to
be rejected -EINVAL, instead of causing page table corruption.

The patches should be applied for drm-next.

Huacai Chen (1):
  drm/amdgpu: Set a suitable dev_info.gart_page_size

Xℹ Ruoyao (1):
  drm/amdgpu: check alignment on CPU page for bo map

 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)


base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0
-- 
2.31.1


^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-30 15:33 ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Xℹ Ruoyao, Alex Deucher,
	Christian König

In AMDGPU driver, the bo mapping should always align to CPU page or
the page table is corrupted.

The first patch is cherry-picked from Loongson community, which sets a
suitable dev_info.gart_page_size so Mesa will handle the alignment
correctly.

The second patch is added to ensure an ioctl with unaligned parameter to
be rejected -EINVAL, instead of causing page table corruption.

The patches should be applied for drm-next.

Huacai Chen (1):
  drm/amdgpu: Set a suitable dev_info.gart_page_size

Xℹ Ruoyao (1):
  drm/amdgpu: check alignment on CPU page for bo map

 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)


base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0
-- 
2.31.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-30 15:33 ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Xℹ Ruoyao, Alex Deucher,
	Christian König

In AMDGPU driver, the bo mapping should always align to CPU page or
the page table is corrupted.

The first patch is cherry-picked from Loongson community, which sets a
suitable dev_info.gart_page_size so Mesa will handle the alignment
correctly.

The second patch is added to ensure an ioctl with unaligned parameter to
be rejected -EINVAL, instead of causing page table corruption.

The patches should be applied for drm-next.

Huacai Chen (1):
  drm/amdgpu: Set a suitable dev_info.gart_page_size

Xℹ Ruoyao (1):
  drm/amdgpu: check alignment on CPU page for bo map

 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)


base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0
-- 
2.31.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH 1/2] drm/amdgpu: Set a suitable dev_info.gart_page_size
  2021-03-30 15:33 ` Xℹ Ruoyao
  (?)
@ 2021-03-30 15:33   ` Xℹ Ruoyao
  -1 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: dri-devel, linux-kernel, Christian König, Huacai Chen,
	Dan Horák, Alex Deucher, David Airlie, Huacai Chen,
	Rui Wang, Xi Ruoyao, stable

From: Huacai Chen <chenhc@lemote.com>

In Mesa, dev_info.gart_page_size is used for alignment and it was
set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU
driver requires an alignment on CPU pages.  So, for non-4KB page system,
gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE).

Signed-off-by: Rui Wang <wangr@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1
[Xi: rebased for drm-next, use max_t for checkpatch,
     and reworded commit message.]
Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549
Tested-by: Dan Horák <dan@danny.cz>
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 86eeeb4f3513..3b0be64e4638 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -791,9 +791,9 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 			dev_info->high_va_offset = AMDGPU_GMC_HOLE_END;
 			dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size;
 		}
-		dev_info->virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
+		dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
 		dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
-		dev_info->gart_page_size = AMDGPU_GPU_PAGE_SIZE;
+		dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
 		dev_info->cu_active_number = adev->gfx.cu_info.number;
 		dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;
 		dev_info->ce_ram_size = adev->gfx.ce_ram_size;
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH 1/2] drm/amdgpu: Set a suitable dev_info.gart_page_size
@ 2021-03-30 15:33   ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: Rui Wang, Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Xi Ruoyao, Alex Deucher, Huacai Chen, stable,
	Christian König

From: Huacai Chen <chenhc@lemote.com>

In Mesa, dev_info.gart_page_size is used for alignment and it was
set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU
driver requires an alignment on CPU pages.  So, for non-4KB page system,
gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE).

Signed-off-by: Rui Wang <wangr@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1
[Xi: rebased for drm-next, use max_t for checkpatch,
     and reworded commit message.]
Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549
Tested-by: Dan Horák <dan@danny.cz>
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 86eeeb4f3513..3b0be64e4638 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -791,9 +791,9 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 			dev_info->high_va_offset = AMDGPU_GMC_HOLE_END;
 			dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size;
 		}
-		dev_info->virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
+		dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
 		dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
-		dev_info->gart_page_size = AMDGPU_GPU_PAGE_SIZE;
+		dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
 		dev_info->cu_active_number = adev->gfx.cu_info.number;
 		dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;
 		dev_info->ce_ram_size = adev->gfx.ce_ram_size;
-- 
2.31.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH 1/2] drm/amdgpu: Set a suitable dev_info.gart_page_size
@ 2021-03-30 15:33   ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: Rui Wang, Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Xi Ruoyao, Alex Deucher, Huacai Chen, stable,
	Christian König

From: Huacai Chen <chenhc@lemote.com>

In Mesa, dev_info.gart_page_size is used for alignment and it was
set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU
driver requires an alignment on CPU pages.  So, for non-4KB page system,
gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE).

Signed-off-by: Rui Wang <wangr@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1
[Xi: rebased for drm-next, use max_t for checkpatch,
     and reworded commit message.]
Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549
Tested-by: Dan Horák <dan@danny.cz>
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 86eeeb4f3513..3b0be64e4638 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -791,9 +791,9 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 			dev_info->high_va_offset = AMDGPU_GMC_HOLE_END;
 			dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size;
 		}
-		dev_info->virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
+		dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
 		dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
-		dev_info->gart_page_size = AMDGPU_GPU_PAGE_SIZE;
+		dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
 		dev_info->cu_active_number = adev->gfx.cu_info.number;
 		dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;
 		dev_info->ce_ram_size = adev->gfx.ce_ram_size;
-- 
2.31.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH 2/2] drm/amdgpu: check alignment on CPU page for bo map
  2021-03-30 15:33 ` Xℹ Ruoyao
  (?)
@ 2021-03-30 15:33   ` Xℹ Ruoyao
  -1 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: dri-devel, linux-kernel, Christian König, Huacai Chen,
	Dan Horák, Alex Deucher, David Airlie, Xℹ Ruoyao

The page table of AMDGPU requires an alignment to CPU page so we should
check ioctl parameters for it.  Return -EINVAL if some parameter is
unaligned to CPU page, instead of corrupt the page table sliently.

Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index dc4d6ae71476..a01c158bc29f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2198,8 +2198,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 	uint64_t eaddr;
 
 	/* validate the parameters */
-	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
-	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)
+	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||
+	    size == 0 || size & ~PAGE_MASK)
 		return -EINVAL;
 
 	/* make sure object fit at this offset */
@@ -2264,8 +2264,8 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev,
 	int r;
 
 	/* validate the parameters */
-	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
-	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)
+	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||
+	    size == 0 || size & ~PAGE_MASK)
 		return -EINVAL;
 
 	/* make sure object fit at this offset */
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH 2/2] drm/amdgpu: check alignment on CPU page for bo map
@ 2021-03-30 15:33   ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Xℹ Ruoyao, Alex Deucher,
	Christian König

The page table of AMDGPU requires an alignment to CPU page so we should
check ioctl parameters for it.  Return -EINVAL if some parameter is
unaligned to CPU page, instead of corrupt the page table sliently.

Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index dc4d6ae71476..a01c158bc29f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2198,8 +2198,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 	uint64_t eaddr;
 
 	/* validate the parameters */
-	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
-	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)
+	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||
+	    size == 0 || size & ~PAGE_MASK)
 		return -EINVAL;
 
 	/* make sure object fit at this offset */
@@ -2264,8 +2264,8 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev,
 	int r;
 
 	/* validate the parameters */
-	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
-	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)
+	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||
+	    size == 0 || size & ~PAGE_MASK)
 		return -EINVAL;
 
 	/* make sure object fit at this offset */
-- 
2.31.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH 2/2] drm/amdgpu: check alignment on CPU page for bo map
@ 2021-03-30 15:33   ` Xℹ Ruoyao
  0 siblings, 0 replies; 15+ messages in thread
From: Xℹ Ruoyao @ 2021-03-30 15:33 UTC (permalink / raw)
  To: amd-gfx
  Cc: Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Xℹ Ruoyao, Alex Deucher,
	Christian König

The page table of AMDGPU requires an alignment to CPU page so we should
check ioctl parameters for it.  Return -EINVAL if some parameter is
unaligned to CPU page, instead of corrupt the page table sliently.

Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index dc4d6ae71476..a01c158bc29f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2198,8 +2198,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 	uint64_t eaddr;
 
 	/* validate the parameters */
-	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
-	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)
+	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||
+	    size == 0 || size & ~PAGE_MASK)
 		return -EINVAL;
 
 	/* make sure object fit at this offset */
@@ -2264,8 +2264,8 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev,
 	int r;
 
 	/* validate the parameters */
-	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
-	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)
+	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||
+	    size == 0 || size & ~PAGE_MASK)
 		return -EINVAL;
 
 	/* make sure object fit at this offset */
-- 
2.31.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 15+ messages in thread
* Re: [PATCH 0/2] ensure alignment on CPU page for bo mapping
  2021-03-30 15:33 ` Xℹ Ruoyao
  (?)
@ 2021-03-30 16:21   ` Christian König
  -1 siblings, 0 replies; 15+ messages in thread
From: Christian König @ 2021-03-30 16:21 UTC (permalink / raw)
  To: Xℹ Ruoyao, amd-gfx
  Cc: dri-devel, linux-kernel, Huacai Chen, Dan Horák,
	Alex Deucher, David Airlie

Reviewed-by: Christian König <christian.koenig@amd.com> for the entire 
series.

Alex will probably pick them up for the next feature pull request.

Regards,
Christian.

Am 30.03.21 um 17:33 schrieb Xℹ Ruoyao:
> In AMDGPU driver, the bo mapping should always align to CPU page or
> the page table is corrupted.
>
> The first patch is cherry-picked from Loongson community, which sets a
> suitable dev_info.gart_page_size so Mesa will handle the alignment
> correctly.
>
> The second patch is added to ensure an ioctl with unaligned parameter to
> be rejected -EINVAL, instead of causing page table corruption.
>
> The patches should be applied for drm-next.
>
> Huacai Chen (1):
>    drm/amdgpu: Set a suitable dev_info.gart_page_size
>
> Xℹ Ruoyao (1):
>    drm/amdgpu: check alignment on CPU page for bo map
>
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
>
> base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0


^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-30 16:21   ` Christian König
  0 siblings, 0 replies; 15+ messages in thread
From: Christian König @ 2021-03-30 16:21 UTC (permalink / raw)
  To: Xℹ Ruoyao, amd-gfx
  Cc: Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Alex Deucher

Reviewed-by: Christian König <christian.koenig@amd.com> for the entire 
series.

Alex will probably pick them up for the next feature pull request.

Regards,
Christian.

Am 30.03.21 um 17:33 schrieb Xℹ Ruoyao:
> In AMDGPU driver, the bo mapping should always align to CPU page or
> the page table is corrupted.
>
> The first patch is cherry-picked from Loongson community, which sets a
> suitable dev_info.gart_page_size so Mesa will handle the alignment
> correctly.
>
> The second patch is added to ensure an ioctl with unaligned parameter to
> be rejected -EINVAL, instead of causing page table corruption.
>
> The patches should be applied for drm-next.
>
> Huacai Chen (1):
>    drm/amdgpu: Set a suitable dev_info.gart_page_size
>
> Xℹ Ruoyao (1):
>    drm/amdgpu: check alignment on CPU page for bo map
>
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
>
> base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-30 16:21   ` Christian König
  0 siblings, 0 replies; 15+ messages in thread
From: Christian König @ 2021-03-30 16:21 UTC (permalink / raw)
  To: Xℹ Ruoyao, amd-gfx
  Cc: Dan Horák, Huacai Chen, linux-kernel, dri-devel,
	David Airlie, Alex Deucher

Reviewed-by: Christian König <christian.koenig@amd.com> for the entire 
series.

Alex will probably pick them up for the next feature pull request.

Regards,
Christian.

Am 30.03.21 um 17:33 schrieb Xℹ Ruoyao:
> In AMDGPU driver, the bo mapping should always align to CPU page or
> the page table is corrupted.
>
> The first patch is cherry-picked from Loongson community, which sets a
> suitable dev_info.gart_page_size so Mesa will handle the alignment
> correctly.
>
> The second patch is added to ensure an ioctl with unaligned parameter to
> be rejected -EINVAL, instead of causing page table corruption.
>
> The patches should be applied for drm-next.
>
> Huacai Chen (1):
>    drm/amdgpu: Set a suitable dev_info.gart_page_size
>
> Xℹ Ruoyao (1):
>    drm/amdgpu: check alignment on CPU page for bo map
>
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
>
> base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH 0/2] ensure alignment on CPU page for bo mapping
  2021-03-30 16:21   ` Christian König
  (?)
@ 2021-03-31  2:05     ` Alex Deucher
  -1 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2021-03-31  2:05 UTC (permalink / raw)
  To: Christian König
  Cc: Xℹ Ruoyao, amd-gfx list, Dan Horák, Huacai Chen, LKML,
	Maling list - DRI developers, David Airlie, Alex Deucher

Applied.  Thanks!

Alex

On Tue, Mar 30, 2021 at 12:21 PM Christian König
<christian.koenig@amd.com> wrote:
>
> Reviewed-by: Christian König <christian.koenig@amd.com> for the entire
> series.
>
> Alex will probably pick them up for the next feature pull request.
>
> Regards,
> Christian.
>
> Am 30.03.21 um 17:33 schrieb Xℹ Ruoyao:
> > In AMDGPU driver, the bo mapping should always align to CPU page or
> > the page table is corrupted.
> >
> > The first patch is cherry-picked from Loongson community, which sets a
> > suitable dev_info.gart_page_size so Mesa will handle the alignment
> > correctly.
> >
> > The second patch is added to ensure an ioctl with unaligned parameter to
> > be rejected -EINVAL, instead of causing page table corruption.
> >
> > The patches should be applied for drm-next.
> >
> > Huacai Chen (1):
> >    drm/amdgpu: Set a suitable dev_info.gart_page_size
> >
> > Xℹ Ruoyao (1):
> >    drm/amdgpu: check alignment on CPU page for bo map
> >
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
> >   2 files changed, 6 insertions(+), 6 deletions(-)
> >
> >
> > base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-31  2:05     ` Alex Deucher
  0 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2021-03-31  2:05 UTC (permalink / raw)
  To: Christian König
  Cc: amd-gfx list, Dan Horák, Huacai Chen, LKML,
	Maling list - DRI developers, David Airlie, Xℹ Ruoyao,
	Alex Deucher

Applied.  Thanks!

Alex

On Tue, Mar 30, 2021 at 12:21 PM Christian König
<christian.koenig@amd.com> wrote:
>
> Reviewed-by: Christian König <christian.koenig@amd.com> for the entire
> series.
>
> Alex will probably pick them up for the next feature pull request.
>
> Regards,
> Christian.
>
> Am 30.03.21 um 17:33 schrieb Xℹ Ruoyao:
> > In AMDGPU driver, the bo mapping should always align to CPU page or
> > the page table is corrupted.
> >
> > The first patch is cherry-picked from Loongson community, which sets a
> > suitable dev_info.gart_page_size so Mesa will handle the alignment
> > correctly.
> >
> > The second patch is added to ensure an ioctl with unaligned parameter to
> > be rejected -EINVAL, instead of causing page table corruption.
> >
> > The patches should be applied for drm-next.
> >
> > Huacai Chen (1):
> >    drm/amdgpu: Set a suitable dev_info.gart_page_size
> >
> > Xℹ Ruoyao (1):
> >    drm/amdgpu: check alignment on CPU page for bo map
> >
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
> >   2 files changed, 6 insertions(+), 6 deletions(-)
> >
> >
> > base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH 0/2] ensure alignment on CPU page for bo mapping
@ 2021-03-31  2:05     ` Alex Deucher
  0 siblings, 0 replies; 15+ messages in thread
From: Alex Deucher @ 2021-03-31  2:05 UTC (permalink / raw)
  To: Christian König
  Cc: amd-gfx list, Dan Horák, Huacai Chen, LKML,
	Maling list - DRI developers, David Airlie, Xℹ Ruoyao,
	Alex Deucher

Applied.  Thanks!

Alex

On Tue, Mar 30, 2021 at 12:21 PM Christian König
<christian.koenig@amd.com> wrote:
>
> Reviewed-by: Christian König <christian.koenig@amd.com> for the entire
> series.
>
> Alex will probably pick them up for the next feature pull request.
>
> Regards,
> Christian.
>
> Am 30.03.21 um 17:33 schrieb Xℹ Ruoyao:
> > In AMDGPU driver, the bo mapping should always align to CPU page or
> > the page table is corrupted.
> >
> > The first patch is cherry-picked from Loongson community, which sets a
> > suitable dev_info.gart_page_size so Mesa will handle the alignment
> > correctly.
> >
> > The second patch is added to ensure an ioctl with unaligned parameter to
> > be rejected -EINVAL, instead of causing page table corruption.
> >
> > The patches should be applied for drm-next.
> >
> > Huacai Chen (1):
> >    drm/amdgpu: Set a suitable dev_info.gart_page_size
> >
> > Xℹ Ruoyao (1):
> >    drm/amdgpu: check alignment on CPU page for bo map
> >
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 ++++----
> >   2 files changed, 6 insertions(+), 6 deletions(-)
> >
> >
> > base-commit: a0c8b193bfe81cc8e9c7c162bb8d777ba12596f0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 15+ messages in thread
end of thread, other threads:[~2021-03-31  2:07 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-30 15:33 [PATCH 0/2] ensure alignment on CPU page for bo mapping Xℹ Ruoyao
2021-03-30 15:33 ` Xℹ Ruoyao
2021-03-30 15:33 ` Xℹ Ruoyao
2021-03-30 15:33 ` [PATCH 1/2] drm/amdgpu: Set a suitable dev_info.gart_page_size Xℹ Ruoyao
2021-03-30 15:33   ` Xℹ Ruoyao
2021-03-30 15:33   ` Xℹ Ruoyao
2021-03-30 15:33 ` [PATCH 2/2] drm/amdgpu: check alignment on CPU page for bo map Xℹ Ruoyao
2021-03-30 15:33   ` Xℹ Ruoyao
2021-03-30 15:33   ` Xℹ Ruoyao
2021-03-30 16:21 ` [PATCH 0/2] ensure alignment on CPU page for bo mapping Christian König
2021-03-30 16:21   ` Christian König
2021-03-30 16:21   ` Christian König
2021-03-31  2:05   ` Alex Deucher
2021-03-31  2:05     ` Alex Deucher
2021-03-31  2:05     ` Alex Deucher

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