[PATCH] gpio: brcmstb: Do not use gc->pin2mask()

[PATCH] gpio: brcmstb: Do not use gc->pin2mask()

[Linus Walleij]

The pin2mask() accessor only shuffles BIT ORDER in big endian systems,
i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or
bit 15 or bit 31 or so.

The brcmstb only uses big endian BYTE ORDER which will be taken car of
by the ->write_reg() callback.

Just use BIT(offset) to assign the bit.

Cc: Gregory Fong <gregory.0xf0@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/gpio/gpio-brcmstb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index 27e92e57adae..9b8fcca7ad17 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -20,6 +20,7 @@
 #include <linux/irqchip/chained_irq.h>
 #include <linux/interrupt.h>
 #include <linux/reboot.h>
+#include <linux/bitops.h>
 
 #define GIO_BANK_SIZE           0x20
 #define GIO_ODEN(bank)          (((bank) * GIO_BANK_SIZE) + 0x00)
@@ -68,16 +69,15 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
 {
 	struct gpio_chip *gc = &bank->gc;
 	struct brcmstb_gpio_priv *priv = bank->parent_priv;
-	u32 mask = gc->pin2mask(gc, offset);
 	u32 imask;
 	unsigned long flags;
 
 	spin_lock_irqsave(&gc->bgpio_lock, flags);
 	imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id));
 	if (enable)
-		imask |= mask;
+		imask |= BIT(offset);
 	else
-		imask &= ~mask;
+		imask &= ~BIT(offset);
 	gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
 	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
-- 
2.13.6

Re: [PATCH] gpio: brcmstb: Do not use gc->pin2mask()

[Gregory Fong]

Hi Linus,

On Fri, Oct 20, 2017 at 6:48 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> The pin2mask() accessor only shuffles BIT ORDER in big endian systems,
> i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or
> bit 15 or bit 31 or so.
>
> The brcmstb only uses big endian BYTE ORDER which will be taken car of
> by the ->write_reg() callback.
>
> Just use BIT(offset) to assign the bit.

I believe the patches that Doug is putting together already take care
of this, would you be OK with it being handled in there instead?

Thanks,
Gregory

Re: [PATCH] gpio: brcmstb: Do not use gc->pin2mask()

[Linus Walleij]

On Fri, Oct 20, 2017 at 5:51 PM, Gregory Fong <gregory.0xf0@gmail.com> wrote:
> Hi Linus,
>
> On Fri, Oct 20, 2017 at 6:48 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>> The pin2mask() accessor only shuffles BIT ORDER in big endian systems,
>> i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or
>> bit 15 or bit 31 or so.
>>
>> The brcmstb only uses big endian BYTE ORDER which will be taken car of
>> by the ->write_reg() callback.
>>
>> Just use BIT(offset) to assign the bit.
>
> I believe the patches that Doug is putting together already take care
> of this, would you be OK with it being handled in there instead?

I would prefer that those changes base on top of this instead.

I need to get rid of ->pin2mask() for other GPIO improvements in
the core, like supporting .get_multiple() in gpio-mmio.

I can apply this to the devel branch per immediately so Doug can base
his work on top of it.

Yours,
Linus Walleij

Re: [PATCH] gpio: brcmstb: Do not use gc->pin2mask()

[Gregory Fong]

On Fri, Oct 20, 2017 at 9:39 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Oct 20, 2017 at 5:51 PM, Gregory Fong <gregory.0xf0@gmail.com> wrote:
>> Hi Linus,
>>
>> On Fri, Oct 20, 2017 at 6:48 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>>> The pin2mask() accessor only shuffles BIT ORDER in big endian systems,
>>> i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or
>>> bit 15 or bit 31 or so.
>>>
>>> The brcmstb only uses big endian BYTE ORDER which will be taken car of
>>> by the ->write_reg() callback.
>>>
>>> Just use BIT(offset) to assign the bit.
>>
>> I believe the patches that Doug is putting together already take care
>> of this, would you be OK with it being handled in there instead?
>
> I would prefer that those changes base on top of this instead.
>
> I need to get rid of ->pin2mask() for other GPIO improvements in
> the core, like supporting .get_multiple() in gpio-mmio.
>
> I can apply this to the devel branch per immediately so Doug can base
> his work on top of it.

Makes sense.  Feel free to throw this on if you want:

Acked-by: Gregory Fong <gregory.0xf0@gmail.com>

Re: [PATCH] gpio: brcmstb: Do not use gc->pin2mask()

[Florian Fainelli]

On 10/20/2017 06:48 AM, Linus Walleij wrote:
> The pin2mask() accessor only shuffles BIT ORDER in big endian systems,
> i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or
> bit 15 or bit 31 or so.
> 
> The brcmstb only uses big endian BYTE ORDER which will be taken car of
> by the ->write_reg() callback.
> 
> Just use BIT(offset) to assign the bit.
> 
> Cc: Gregory Fong <gregory.0xf0@gmail.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>

> ---
>  drivers/gpio/gpio-brcmstb.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
> index 27e92e57adae..9b8fcca7ad17 100644
> --- a/drivers/gpio/gpio-brcmstb.c
> +++ b/drivers/gpio/gpio-brcmstb.c
> @@ -20,6 +20,7 @@
>  #include <linux/irqchip/chained_irq.h>
>  #include <linux/interrupt.h>
>  #include <linux/reboot.h>
> +#include <linux/bitops.h>
>  
>  #define GIO_BANK_SIZE           0x20
>  #define GIO_ODEN(bank)          (((bank) * GIO_BANK_SIZE) + 0x00)
> @@ -68,16 +69,15 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
>  {
>  	struct gpio_chip *gc = &bank->gc;
>  	struct brcmstb_gpio_priv *priv = bank->parent_priv;
> -	u32 mask = gc->pin2mask(gc, offset);
>  	u32 imask;
>  	unsigned long flags;
>  
>  	spin_lock_irqsave(&gc->bgpio_lock, flags);
>  	imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id));
>  	if (enable)
> -		imask |= mask;
> +		imask |= BIT(offset);
>  	else
> -		imask &= ~mask;
> +		imask &= ~BIT(offset);
>  	gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
>  	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> 

-- 
Florian