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From: Peter Maydell <peter.maydell@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	QEMU Developers <qemu-devel@nongnu.org>,
	kvm-devel <kvm@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed
Date: Thu, 12 Mar 2015 15:51:50 +0000	[thread overview]
Message-ID: <CAFEAcA-RhZVe1qwKQ3LzfWbzYVcBQ-jrwTnhH0OX69GNtnoysw@mail.gmail.com> (raw)
In-Reply-To: <1425479753-18349-4-git-send-email-alex.bennee@linaro.org>

On 4 March 2015 at 14:35, Alex Bennée <alex.bennee@linaro.org> wrote:
> While observing KVM traces I can see additional IRQ calls on pretty much
> every MMIO access which is just plain inefficient. Only update the QEMU
> IRQ level if something has actually changed from last time. Otherwise we
> may be papering over other failure modes.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 0a45115..bb554bc 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -36,6 +36,9 @@ typedef struct PL011State {
>      CharDriverState *chr;
>      qemu_irq irq;
>      const unsigned char *id;
> +
> +    /* not serialised, prevents pl011_update doing extra set_irqs */
> +    uint32_t current_irq;
>  } PL011State;
>
>  #define PL011_INT_TX 0x20
> @@ -53,10 +56,11 @@ static const unsigned char pl011_id_luminary[8] =
>
>  static void pl011_update(PL011State *s)
>  {
> -    uint32_t flags;
> -
> -    flags = s->int_level & s->int_enabled;
> -    qemu_set_irq(s->irq, flags != 0);
> +    uint32_t flags = s->int_level & s->int_enabled;
> +    if (flags != s->current_irq) {
> +        s->current_irq = flags;
> +        qemu_set_irq(s->irq, s->current_irq != 0);
> +    }
>  }

Consider this sequence of events:

 * the guest does something causing the interrupt to
   be asserted; int_level and int_enabled are 1, and
   current_irq is also now 1. We call qemu_set_irq()
   to raise the interrupt with the GIC
 * we migrate the guest to another host
 * on the receiving end, QEMU is in a cleanly reset
   state, and so current_irq, int_level and int_enabled
   are all zero before incoming data arrives
 * int_level and int_enabled are both set to 1 from
   the incoming data stream
 * the GIC itself is set to the "interrupt is
   asserted" state by its own incoming data
 * current_irq remains zero, because it's not migrated
 * the guest is resumed, and does something to deassert
   the interrupt. the new 'flags' value is zero
 * because flags == s->current_irq, we don't call
   qemu_set_irq, and so we've just dropped the deassert
   of this interrupt on the floor.

-- PMM
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WARNING: multiple messages have this Message-ID (diff)
From: Peter Maydell <peter.maydell@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	QEMU Developers <qemu-devel@nongnu.org>,
	kvm-devel <kvm@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>
Subject: Re: [Qemu-devel] [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed
Date: Thu, 12 Mar 2015 15:51:50 +0000	[thread overview]
Message-ID: <CAFEAcA-RhZVe1qwKQ3LzfWbzYVcBQ-jrwTnhH0OX69GNtnoysw@mail.gmail.com> (raw)
In-Reply-To: <1425479753-18349-4-git-send-email-alex.bennee@linaro.org>

On 4 March 2015 at 14:35, Alex Bennée <alex.bennee@linaro.org> wrote:
> While observing KVM traces I can see additional IRQ calls on pretty much
> every MMIO access which is just plain inefficient. Only update the QEMU
> IRQ level if something has actually changed from last time. Otherwise we
> may be papering over other failure modes.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 0a45115..bb554bc 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -36,6 +36,9 @@ typedef struct PL011State {
>      CharDriverState *chr;
>      qemu_irq irq;
>      const unsigned char *id;
> +
> +    /* not serialised, prevents pl011_update doing extra set_irqs */
> +    uint32_t current_irq;
>  } PL011State;
>
>  #define PL011_INT_TX 0x20
> @@ -53,10 +56,11 @@ static const unsigned char pl011_id_luminary[8] =
>
>  static void pl011_update(PL011State *s)
>  {
> -    uint32_t flags;
> -
> -    flags = s->int_level & s->int_enabled;
> -    qemu_set_irq(s->irq, flags != 0);
> +    uint32_t flags = s->int_level & s->int_enabled;
> +    if (flags != s->current_irq) {
> +        s->current_irq = flags;
> +        qemu_set_irq(s->irq, s->current_irq != 0);
> +    }
>  }

Consider this sequence of events:

 * the guest does something causing the interrupt to
   be asserted; int_level and int_enabled are 1, and
   current_irq is also now 1. We call qemu_set_irq()
   to raise the interrupt with the GIC
 * we migrate the guest to another host
 * on the receiving end, QEMU is in a cleanly reset
   state, and so current_irq, int_level and int_enabled
   are all zero before incoming data arrives
 * int_level and int_enabled are both set to 1 from
   the incoming data stream
 * the GIC itself is set to the "interrupt is
   asserted" state by its own incoming data
 * current_irq remains zero, because it's not migrated
 * the guest is resumed, and does something to deassert
   the interrupt. the new 'flags' value is zero
 * because flags == s->current_irq, we don't call
   qemu_set_irq, and so we've just dropped the deassert
   of this interrupt on the floor.

-- PMM

WARNING: multiple messages have this Message-ID (diff)
From: peter.maydell@linaro.org (Peter Maydell)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed
Date: Thu, 12 Mar 2015 15:51:50 +0000	[thread overview]
Message-ID: <CAFEAcA-RhZVe1qwKQ3LzfWbzYVcBQ-jrwTnhH0OX69GNtnoysw@mail.gmail.com> (raw)
In-Reply-To: <1425479753-18349-4-git-send-email-alex.bennee@linaro.org>

On 4 March 2015 at 14:35, Alex Benn?e <alex.bennee@linaro.org> wrote:
> While observing KVM traces I can see additional IRQ calls on pretty much
> every MMIO access which is just plain inefficient. Only update the QEMU
> IRQ level if something has actually changed from last time. Otherwise we
> may be papering over other failure modes.
>
> Signed-off-by: Alex Benn?e <alex.bennee@linaro.org>
>
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 0a45115..bb554bc 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -36,6 +36,9 @@ typedef struct PL011State {
>      CharDriverState *chr;
>      qemu_irq irq;
>      const unsigned char *id;
> +
> +    /* not serialised, prevents pl011_update doing extra set_irqs */
> +    uint32_t current_irq;
>  } PL011State;
>
>  #define PL011_INT_TX 0x20
> @@ -53,10 +56,11 @@ static const unsigned char pl011_id_luminary[8] =
>
>  static void pl011_update(PL011State *s)
>  {
> -    uint32_t flags;
> -
> -    flags = s->int_level & s->int_enabled;
> -    qemu_set_irq(s->irq, flags != 0);
> +    uint32_t flags = s->int_level & s->int_enabled;
> +    if (flags != s->current_irq) {
> +        s->current_irq = flags;
> +        qemu_set_irq(s->irq, s->current_irq != 0);
> +    }
>  }

Consider this sequence of events:

 * the guest does something causing the interrupt to
   be asserted; int_level and int_enabled are 1, and
   current_irq is also now 1. We call qemu_set_irq()
   to raise the interrupt with the GIC
 * we migrate the guest to another host
 * on the receiving end, QEMU is in a cleanly reset
   state, and so current_irq, int_level and int_enabled
   are all zero before incoming data arrives
 * int_level and int_enabled are both set to 1 from
   the incoming data stream
 * the GIC itself is set to the "interrupt is
   asserted" state by its own incoming data
 * current_irq remains zero, because it's not migrated
 * the guest is resumed, and does something to deassert
   the interrupt. the new 'flags' value is zero
 * because flags == s->current_irq, we don't call
   qemu_set_irq, and so we've just dropped the deassert
   of this interrupt on the floor.

-- PMM

  parent reply	other threads:[~2015-03-12 15:51 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-04 14:35 [PATCH v2 0/6] QEMU ARM64 Migration Fixes Alex Bennée
2015-03-04 14:35 ` Alex Bennée
2015-03-04 14:35 ` [Qemu-devel] " Alex Bennée
2015-03-04 14:35 ` [PATCH v2 1/6] target-arm: kvm: save/restore mp state Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 13:42   ` Greg Bellows
2015-03-11 13:42     ` [Qemu-devel] " Greg Bellows
2015-03-12 15:43   ` Peter Maydell
2015-03-12 15:43     ` Peter Maydell
2015-03-12 15:43     ` [Qemu-devel] " Peter Maydell
2015-03-13 10:40     ` Alex Bennée
2015-03-13 10:40       ` Alex Bennée
2015-03-13 10:40       ` [Qemu-devel] " Alex Bennée
2015-03-04 14:35 ` [PATCH v2 2/6] hw/intc: arm_gic_kvm.c restore config first Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 13:59   ` Greg Bellows
2015-03-11 13:59     ` Greg Bellows
2015-03-11 13:59     ` Greg Bellows
2015-03-04 14:35 ` [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 14:44   ` Greg Bellows
2015-03-11 14:44     ` Greg Bellows
2015-03-11 14:44     ` Greg Bellows
2015-03-12 15:51   ` Peter Maydell [this message]
2015-03-12 15:51     ` Peter Maydell
2015-03-12 15:51     ` [Qemu-devel] " Peter Maydell
2015-03-12 20:27     ` Peter Maydell
2015-03-12 20:27       ` Peter Maydell
2015-03-12 20:27       ` [Qemu-devel] " Peter Maydell
2015-03-13 10:38       ` Alex Bennée
2015-03-13 10:38         ` Alex Bennée
2015-03-13 10:38         ` Alex Bennée
2015-03-13 10:38         ` [Qemu-devel] " Alex Bennée
2015-03-04 14:35 ` [PATCH v2 4/6] target-arm: kvm64 sync FP register state Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 15:17   ` Greg Bellows
2015-03-11 15:17     ` Greg Bellows
2015-03-11 15:17     ` Greg Bellows
2015-03-04 14:35 ` [PATCH v2 5/6] target-arm: kvm64 fix save/restore of SPSR regs Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-09 13:26   ` Christoffer Dall
2015-03-09 13:26     ` Christoffer Dall
2015-03-09 13:26     ` [Qemu-devel] " Christoffer Dall
2015-03-11 19:41     ` Greg Bellows
2015-03-11 19:41       ` Greg Bellows
2015-03-11 19:41       ` Greg Bellows
2015-03-04 14:35 ` [PATCH v2 6/6] target-arm: cpu.h document why env->spsr exists Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-04 14:46   ` Peter Maydell
2015-03-04 14:46     ` Peter Maydell
2015-03-04 14:46     ` [Qemu-devel] " Peter Maydell
2015-03-04 16:27     ` Alex Bennée
2015-03-04 16:27       ` Alex Bennée
2015-03-04 16:27       ` Alex Bennée
2015-03-04 16:27       ` [Qemu-devel] " Alex Bennée

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