All of lore.kernel.org
 help / color / mirror / Atom feed
From: Greg Bellows <greg.bellows@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: kvm@vger.kernel.org, marc.zyngier@arm.com,
	QEMU Developers <qemu-devel@nongnu.org>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [Qemu-devel] [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed
Date: Wed, 11 Mar 2015 09:44:11 -0500	[thread overview]
Message-ID: <CAOgzsHVVw-gZE0_O=NH3xn_4jV2+7=Adrs2tsogwKK_ofptL9Q@mail.gmail.com> (raw)
In-Reply-To: <1425479753-18349-4-git-send-email-alex.bennee@linaro.org>

On Wed, Mar 4, 2015 at 8:35 AM, Alex Bennée <alex.bennee@linaro.org> wrote:
> While observing KVM traces I can see additional IRQ calls on pretty much
> every MMIO access which is just plain inefficient. Only update the QEMU
> IRQ level if something has actually changed from last time. Otherwise we
> may be papering over other failure modes.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 0a45115..bb554bc 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -36,6 +36,9 @@ typedef struct PL011State {
>      CharDriverState *chr;
>      qemu_irq irq;
>      const unsigned char *id;
> +
> +    /* not serialised, prevents pl011_update doing extra set_irqs */
> +    uint32_t current_irq;
>  } PL011State;
>
>  #define PL011_INT_TX 0x20
> @@ -53,10 +56,11 @@ static const unsigned char pl011_id_luminary[8] =
>
>  static void pl011_update(PL011State *s)
>  {
> -    uint32_t flags;
> -
> -    flags = s->int_level & s->int_enabled;
> -    qemu_set_irq(s->irq, flags != 0);
> +    uint32_t flags = s->int_level & s->int_enabled;
> +    if (flags != s->current_irq) {
> +        s->current_irq = flags;
> +        qemu_set_irq(s->irq, s->current_irq != 0);
> +    }
>  }
>
>  static uint64_t pl011_read(void *opaque, hwaddr offset,
> --
> 2.3.1
>
>

Did you find the source of the additional IRQs? This seems like it
could be potentially be hiding an issue.  From looking at the code, it
appears that one source of the additional updates is in pl011_read,
where we possibly do an update without a change in int_level.  I
wonder if finding and fixing the updates is a better approach.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Greg Bellows <greg.bellows@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: kvm@vger.kernel.org, marc.zyngier@arm.com,
	QEMU Developers <qemu-devel@nongnu.org>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu,
	Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed
Date: Wed, 11 Mar 2015 09:44:11 -0500	[thread overview]
Message-ID: <CAOgzsHVVw-gZE0_O=NH3xn_4jV2+7=Adrs2tsogwKK_ofptL9Q@mail.gmail.com> (raw)
In-Reply-To: <1425479753-18349-4-git-send-email-alex.bennee@linaro.org>

On Wed, Mar 4, 2015 at 8:35 AM, Alex Bennée <alex.bennee@linaro.org> wrote:
> While observing KVM traces I can see additional IRQ calls on pretty much
> every MMIO access which is just plain inefficient. Only update the QEMU
> IRQ level if something has actually changed from last time. Otherwise we
> may be papering over other failure modes.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 0a45115..bb554bc 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -36,6 +36,9 @@ typedef struct PL011State {
>      CharDriverState *chr;
>      qemu_irq irq;
>      const unsigned char *id;
> +
> +    /* not serialised, prevents pl011_update doing extra set_irqs */
> +    uint32_t current_irq;
>  } PL011State;
>
>  #define PL011_INT_TX 0x20
> @@ -53,10 +56,11 @@ static const unsigned char pl011_id_luminary[8] =
>
>  static void pl011_update(PL011State *s)
>  {
> -    uint32_t flags;
> -
> -    flags = s->int_level & s->int_enabled;
> -    qemu_set_irq(s->irq, flags != 0);
> +    uint32_t flags = s->int_level & s->int_enabled;
> +    if (flags != s->current_irq) {
> +        s->current_irq = flags;
> +        qemu_set_irq(s->irq, s->current_irq != 0);
> +    }
>  }
>
>  static uint64_t pl011_read(void *opaque, hwaddr offset,
> --
> 2.3.1
>
>

Did you find the source of the additional IRQs? This seems like it
could be potentially be hiding an issue.  From looking at the code, it
appears that one source of the additional updates is in pl011_read,
where we possibly do an update without a change in int_level.  I
wonder if finding and fixing the updates is a better approach.

WARNING: multiple messages have this Message-ID (diff)
From: greg.bellows@linaro.org (Greg Bellows)
To: linux-arm-kernel@lists.infradead.org
Subject: [Qemu-devel] [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed
Date: Wed, 11 Mar 2015 09:44:11 -0500	[thread overview]
Message-ID: <CAOgzsHVVw-gZE0_O=NH3xn_4jV2+7=Adrs2tsogwKK_ofptL9Q@mail.gmail.com> (raw)
In-Reply-To: <1425479753-18349-4-git-send-email-alex.bennee@linaro.org>

On Wed, Mar 4, 2015 at 8:35 AM, Alex Benn?e <alex.bennee@linaro.org> wrote:
> While observing KVM traces I can see additional IRQ calls on pretty much
> every MMIO access which is just plain inefficient. Only update the QEMU
> IRQ level if something has actually changed from last time. Otherwise we
> may be papering over other failure modes.
>
> Signed-off-by: Alex Benn?e <alex.bennee@linaro.org>
>
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index 0a45115..bb554bc 100644
> --- a/hw/char/pl011.c
> +++ b/hw/char/pl011.c
> @@ -36,6 +36,9 @@ typedef struct PL011State {
>      CharDriverState *chr;
>      qemu_irq irq;
>      const unsigned char *id;
> +
> +    /* not serialised, prevents pl011_update doing extra set_irqs */
> +    uint32_t current_irq;
>  } PL011State;
>
>  #define PL011_INT_TX 0x20
> @@ -53,10 +56,11 @@ static const unsigned char pl011_id_luminary[8] =
>
>  static void pl011_update(PL011State *s)
>  {
> -    uint32_t flags;
> -
> -    flags = s->int_level & s->int_enabled;
> -    qemu_set_irq(s->irq, flags != 0);
> +    uint32_t flags = s->int_level & s->int_enabled;
> +    if (flags != s->current_irq) {
> +        s->current_irq = flags;
> +        qemu_set_irq(s->irq, s->current_irq != 0);
> +    }
>  }
>
>  static uint64_t pl011_read(void *opaque, hwaddr offset,
> --
> 2.3.1
>
>

Did you find the source of the additional IRQs? This seems like it
could be potentially be hiding an issue.  From looking at the code, it
appears that one source of the additional updates is in pl011_read,
where we possibly do an update without a change in int_level.  I
wonder if finding and fixing the updates is a better approach.

  reply	other threads:[~2015-03-11 14:44 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-04 14:35 [PATCH v2 0/6] QEMU ARM64 Migration Fixes Alex Bennée
2015-03-04 14:35 ` Alex Bennée
2015-03-04 14:35 ` [Qemu-devel] " Alex Bennée
2015-03-04 14:35 ` [PATCH v2 1/6] target-arm: kvm: save/restore mp state Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 13:42   ` Greg Bellows
2015-03-11 13:42     ` [Qemu-devel] " Greg Bellows
2015-03-12 15:43   ` Peter Maydell
2015-03-12 15:43     ` Peter Maydell
2015-03-12 15:43     ` [Qemu-devel] " Peter Maydell
2015-03-13 10:40     ` Alex Bennée
2015-03-13 10:40       ` Alex Bennée
2015-03-13 10:40       ` [Qemu-devel] " Alex Bennée
2015-03-04 14:35 ` [PATCH v2 2/6] hw/intc: arm_gic_kvm.c restore config first Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 13:59   ` Greg Bellows
2015-03-11 13:59     ` Greg Bellows
2015-03-11 13:59     ` Greg Bellows
2015-03-04 14:35 ` [PATCH v2 3/6] hw/char: pl011 don't keep setting the IRQ if nothing changed Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 14:44   ` Greg Bellows [this message]
2015-03-11 14:44     ` Greg Bellows
2015-03-11 14:44     ` Greg Bellows
2015-03-12 15:51   ` Peter Maydell
2015-03-12 15:51     ` Peter Maydell
2015-03-12 15:51     ` [Qemu-devel] " Peter Maydell
2015-03-12 20:27     ` Peter Maydell
2015-03-12 20:27       ` Peter Maydell
2015-03-12 20:27       ` [Qemu-devel] " Peter Maydell
2015-03-13 10:38       ` Alex Bennée
2015-03-13 10:38         ` Alex Bennée
2015-03-13 10:38         ` Alex Bennée
2015-03-13 10:38         ` [Qemu-devel] " Alex Bennée
2015-03-04 14:35 ` [PATCH v2 4/6] target-arm: kvm64 sync FP register state Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-11 15:17   ` Greg Bellows
2015-03-11 15:17     ` Greg Bellows
2015-03-11 15:17     ` Greg Bellows
2015-03-04 14:35 ` [PATCH v2 5/6] target-arm: kvm64 fix save/restore of SPSR regs Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-09 13:26   ` Christoffer Dall
2015-03-09 13:26     ` Christoffer Dall
2015-03-09 13:26     ` [Qemu-devel] " Christoffer Dall
2015-03-11 19:41     ` Greg Bellows
2015-03-11 19:41       ` Greg Bellows
2015-03-11 19:41       ` Greg Bellows
2015-03-04 14:35 ` [PATCH v2 6/6] target-arm: cpu.h document why env->spsr exists Alex Bennée
2015-03-04 14:35   ` Alex Bennée
2015-03-04 14:35   ` [Qemu-devel] " Alex Bennée
2015-03-04 14:46   ` Peter Maydell
2015-03-04 14:46     ` Peter Maydell
2015-03-04 14:46     ` [Qemu-devel] " Peter Maydell
2015-03-04 16:27     ` Alex Bennée
2015-03-04 16:27       ` Alex Bennée
2015-03-04 16:27       ` Alex Bennée
2015-03-04 16:27       ` [Qemu-devel] " Alex Bennée

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAOgzsHVVw-gZE0_O=NH3xn_4jV2+7=Adrs2tsogwKK_ofptL9Q@mail.gmail.com' \
    --to=greg.bellows@linaro.org \
    --cc=alex.bennee@linaro.org \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=marc.zyngier@arm.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.