[Qemu-devel] [PULL 0/2] target-mips queue

[Qemu-devel] [PULL 0/2] target-mips queue

[Leon Alrae]

Hi,

Just two patches for MIPS. Probably there'll be one more pullreq before
the hard-freeze adding the initial CPS support.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit ffa6564c9b13cea4b704e184d29d721f2cb061bb:

  Merge remote-tracking branch 'remotes/weil/tags/pull-wxx-20160322' into staging (2016-03-22 20:27:55 +0000)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160323

for you to fetch changes up to b7c4ab809a4bfde4ab322b49fbe2e47536da7487:

  default-configs: add mips-softmmu-common.mak (2016-03-23 13:36:56 +0000)

----------------------------------------------------------------
MIPS patches 2016-03-23

Changes:
* add mips-softmmu-common.mak
* indicate presence of IEEE 754-2008 FPU in MIPS64R6-generic and P5600

----------------------------------------------------------------
Leon Alrae (2):
      target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs
      default-configs: add mips-softmmu-common.mak

 default-configs/mips-softmmu-common.mak | 32 ++++++++++++++++++++++++++++++++
 default-configs/mips-softmmu.mak        | 31 +------------------------------
 default-configs/mips64-softmmu.mak      | 31 +------------------------------
 default-configs/mips64el-softmmu.mak    | 31 +------------------------------
 default-configs/mipsel-softmmu.mak      | 31 +------------------------------
 target-mips/cpu.h                       |  3 +++
 target-mips/translate.c                 |  1 +
 target-mips/translate_init.c            | 22 +++++++++++++---------
 8 files changed, 53 insertions(+), 129 deletions(-)
 create mode 100644 default-configs/mips-softmmu-common.mak

[Qemu-devel] [PULL 1/2] target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs

[Leon Alrae]

MIPS Release 6 and MIPS SIMD Architecture make it mandatory to have IEEE
754-2008 FPU which is indicated by CP1 FIR.HAS2008, FCSR.ABS2008 and
FCSR.NAN2008 bits set to 1.

In QEMU we still keep these bits cleared as there is no 2008-NaN support.
However, this now causes problems preventing from running R6 Linux with
the v4.5 kernel. Kernel refuses to execute 2008-NaN ELFs on a CPU
whose FPU does not support 2008-NaN encoding:

  (...)
  VFS: Mounted root (ext4 filesystem) readonly on device 8:0.
  devtmpfs: mounted
  Freeing unused kernel memory: 256K (ffffffff806f0000 - ffffffff80730000)
  request_module: runaway loop modprobe binfmt-464c
  Starting init: /sbin/init exists but couldn't execute it (error -8)
  request_module: runaway loop modprobe binfmt-464c
  Starting init: /bin/sh exists but couldn't execute it (error -8)
  Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. See Linux Documentation/init.txt for guidance.

Therefore always indicate presence of 2008-NaN support in R6 as well as in
R5+MSA CPUs, even though this feature is not yet supported by MIPS in QEMU.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/cpu.h            |  3 +++
 target-mips/translate.c      |  1 +
 target-mips/translate_init.c | 22 +++++++++++++---------
 3 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 1e2b070..4f3ebb9 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -99,6 +99,7 @@ struct CPUMIPSFPUContext {
     uint32_t fcr0;
 #define FCR0_FREP 29
 #define FCR0_UFRP 28
+#define FCR0_HAS2008 23
 #define FCR0_F64 22
 #define FCR0_L 21
 #define FCR0_W 20
@@ -110,6 +111,8 @@ struct CPUMIPSFPUContext {
 #define FCR0_REV 0
     /* fcsr */
     uint32_t fcr31;
+#define FCR31_ABS2008 19
+#define FCR31_NAN2008 18
 #define SET_FP_COND(num,env)     do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
 #define CLEAR_FP_COND(num,env)   do { ((env).fcr31) &= ~((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
 #define GET_FP_COND(env)         ((((env).fcr31 >> 24) & 0xfe) | (((env).fcr31 >> 23) & 0x1))
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 12ed820..0f43bf4 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -20012,6 +20012,7 @@ void cpu_state_reset(CPUMIPSState *env)
     env->CP0_PageGrain_rw_bitmask = env->cpu_model->CP0_PageGrain_rw_bitmask;
     env->CP0_PageGrain = env->cpu_model->CP0_PageGrain;
     env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
+    env->active_fpu.fcr31 = env->cpu_model->CP1_fcr31;
     env->msair = env->cpu_model->MSAIR;
     env->insn_flags = env->cpu_model->insn_flags;
 
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index cdef59d..3192db0 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -84,6 +84,7 @@ struct mips_def_t {
     int32_t CP0_TCStatus_rw_bitmask;
     int32_t CP0_SRSCtl;
     int32_t CP1_fcr0;
+    int32_t CP1_fcr31;
     int32_t MSAIR;
     int32_t SEGBITS;
     int32_t PABITS;
@@ -421,9 +422,10 @@ static const mips_def_t mips_defs[] =
         .CP0_Status_rw_bitmask = 0x3C68FF1F,
         .CP0_PageGrain_rw_bitmask = (1U << CP0PG_RIE) | (1 << CP0PG_XIE) |
                     (1 << CP0PG_ELPA) | (1 << CP0PG_IEC),
-        .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_UFRP) | (1 << FCR0_F64) |
-                    (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
-                    (1 << FCR0_S) | (0x03 << FCR0_PRID),
+        .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_UFRP) | (1 << FCR0_HAS2008) |
+                    (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
+                    (1 << FCR0_D) | (1 << FCR0_S) | (0x03 << FCR0_PRID),
+        .CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008),
         .SEGBITS = 32,
         .PABITS = 40,
         .insn_flags = CPU_MIPS32R5 | ASE_MSA,
@@ -458,9 +460,10 @@ static const mips_def_t mips_defs[] =
         .CP0_PageGrain = (1 << CP0PG_IEC) | (1 << CP0PG_XIE) |
                          (1U << CP0PG_RIE),
         .CP0_PageGrain_rw_bitmask = 0,
-        .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_F64) | (1 << FCR0_L) |
-                    (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) |
-                    (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),
+        .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_HAS2008) | (1 << FCR0_F64) |
+                    (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
+                    (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),
+        .CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008),
         .SEGBITS = 32,
         .PABITS = 32,
         .insn_flags = CPU_MIPS32R6 | ASE_MICROMIPS,
@@ -677,9 +680,10 @@ static const mips_def_t mips_defs[] =
         .CP0_PageGrain = (1 << CP0PG_IEC) | (1 << CP0PG_XIE) |
                          (1U << CP0PG_RIE),
         .CP0_PageGrain_rw_bitmask = (1 << CP0PG_ELPA),
-        .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_F64) | (1 << FCR0_L) |
-                    (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) |
-                    (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),
+        .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_HAS2008) | (1 << FCR0_F64) |
+                    (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
+                    (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),
+        .CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008),
         .SEGBITS = 48,
         .PABITS = 48,
         .insn_flags = CPU_MIPS64R6 | ASE_MSA,
-- 
2.1.0

[Qemu-devel] [PULL 2/2] default-configs: add mips-softmmu-common.mak

[Leon Alrae]

Add mips-softmmu-common.mak and include it in existing mips*-softmmu.mak
files to avoid having to repeat CONFIG defines four times.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 default-configs/mips-softmmu-common.mak | 32 ++++++++++++++++++++++++++++++++
 default-configs/mips-softmmu.mak        | 31 +------------------------------
 default-configs/mips64-softmmu.mak      | 31 +------------------------------
 default-configs/mips64el-softmmu.mak    | 31 +------------------------------
 default-configs/mipsel-softmmu.mak      | 31 +------------------------------
 5 files changed, 36 insertions(+), 120 deletions(-)
 create mode 100644 default-configs/mips-softmmu-common.mak

diff --git a/default-configs/mips-softmmu-common.mak b/default-configs/mips-softmmu-common.mak
new file mode 100644
index 0000000..37009a3
--- /dev/null
+++ b/default-configs/mips-softmmu-common.mak
@@ -0,0 +1,32 @@
+# Common mips*-softmmu CONFIG defines
+
+include pci.mak
+include sound.mak
+include usb.mak
+CONFIG_ESP=y
+CONFIG_VGA_ISA=y
+CONFIG_VGA_ISA_MM=y
+CONFIG_VGA_CIRRUS=y
+CONFIG_VMWARE_VGA=y
+CONFIG_SERIAL=y
+CONFIG_PARALLEL=y
+CONFIG_I8254=y
+CONFIG_PCSPK=y
+CONFIG_PCKBD=y
+CONFIG_FDC=y
+CONFIG_ACPI=y
+CONFIG_ACPI_X86=y
+CONFIG_ACPI_MEMORY_HOTPLUG=y
+CONFIG_ACPI_CPU_HOTPLUG=y
+CONFIG_APM=y
+CONFIG_I8257=y
+CONFIG_PIIX4=y
+CONFIG_IDE_ISA=y
+CONFIG_IDE_PIIX=y
+CONFIG_NE2000_ISA=y
+CONFIG_MIPSNET=y
+CONFIG_PFLASH_CFI01=y
+CONFIG_I8259=y
+CONFIG_MC146818RTC=y
+CONFIG_ISA_TESTDEV=y
+CONFIG_EMPTY_SLOT=y
diff --git a/default-configs/mips-softmmu.mak b/default-configs/mips-softmmu.mak
index 44467c3..9fede6e 100644
--- a/default-configs/mips-softmmu.mak
+++ b/default-configs/mips-softmmu.mak
@@ -1,32 +1,3 @@
 # Default configuration for mips-softmmu
 
-include pci.mak
-include sound.mak
-include usb.mak
-CONFIG_ESP=y
-CONFIG_VGA_ISA=y
-CONFIG_VGA_ISA_MM=y
-CONFIG_VGA_CIRRUS=y
-CONFIG_VMWARE_VGA=y
-CONFIG_SERIAL=y
-CONFIG_PARALLEL=y
-CONFIG_I8254=y
-CONFIG_PCSPK=y
-CONFIG_PCKBD=y
-CONFIG_FDC=y
-CONFIG_ACPI=y
-CONFIG_ACPI_X86=y
-CONFIG_ACPI_MEMORY_HOTPLUG=y
-CONFIG_ACPI_CPU_HOTPLUG=y
-CONFIG_APM=y
-CONFIG_I8257=y
-CONFIG_PIIX4=y
-CONFIG_IDE_ISA=y
-CONFIG_IDE_PIIX=y
-CONFIG_NE2000_ISA=y
-CONFIG_MIPSNET=y
-CONFIG_PFLASH_CFI01=y
-CONFIG_I8259=y
-CONFIG_MC146818RTC=y
-CONFIG_ISA_TESTDEV=y
-CONFIG_EMPTY_SLOT=y
+include mips-softmmu-common.mak
diff --git a/default-configs/mips64-softmmu.mak b/default-configs/mips64-softmmu.mak
index 66ed5f9..bad7496 100644
--- a/default-configs/mips64-softmmu.mak
+++ b/default-configs/mips64-softmmu.mak
@@ -1,38 +1,9 @@
 # Default configuration for mips64-softmmu
 
-include pci.mak
-include sound.mak
-include usb.mak
-CONFIG_ESP=y
-CONFIG_VGA_ISA=y
-CONFIG_VGA_ISA_MM=y
-CONFIG_VGA_CIRRUS=y
-CONFIG_VMWARE_VGA=y
-CONFIG_SERIAL=y
-CONFIG_PARALLEL=y
-CONFIG_I8254=y
-CONFIG_PCSPK=y
-CONFIG_PCKBD=y
-CONFIG_FDC=y
-CONFIG_ACPI=y
-CONFIG_ACPI_X86=y
-CONFIG_ACPI_MEMORY_HOTPLUG=y
-CONFIG_ACPI_CPU_HOTPLUG=y
-CONFIG_APM=y
-CONFIG_I8257=y
-CONFIG_PIIX4=y
-CONFIG_IDE_ISA=y
-CONFIG_IDE_PIIX=y
-CONFIG_NE2000_ISA=y
+include mips-softmmu-common.mak
 CONFIG_RC4030=y
 CONFIG_DP8393X=y
 CONFIG_DS1225Y=y
-CONFIG_MIPSNET=y
-CONFIG_PFLASH_CFI01=y
 CONFIG_JAZZ=y
 CONFIG_G364FB=y
-CONFIG_I8259=y
 CONFIG_JAZZ_LED=y
-CONFIG_MC146818RTC=y
-CONFIG_ISA_TESTDEV=y
-CONFIG_EMPTY_SLOT=y
diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
index bfca2b2..485e218 100644
--- a/default-configs/mips64el-softmmu.mak
+++ b/default-configs/mips64el-softmmu.mak
@@ -1,41 +1,12 @@
 # Default configuration for mips64el-softmmu
 
-include pci.mak
-include sound.mak
-include usb.mak
-CONFIG_ESP=y
-CONFIG_VGA_ISA=y
-CONFIG_VGA_ISA_MM=y
-CONFIG_VGA_CIRRUS=y
-CONFIG_VMWARE_VGA=y
-CONFIG_SERIAL=y
-CONFIG_PARALLEL=y
-CONFIG_I8254=y
-CONFIG_PCSPK=y
-CONFIG_PCKBD=y
-CONFIG_FDC=y
-CONFIG_ACPI=y
-CONFIG_ACPI_X86=y
-CONFIG_ACPI_MEMORY_HOTPLUG=y
-CONFIG_ACPI_CPU_HOTPLUG=y
-CONFIG_APM=y
-CONFIG_I8257=y
-CONFIG_PIIX4=y
-CONFIG_IDE_ISA=y
-CONFIG_IDE_PIIX=y
+include mips-softmmu-common.mak
 CONFIG_IDE_VIA=y
-CONFIG_NE2000_ISA=y
 CONFIG_RC4030=y
 CONFIG_DP8393X=y
 CONFIG_DS1225Y=y
-CONFIG_MIPSNET=y
-CONFIG_PFLASH_CFI01=y
 CONFIG_FULONG=y
 CONFIG_JAZZ=y
 CONFIG_G364FB=y
-CONFIG_I8259=y
 CONFIG_JAZZ_LED=y
-CONFIG_MC146818RTC=y
 CONFIG_VT82C686=y
-CONFIG_ISA_TESTDEV=y
-CONFIG_EMPTY_SLOT=y
diff --git a/default-configs/mipsel-softmmu.mak b/default-configs/mipsel-softmmu.mak
index 0162ef0..a7f6059 100644
--- a/default-configs/mipsel-softmmu.mak
+++ b/default-configs/mipsel-softmmu.mak
@@ -1,32 +1,3 @@
 # Default configuration for mipsel-softmmu
 
-include pci.mak
-include sound.mak
-include usb.mak
-CONFIG_ESP=y
-CONFIG_VGA_ISA=y
-CONFIG_VGA_ISA_MM=y
-CONFIG_VGA_CIRRUS=y
-CONFIG_VMWARE_VGA=y
-CONFIG_SERIAL=y
-CONFIG_PARALLEL=y
-CONFIG_I8254=y
-CONFIG_PCSPK=y
-CONFIG_PCKBD=y
-CONFIG_FDC=y
-CONFIG_ACPI=y
-CONFIG_ACPI_X86=y
-CONFIG_ACPI_MEMORY_HOTPLUG=y
-CONFIG_ACPI_CPU_HOTPLUG=y
-CONFIG_APM=y
-CONFIG_I8257=y
-CONFIG_PIIX4=y
-CONFIG_IDE_ISA=y
-CONFIG_IDE_PIIX=y
-CONFIG_NE2000_ISA=y
-CONFIG_MIPSNET=y
-CONFIG_PFLASH_CFI01=y
-CONFIG_I8259=y
-CONFIG_MC146818RTC=y
-CONFIG_ISA_TESTDEV=y
-CONFIG_EMPTY_SLOT=y
+include mips-softmmu-common.mak
-- 
2.1.0

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 23 March 2016 at 16:54, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> Just two patches for MIPS. Probably there'll be one more pullreq before
> the hard-freeze adding the initial CPS support.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit ffa6564c9b13cea4b704e184d29d721f2cb061bb:
>
>   Merge remote-tracking branch 'remotes/weil/tags/pull-wxx-20160322' into staging (2016-03-22 20:27:55 +0000)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20160323
>
> for you to fetch changes up to b7c4ab809a4bfde4ab322b49fbe2e47536da7487:
>
>   default-configs: add mips-softmmu-common.mak (2016-03-23 13:36:56 +0000)
>
> ----------------------------------------------------------------
> MIPS patches 2016-03-23
>
> Changes:
> * add mips-softmmu-common.mak
> * indicate presence of IEEE 754-2008 FPU in MIPS64R6-generic and P5600
>
> ----------------------------------------------------------------


Applied, thanks.

-- PMM

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 28 July 2017 at 14:07, Yongbok Kim <yongbok.kim@imgtec.com> wrote:
> The following changes since commit 871a0f7ad2b9560c5f7d640125c5be95ca23ca7f:
>
>   Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20170728' into staging (2017-07-28 10:35:02 +0100)
>
> are available in the git repository at:
>
>   git://github.com/yongbok/upstream-qemu.git tags/mips-20170728
>
> for you to fetch changes up to 665df9010aa40d1e028d6ad5d3bdb4d9b0a3294c:
>
>   Revert "elf-loader: warn about invalid endianness" (2017-07-28 13:32:32 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2017-07-28
>
> Changes:
> * Improve ths MIPS board kernel load error reporting
> * Revert unnecessary warning messages
>
> ----------------------------------------------------------------
>
> Alexey Kardashevskiy (1):
>   Revert "elf-loader: warn about invalid endianness"
>
> Aurelien Jarno (1):
>   hw/mips: load_elf_strerror to report kernel loading failure
>

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Yongbok Kim]

The following changes since commit 871a0f7ad2b9560c5f7d640125c5be95ca23ca7f:

  Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20170728' into staging (2017-07-28 10:35:02 +0100)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170728

for you to fetch changes up to 665df9010aa40d1e028d6ad5d3bdb4d9b0a3294c:

  Revert "elf-loader: warn about invalid endianness" (2017-07-28 13:32:32 +0100)

----------------------------------------------------------------
MIPS patches 2017-07-28

Changes:
* Improve ths MIPS board kernel load error reporting
* Revert unnecessary warning messages

----------------------------------------------------------------

Alexey Kardashevskiy (1):
  Revert "elf-loader: warn about invalid endianness"

Aurelien Jarno (1):
  hw/mips: load_elf_strerror to report kernel loading failure

 hw/core/loader.c        |  1 -
 hw/mips/mips_fulong2e.c | 15 +++++++++------
 hw/mips/mips_malta.c    | 14 ++++++++------
 hw/mips/mips_mipssim.c  |  5 +++--
 hw/mips/mips_r4k.c      |  6 ++++--
 5 files changed, 24 insertions(+), 17 deletions(-)

-- 
2.7.4

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 11 July 2017 at 16:16, Yongbok Kim <yongbok.kim@imgtec.com> wrote:
> The following changes since commit b5ed2e11ef39a308dcbef46f66774557b4a41fce:
>
>   build: disable Xen on ARM (2017-07-11 11:23:47 +0100)
>
> are available in the git repository at:
>
>   git://github.com/yongbok/upstream-qemu.git tags/mips-20170711
>
> for you to fetch changes up to 9768e2abf7ca3ef181f7cec134d7305c1643f78a:
>
>   mips/malta: load the initrd at the end of the low memory (2017-07-11 15:06:34 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2017-07-11
>
> Changes:
> * Fix MSA copy_[s|u]_df corner case of rd = 0
> * Update malta to load the initrd at the end of the low memory
>
> ----------------------------------------------------------------
>
> Aurelien Jarno (1):
>   mips/malta: load the initrd at the end of the low memory
>
> Miodrag Dinic (1):
>   target/mips: fix msa copy_[s|u]_df rd = 0 corner case
>
>  hw/mips/mips_malta.c    | 5 +++--
>  target/mips/translate.c | 8 ++++++--
>  2 files changed, 9 insertions(+), 4 deletions(-)

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Yongbok Kim]

The following changes since commit b5ed2e11ef39a308dcbef46f66774557b4a41fce:

  build: disable Xen on ARM (2017-07-11 11:23:47 +0100)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170711

for you to fetch changes up to 9768e2abf7ca3ef181f7cec134d7305c1643f78a:

  mips/malta: load the initrd at the end of the low memory (2017-07-11 15:06:34 +0100)

----------------------------------------------------------------
MIPS patches 2017-07-11

Changes:
* Fix MSA copy_[s|u]_df corner case of rd = 0
* Update malta to load the initrd at the end of the low memory

----------------------------------------------------------------

Aurelien Jarno (1):
  mips/malta: load the initrd at the end of the low memory

Miodrag Dinic (1):
  target/mips: fix msa copy_[s|u]_df rd = 0 corner case

 hw/mips/mips_malta.c    | 5 +++--
 target/mips/translate.c | 8 ++++++--
 2 files changed, 9 insertions(+), 4 deletions(-)

-- 
2.7.4

[Qemu-devel] [PULL 0/2] target-mips queue

[Yongbok Kim]

The following changes since commit 10f25e4844cb9b3f02fb032f88051dd5b65b4206:

  Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170222' into staging (2017-02-23 09:59:40 +0000)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170224

for you to fetch changes up to 0288d4485392832b25e40551433377a36d56dd8c:

  hw/mips: MIPS Boston board support (2017-02-24 00:04:32 +0000)

----------------------------------------------------------------
MIPS patches 2017-02-24

Changes:
* Revert the boston model commit which breaks "make check" on 32-bit hosts
* Add the boston model with fixing the issue.

----------------------------------------------------------------

Paul Burton (1):
  hw/mips: MIPS Boston board support

Yongbok Kim (1):
  Revert "hw/mips: MIPS Boston board support"

 hw/mips/boston.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.7.4

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 30 September 2016 at 01:16, Yongbok Kim <yongbok.kim@imgtec.com> wrote:
>>
>> Your GPG key hasn't been signed by anybody -- are you in a position
>> to get it signed by somebody else who can in-person verify your identity
>> (eg Leon)?
>
> Hi Peter,
>
> We have just arranged the key signing and Leon has signed my key.

Thanks; I have applied the pull request to master.

-- PMM

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Yongbok Kim]

> 
> Your GPG key hasn't been signed by anybody -- are you in a position
> to get it signed by somebody else who can in-person verify your identity
> (eg Leon)?
> 
> thanks
> -- PMM
> 

Hi Peter,

We have just arranged the key signing and Leon has signed my key.

Thanks,
Yongbok

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 29 September 2016 at 06:19, Yongbok Kim <yongbok.kim@imgtec.com> wrote:
> Hi,
>
> This is my first pull-req for MIPS.
>
> Thanks,
> Yongbok
>
> The following changes since commit c640f2849ee8775fe1bbd7a2772610aa77816f9f:
>
>   Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2016-09-28 23:02:56 +0100)
>
> are available in the git repository at:
>
>   git://github.com/yongbok/upstream-qemu.git tags/mips-20160929
>
> for you to fetch changes up to 73bfa8c0e0295df92d5fe61e0149db7b36cdc0c4:
>
>   hw/dma: vmstateify rc4030 (2016-09-29 12:07:51 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2016-09-29
>
> Changes:
> * MIPS Maintainer update
> * vmstateify rc4030

Your GPG key hasn't been signed by anybody -- are you in a position
to get it signed by somebody else who can in-person verify your identity
(eg Leon)?

thanks
-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Yongbok Kim]

Hi, 

This is my first pull-req for MIPS.

Thanks,
Yongbok

The following changes since commit c640f2849ee8775fe1bbd7a2772610aa77816f9f:

  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2016-09-28 23:02:56 +0100)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20160929

for you to fetch changes up to 73bfa8c0e0295df92d5fe61e0149db7b36cdc0c4:

  hw/dma: vmstateify rc4030 (2016-09-29 12:07:51 +0100)

----------------------------------------------------------------
MIPS patches 2016-09-29

Changes:
* MIPS Maintainer update
* vmstateify rc4030

----------------------------------------------------------------
Dr. David Alan Gilbert (1):
      hw/dma: vmstateify rc4030

Leon Alrae (1):
      MAINTAINERS: update target-mips maintainers

 MAINTAINERS     |  2 +-
 hw/dma/rc4030.c | 81 +++++++++++++++++++--------------------------------------
 2 files changed, 28 insertions(+), 55 deletions(-)

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 29 July 2016 at 10:11, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> Just a couple of bug fixes for rc1.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit 21a21b853a1bb606358af61e738abfb9aecbd720:
>
>   Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging (2016-07-27 18:18:21 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20160729
>
> for you to fetch changes up to 701074a6fc7470d0ed54e4a4bcd4d491ad8da22e:
>
>   target-mips: fix EntryHi.EHINV being cleared on TLB exception (2016-07-28 11:24:02 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2016-07-29
>
> Changes:
> * bug fixes

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Leon Alrae]

Hi,

Just a couple of bug fixes for rc1.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit 21a21b853a1bb606358af61e738abfb9aecbd720:

  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging (2016-07-27 18:18:21 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160729

for you to fetch changes up to 701074a6fc7470d0ed54e4a4bcd4d491ad8da22e:

  target-mips: fix EntryHi.EHINV being cleared on TLB exception (2016-07-28 11:24:02 +0100)

----------------------------------------------------------------
MIPS patches 2016-07-29

Changes:
* bug fixes

----------------------------------------------------------------
Leon Alrae (1):
      target-mips: fix EntryHi.EHINV being cleared on TLB exception

Paul Burton (1):
      hw/mips_malta: Fix YAMON API print routine

 hw/mips/mips_malta.c | 2 +-
 target-mips/helper.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 13 May 2016 at 11:44, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> Just two patches in the first target-mips pullreq for 2.7.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit bfc766d38e1fae5767d43845c15c79ac8fa6d6af:
>
>   Update version for v2.6.0 release (2016-05-11 16:44:26 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20160513
>
> for you to fetch changes up to 7fe91a5b33fe100bbc68ee434f947752c69b3f68:
>
>   hw/display: QOM'ify jazz_led.c (2016-05-13 09:33:38 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2016-05-13
>
> Changes:
> * fix zeroing CP0.WatchLo registers in soft reset
> * QOMify Jazz led
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Leon Alrae]

Hi,

Just two patches in the first target-mips pullreq for 2.7.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit bfc766d38e1fae5767d43845c15c79ac8fa6d6af:

  Update version for v2.6.0 release (2016-05-11 16:44:26 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160513

for you to fetch changes up to 7fe91a5b33fe100bbc68ee434f947752c69b3f68:

  hw/display: QOM'ify jazz_led.c (2016-05-13 09:33:38 +0100)

----------------------------------------------------------------
MIPS patches 2016-05-13

Changes:
* fix zeroing CP0.WatchLo registers in soft reset
* QOMify Jazz led

----------------------------------------------------------------
Aurelien Jarno (1):
      target-mips: fix call to memset in soft reset code

xiaoqiang.zhao (1):
      hw/display: QOM'ify jazz_led.c

 hw/display/jazz_led.c | 18 +++++++++++-------
 target-mips/helper.c  |  2 +-
 2 files changed, 12 insertions(+), 8 deletions(-)

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 24 November 2015 at 16:59, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> Just a couple of MIPS64 64-bit addressing bug fixes for 2.5-rc2.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit 5522a841cab5f15ac0f8d207b320c21755a7a1a5:
>
>   Merge remote-tracking branch 'remotes/ehabkost/tags/numa-pull-request' into staging (2015-11-23 16:07:49 +0000)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20151124
>
> for you to fetch changes up to f93c3a8d0c0c1038dbe1e957eb8ab92671137975:
>
>   target-mips: flush QEMU TLB when disabling 64-bit addressing (2015-11-24 11:01:03 +0000)
>
> ----------------------------------------------------------------
> MIPS patches 2015-11-24
>

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Leon Alrae]

Hi,

Just a couple of MIPS64 64-bit addressing bug fixes for 2.5-rc2.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit 5522a841cab5f15ac0f8d207b320c21755a7a1a5:

  Merge remote-tracking branch 'remotes/ehabkost/tags/numa-pull-request' into staging (2015-11-23 16:07:49 +0000)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20151124

for you to fetch changes up to f93c3a8d0c0c1038dbe1e957eb8ab92671137975:

  target-mips: flush QEMU TLB when disabling 64-bit addressing (2015-11-24 11:01:03 +0000)

----------------------------------------------------------------
MIPS patches 2015-11-24

Changes:
* bugfixes for accessing 64-bit addresses

----------------------------------------------------------------
James Hogan (1):
      target-mips: Fix exceptions while UX=0

Leon Alrae (1):
      target-mips: flush QEMU TLB when disabling 64-bit addressing

 target-mips/cpu.h       | 18 +++++++++++++++++-
 target-mips/helper.c    | 12 ++++++++++++
 target-mips/op_helper.c | 13 -------------
 3 files changed, 29 insertions(+), 14 deletions(-)

Re: [Qemu-devel] [PULL 0/2] target-mips queue

[Peter Maydell]

On 11 March 2015 at 16:15, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> This pull request contains remaining change for 2.3 which was originally
> submitted before soft-freeze.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit 48412371415a260d00fc7fdcdb400da55f268828:
>
>   Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging (2015-03-11 11:12:35 +0000)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20150311
>
> for you to fetch changes up to 644511117e7ca9f26d633a59c202a297113a796c:
>
>   target-mips: add missing MSACSR and restore fp_status and hflags (2015-03-11 14:13:57 +0000)
>
> ----------------------------------------------------------------
> MIPS patches 2015-03-11
>
> Changes:
> * use VMStateDescription for MIPS CPU
>
> ----------------------------------------------------------------
Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/2] target-mips queue

[Leon Alrae]

Hi,

This pull request contains remaining change for 2.3 which was originally
submitted before soft-freeze.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit 48412371415a260d00fc7fdcdb400da55f268828:

  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging (2015-03-11 11:12:35 +0000)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20150311

for you to fetch changes up to 644511117e7ca9f26d633a59c202a297113a796c:

  target-mips: add missing MSACSR and restore fp_status and hflags (2015-03-11 14:13:57 +0000)

----------------------------------------------------------------
MIPS patches 2015-03-11

Changes:
* use VMStateDescription for MIPS CPU

----------------------------------------------------------------
Leon Alrae (2):
      target-mips: replace cpu_save/cpu_load with VMStateDescription
      target-mips: add missing MSACSR and restore fp_status and hflags

 target-mips/cpu-qom.h        |   4 +
 target-mips/cpu.c            |   1 +
 target-mips/cpu.h            |  19 +-
 target-mips/machine.c        | 571 ++++++++++++++++++++-----------------------
 target-mips/msa_helper.c     |  12 +-
 target-mips/translate_init.c |  10 +-
 6 files changed, 288 insertions(+), 329 deletions(-)