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From: Peter Maydell <peter.maydell@linaro.org>
To: Alistair Francis <Alistair.Francis@wdc.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
	 "alistair23@gmail.com" <alistair23@gmail.com>,
	"palmer@sifive.com" <palmer@sifive.com>
Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH for 4.1 v1 4/6] target/riscvL Remove the unused any CPU
Date: Tue, 19 Mar 2019 19:10:11 +0000	[thread overview]
Message-ID: <CAFEAcA-x0r6a7uyR8KDBp2qv7KwRZu3dKxK73-XN7aAzgz=e_A@mail.gmail.com> (raw)
In-Reply-To: <073a79909f5ec317747ff8330744e6d7dabec717.1553019560.git.alistair.francis@wdc.com>

On Tue, 19 Mar 2019 at 18:24, Alistair Francis <Alistair.Francis@wdc.com> wrote:
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  target/riscv/cpu.c | 10 ----------
>  target/riscv/cpu.h |  1 -
>  2 files changed, 11 deletions(-)

Won't this break linux-user? cpu_get_model() in linux-user/riscv/target_elf.h
specifies the "any" CPU as the default to use if the user doesn't
pass one on the command line. (In general you want the default for
linux-user to be an "as many features as possible enabled" CPU.)

thanks
-- PMM


  reply	other threads:[~2019-03-19 19:20 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-19 18:20 [Qemu-riscv] [PATCH for 4.1 v1 0/6] RISC-V: Allow specifying CPU ISA via command line Alistair Francis
2019-03-19 18:20 ` [Qemu-riscv] [PATCH for 4.1 v1 1/6] target/riscv: Fall back to generating a RISC-V CPU Alistair Francis
2019-03-19 18:21 ` [Qemu-riscv] [PATCH for 4.1 v1 2/6] target/riscv: Create settable CPU properties Alistair Francis
2019-03-19 18:21 ` [Qemu-riscv] [PATCH for 4.1 v1 3/6] riscv: virt: Allow specifying a CPU via commandline Alistair Francis
2019-03-19 18:21 ` [Qemu-riscv] [PATCH for 4.1 v1 4/6] target/riscvL Remove the unused any CPU Alistair Francis
2019-03-19 19:10   ` Peter Maydell [this message]
2019-03-20 21:35     ` [Qemu-riscv] [Qemu-devel] " Alistair Francis
2019-03-19 18:21 ` [Qemu-riscv] [PATCH for 4.1 v1 5/6] target/riscv: Remove the generic no MMU CPUs Alistair Francis
2019-03-19 18:21 ` [Qemu-riscv] [PATCH for 4.1 v1 6/6] riscv: Add a generic spike machine Alistair Francis

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