From: Peter Maydell <peter.maydell@linaro.org> To: Shannon Zhao <zhaoshenglong@huawei.com> Cc: "kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>, Marc Zyngier <marc.zyngier@arm.com>, Christoffer Dall <christoffer.dall@linaro.org>, kvm-devel <kvm@vger.kernel.org>, Will Deacon <will.deacon@arm.com>, Shannon Zhao <shannon.zhao@linaro.org>, arm-mail-list <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Date: Thu, 7 Jan 2016 14:36:18 +0000 [thread overview] Message-ID: <CAFEAcA_MDiOphseZ7RGNE3G=4ZDF5SFV5krOjanPbVuhgg9gnQ@mail.gmail.com> (raw) In-Reply-To: <1450771695-11948-21-git-send-email-zhaoshenglong@huawei.com> On 22 December 2015 at 08:08, Shannon Zhao <zhaoshenglong@huawei.com> wrote: > From: Shannon Zhao <shannon.zhao@linaro.org> > > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement > the kvm_device_ops for it. > > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> > --- > Documentation/virtual/kvm/devices/arm-pmu.txt | 24 +++++ > arch/arm64/include/uapi/asm/kvm.h | 4 + > include/linux/kvm_host.h | 1 + > include/uapi/linux/kvm.h | 2 + > virt/kvm/arm/pmu.c | 128 ++++++++++++++++++++++++++ > virt/kvm/kvm_main.c | 4 + > 6 files changed, 163 insertions(+) > create mode 100644 Documentation/virtual/kvm/devices/arm-pmu.txt > > diff --git a/Documentation/virtual/kvm/devices/arm-pmu.txt b/Documentation/virtual/kvm/devices/arm-pmu.txt > new file mode 100644 > index 0000000..dda864e > --- /dev/null > +++ b/Documentation/virtual/kvm/devices/arm-pmu.txt > @@ -0,0 +1,24 @@ > +ARM Virtual Performance Monitor Unit (vPMU) > +=========================================== > + > +Device types supported: > + KVM_DEV_TYPE_ARM_PMU_V3 ARM Performance Monitor Unit v3 > + > +Instantiate one PMU instance for per VCPU through this API. Do you mean that userspace has to call this API once per vCPU to create each PMU, or that calling the device create ioctl once makes the kernel instantiate a PMU for each vCPU? (It's a little bit confusing that we say "this API" to mean "not the API documented in this file at all but actually the KVM_CREATE_DEVICE ioctl", but I see we do that in the GIC API docs too.) > + > +Groups: > + KVM_DEV_ARM_PMU_GRP_IRQ > + Attributes: > + The attr field of kvm_device_attr encodes one value: > + bits: | 63 .... 32 | 31 .... 0 | > + values: | reserved | vcpu_index | > + A value describing the PMU overflow interrupt number for the specified > + vcpu_index vcpu. This interrupt could be a PPI or SPI, but for one VM the > + interrupt type must be same for each vcpu. As a PPI, the interrupt number is > + same for all vcpus, while as a SPI it must be different for each vcpu. I see we're using vcpu_index rather than MPIDR affinity value for specifying which CPU we're configuring. Is this in line with our planned API for GICv3 configuration? > + Errors: > + -ENXIO: Unsupported attribute group > + -EBUSY: The PMU overflow interrupt is already set > + -ENODEV: Getting the PMU overflow interrupt number while it's not set > + -EINVAL: Invalid vcpu_index or PMU overflow interrupt number supplied What happens if you create a PMU but then never set the IRQ number? Is there a default or does the VM refuse to run or something? Do we want an attribute like KVM_DEV_ARM_VGIC_CTRL_INIT so userspace can say "I have definitely completed configuration of this device now" ? We wound up with a fair amount of legacy mess to deal with in the GIC code because we didn't put one of those in from the start. (Perhaps we should aim to standardize on all kvm devices having one?) thanks -- PMM
WARNING: multiple messages have this Message-ID (diff)
From: peter.maydell@linaro.org (Peter Maydell) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Date: Thu, 7 Jan 2016 14:36:18 +0000 [thread overview] Message-ID: <CAFEAcA_MDiOphseZ7RGNE3G=4ZDF5SFV5krOjanPbVuhgg9gnQ@mail.gmail.com> (raw) In-Reply-To: <1450771695-11948-21-git-send-email-zhaoshenglong@huawei.com> On 22 December 2015 at 08:08, Shannon Zhao <zhaoshenglong@huawei.com> wrote: > From: Shannon Zhao <shannon.zhao@linaro.org> > > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement > the kvm_device_ops for it. > > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> > --- > Documentation/virtual/kvm/devices/arm-pmu.txt | 24 +++++ > arch/arm64/include/uapi/asm/kvm.h | 4 + > include/linux/kvm_host.h | 1 + > include/uapi/linux/kvm.h | 2 + > virt/kvm/arm/pmu.c | 128 ++++++++++++++++++++++++++ > virt/kvm/kvm_main.c | 4 + > 6 files changed, 163 insertions(+) > create mode 100644 Documentation/virtual/kvm/devices/arm-pmu.txt > > diff --git a/Documentation/virtual/kvm/devices/arm-pmu.txt b/Documentation/virtual/kvm/devices/arm-pmu.txt > new file mode 100644 > index 0000000..dda864e > --- /dev/null > +++ b/Documentation/virtual/kvm/devices/arm-pmu.txt > @@ -0,0 +1,24 @@ > +ARM Virtual Performance Monitor Unit (vPMU) > +=========================================== > + > +Device types supported: > + KVM_DEV_TYPE_ARM_PMU_V3 ARM Performance Monitor Unit v3 > + > +Instantiate one PMU instance for per VCPU through this API. Do you mean that userspace has to call this API once per vCPU to create each PMU, or that calling the device create ioctl once makes the kernel instantiate a PMU for each vCPU? (It's a little bit confusing that we say "this API" to mean "not the API documented in this file at all but actually the KVM_CREATE_DEVICE ioctl", but I see we do that in the GIC API docs too.) > + > +Groups: > + KVM_DEV_ARM_PMU_GRP_IRQ > + Attributes: > + The attr field of kvm_device_attr encodes one value: > + bits: | 63 .... 32 | 31 .... 0 | > + values: | reserved | vcpu_index | > + A value describing the PMU overflow interrupt number for the specified > + vcpu_index vcpu. This interrupt could be a PPI or SPI, but for one VM the > + interrupt type must be same for each vcpu. As a PPI, the interrupt number is > + same for all vcpus, while as a SPI it must be different for each vcpu. I see we're using vcpu_index rather than MPIDR affinity value for specifying which CPU we're configuring. Is this in line with our planned API for GICv3 configuration? > + Errors: > + -ENXIO: Unsupported attribute group > + -EBUSY: The PMU overflow interrupt is already set > + -ENODEV: Getting the PMU overflow interrupt number while it's not set > + -EINVAL: Invalid vcpu_index or PMU overflow interrupt number supplied What happens if you create a PMU but then never set the IRQ number? Is there a default or does the VM refuse to run or something? Do we want an attribute like KVM_DEV_ARM_VGIC_CTRL_INIT so userspace can say "I have definitely completed configuration of this device now" ? We wound up with a fair amount of legacy mess to deal with in the GIC code because we didn't put one of those in from the start. (Perhaps we should aim to standardize on all kvm devices having one?) thanks -- PMM
next prev parent reply other threads:[~2016-01-07 14:36 UTC|newest] Thread overview: 197+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-22 8:07 [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2015-12-22 8:07 ` [PATCH v8 01/20] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2016-01-07 10:20 ` Marc Zyngier 2016-01-07 10:20 ` Marc Zyngier 2015-12-22 8:07 ` [PATCH v8 02/20] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2016-01-07 10:21 ` Marc Zyngier 2016-01-07 10:21 ` Marc Zyngier 2016-01-07 19:07 ` Andrew Jones 2016-01-07 19:07 ` Andrew Jones 2015-12-22 8:07 ` [PATCH v8 03/20] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2016-01-07 10:23 ` Marc Zyngier 2016-01-07 10:23 ` Marc Zyngier 2015-12-22 8:07 ` [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2015-12-22 8:07 ` Shannon Zhao 2016-01-07 10:43 ` Marc Zyngier 2016-01-07 10:43 ` Marc Zyngier 2016-01-07 11:16 ` Shannon Zhao 2016-01-07 11:16 ` Shannon Zhao 2016-01-07 11:16 ` Shannon Zhao 2015-12-22 8:08 ` [PATCH v8 05/20] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 10:43 ` Marc Zyngier 2016-01-07 10:43 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 06/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 10:44 ` Marc Zyngier 2016-01-07 10:44 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 07/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 10:55 ` Marc Zyngier 2016-01-07 10:55 ` Marc Zyngier 2016-01-07 13:48 ` Marc Zyngier 2016-01-07 13:48 ` Marc Zyngier 2016-01-07 14:00 ` Shannon Zhao 2016-01-07 14:00 ` Shannon Zhao 2016-01-07 14:00 ` Shannon Zhao 2015-12-22 8:08 ` [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:03 ` Marc Zyngier 2016-01-07 11:03 ` Marc Zyngier 2016-01-07 11:11 ` Shannon Zhao 2016-01-07 11:11 ` Shannon Zhao 2016-01-07 11:11 ` Shannon Zhao 2016-01-07 12:36 ` Shannon Zhao 2016-01-07 12:36 ` Shannon Zhao 2016-01-07 12:36 ` Shannon Zhao 2016-01-07 13:15 ` Marc Zyngier 2016-01-07 13:15 ` Marc Zyngier 2016-01-07 12:09 ` Shannon Zhao 2016-01-07 12:09 ` Shannon Zhao 2016-01-07 12:09 ` Shannon Zhao 2016-01-07 13:01 ` Marc Zyngier 2016-01-07 13:01 ` Marc Zyngier 2016-01-07 19:17 ` Andrew Jones 2016-01-07 19:17 ` Andrew Jones 2015-12-22 8:08 ` [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:06 ` Marc Zyngier 2016-01-07 11:06 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 10/20] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:09 ` Marc Zyngier 2016-01-07 11:09 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 11/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:13 ` Marc Zyngier 2016-01-07 11:13 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 12/20] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:14 ` Marc Zyngier 2016-01-07 11:14 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 13/20] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:29 ` Marc Zyngier 2016-01-07 11:29 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 14/20] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 11:59 ` Marc Zyngier 2016-01-07 11:59 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1 Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 10:14 ` Marc Zyngier 2016-01-07 10:14 ` Marc Zyngier 2016-01-07 11:15 ` Shannon Zhao 2016-01-07 11:15 ` Shannon Zhao 2016-01-07 11:15 ` Shannon Zhao 2015-12-22 8:08 ` [PATCH v8 17/20] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 13:28 ` Marc Zyngier 2016-01-07 13:28 ` Marc Zyngier 2016-01-07 13:28 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 18/20] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 13:39 ` Marc Zyngier 2016-01-07 13:39 ` Marc Zyngier 2016-01-07 13:39 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 19/20] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 13:51 ` Marc Zyngier 2016-01-07 13:51 ` Marc Zyngier 2015-12-22 8:08 ` [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2015-12-22 8:08 ` Shannon Zhao 2016-01-07 13:56 ` Marc Zyngier 2016-01-07 13:56 ` Marc Zyngier 2016-01-07 14:35 ` Shannon Zhao 2016-01-07 14:35 ` Shannon Zhao 2016-01-07 14:35 ` Shannon Zhao 2016-01-07 14:36 ` Peter Maydell [this message] 2016-01-07 14:36 ` Peter Maydell 2016-01-07 14:49 ` Shannon Zhao 2016-01-07 14:49 ` Shannon Zhao 2016-01-07 14:56 ` Peter Maydell 2016-01-07 14:56 ` Peter Maydell 2016-01-07 20:36 ` Andrew Jones 2016-01-07 20:36 ` Andrew Jones 2016-01-09 12:29 ` Christoffer Dall 2016-01-09 12:29 ` Christoffer Dall 2016-01-09 15:03 ` Marc Zyngier 2016-01-09 15:03 ` Marc Zyngier 2016-01-11 8:45 ` Shannon Zhao 2016-01-11 8:45 ` Shannon Zhao 2016-01-11 8:59 ` Marc Zyngier 2016-01-11 8:59 ` Marc Zyngier 2016-01-11 11:52 ` Andrew Jones 2016-01-11 11:52 ` Andrew Jones 2016-01-11 12:03 ` Shannon Zhao 2016-01-11 12:03 ` Shannon Zhao 2016-01-11 14:07 ` Andrew Jones 2016-01-11 14:07 ` Andrew Jones 2016-01-11 15:09 ` Christoffer Dall 2016-01-11 15:09 ` Christoffer Dall 2016-01-11 16:09 ` Andrew Jones 2016-01-11 16:09 ` Andrew Jones 2016-01-11 16:13 ` Peter Maydell 2016-01-11 16:13 ` Peter Maydell 2016-01-11 16:48 ` Andrew Jones 2016-01-11 16:48 ` Andrew Jones 2016-01-11 16:21 ` Andrew Jones 2016-01-11 16:21 ` Andrew Jones 2016-01-11 16:29 ` Peter Maydell 2016-01-11 16:29 ` Peter Maydell 2016-01-11 16:44 ` Andrew Jones 2016-01-11 16:44 ` Andrew Jones 2016-01-08 3:06 ` Shannon Zhao 2016-01-08 3:06 ` Shannon Zhao 2016-01-08 10:24 ` Peter Maydell 2016-01-08 10:24 ` Peter Maydell 2016-01-08 12:15 ` Shannon Zhao 2016-01-08 12:15 ` Shannon Zhao 2016-01-08 12:56 ` Peter Maydell 2016-01-08 12:56 ` Peter Maydell 2016-01-08 13:31 ` Shannon Zhao 2016-01-08 13:31 ` Shannon Zhao 2016-01-07 20:18 ` Andrew Jones 2016-01-07 20:18 ` Andrew Jones 2016-01-08 2:53 ` Shannon Zhao 2016-01-08 2:53 ` Shannon Zhao 2016-01-08 2:53 ` Shannon Zhao 2016-01-08 11:22 ` Andrew Jones 2016-01-08 11:22 ` Andrew Jones 2016-01-08 15:20 ` Andrew Jones 2016-01-08 15:20 ` Andrew Jones 2016-01-08 15:59 ` Andrew Jones 2016-01-08 15:59 ` Andrew Jones 2016-01-07 14:10 ` [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Marc Zyngier 2016-01-07 14:10 ` Marc Zyngier 2016-01-07 14:12 ` Will Deacon 2016-01-07 14:12 ` Will Deacon 2016-01-07 14:21 ` Marc Zyngier 2016-01-07 14:21 ` Marc Zyngier
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