* [PATCH 0/2] Fixes for TC358775 DSI to LVDS bridge
@ 2022-06-15 22:22 ` Jiri Vanek
0 siblings, 0 replies; 10+ messages in thread
From: Jiri Vanek @ 2022-06-15 22:22 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss
Cc: Jonas Karlman, David Airlie, dri-devel, Jiri Vanek, linux-kernel,
Jernej Skrabec, Laurent Pinchart, Vinay Simha B N
This patchset fixes two bugs in the driver for TC358775 DSI to LVDS bridge.
Jiri Vanek (2):
drm/bridge/tc358775: Return before displaying inappropriate error
message
drm/bridge/tc358775: Fix DSI clock division for vsync delay
calculation
drivers/gpu/drm/bridge/tc358775.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.30.2
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/2] drm/bridge/tc358775: Return before displaying inappropriate error message
2022-06-15 22:22 ` Jiri Vanek
@ 2022-06-15 22:22 ` Jiri Vanek
-1 siblings, 0 replies; 10+ messages in thread
From: Jiri Vanek @ 2022-06-15 22:22 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss
Cc: Vinay Simha B N, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
David Airlie, Daniel Vetter, dri-devel, linux-kernel, Jiri Vanek
Function for reading from i2c device register displays error message even
if reading ends correctly. Add return to avoid falling through into
the fail label.
Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
---
drivers/gpu/drm/bridge/tc358775.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index 62a7ef352daa..cd2721ab02a9 100644
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -339,6 +339,7 @@ static void d2l_read(struct i2c_client *i2c, u16 addr, u32 *val)
goto fail;
pr_debug("d2l: I2C : addr:%04x value:%08x\n", addr, *val);
+ return;
fail:
dev_err(&i2c->dev, "Error %d reading from subaddress 0x%x\n",
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 1/2] drm/bridge/tc358775: Return before displaying inappropriate error message
@ 2022-06-15 22:22 ` Jiri Vanek
0 siblings, 0 replies; 10+ messages in thread
From: Jiri Vanek @ 2022-06-15 22:22 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss
Cc: Jonas Karlman, David Airlie, dri-devel, Jiri Vanek, linux-kernel,
Jernej Skrabec, Laurent Pinchart, Vinay Simha B N
Function for reading from i2c device register displays error message even
if reading ends correctly. Add return to avoid falling through into
the fail label.
Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
---
drivers/gpu/drm/bridge/tc358775.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index 62a7ef352daa..cd2721ab02a9 100644
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -339,6 +339,7 @@ static void d2l_read(struct i2c_client *i2c, u16 addr, u32 *val)
goto fail;
pr_debug("d2l: I2C : addr:%04x value:%08x\n", addr, *val);
+ return;
fail:
dev_err(&i2c->dev, "Error %d reading from subaddress 0x%x\n",
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 1/2] drm/bridge/tc358775: Return before displaying inappropriate error message
2022-06-15 22:22 ` Jiri Vanek
(?)
@ 2022-06-17 4:32 ` Vinay Simha B N
-1 siblings, 0 replies; 10+ messages in thread
From: Vinay Simha B N @ 2022-06-17 4:32 UTC (permalink / raw)
To: Jiri Vanek
Cc: Jonas Karlman, David Airlie, Robert Foss,
open list:DRM PANEL DRIVERS, Neil Armstrong, open list,
Jernej Skrabec, Andrzej Hajda, Laurent Pinchart
[-- Attachment #1: Type: text/plain, Size: 972 bytes --]
Reviewed-by: Vinay Simha BN <simhavcs@gmail.com>
On Thu, Jun 16, 2022 at 3:55 AM Jiri Vanek <jirivanek1@gmail.com> wrote:
> Function for reading from i2c device register displays error message even
> if reading ends correctly. Add return to avoid falling through into
> the fail label.
>
> Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
> ---
> drivers/gpu/drm/bridge/tc358775.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/bridge/tc358775.c
> b/drivers/gpu/drm/bridge/tc358775.c
> index 62a7ef352daa..cd2721ab02a9 100644
> --- a/drivers/gpu/drm/bridge/tc358775.c
> +++ b/drivers/gpu/drm/bridge/tc358775.c
> @@ -339,6 +339,7 @@ static void d2l_read(struct i2c_client *i2c, u16 addr,
> u32 *val)
> goto fail;
>
> pr_debug("d2l: I2C : addr:%04x value:%08x\n", addr, *val);
> + return;
>
> fail:
> dev_err(&i2c->dev, "Error %d reading from subaddress 0x%x\n",
> --
> 2.30.2
>
>
--
regards,
vinaysimha
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/bridge/tc358775: Fix DSI clock division for vsync delay calculation
2022-06-15 22:22 ` Jiri Vanek
@ 2022-06-15 22:22 ` Jiri Vanek
-1 siblings, 0 replies; 10+ messages in thread
From: Jiri Vanek @ 2022-06-15 22:22 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss
Cc: Jonas Karlman, David Airlie, dri-devel, Jiri Vanek, linux-kernel,
Jernej Skrabec, Laurent Pinchart, Vinay Simha B N
Use the same PCLK divide option (divide DSI clock to generate pixel clock)
which is set to LVDS Configuration Register (LVCFG) also for a VSync delay
calculation. Without this change an auxiliary variable could underflow
during the calculation for some dual-link LVDS panels and then calculated
VSync delay is wrong. This leads to a shifted picture on a panel.
Tested-by: Jiri Vanek <jirivanek1@gmail.com>
Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
---
drivers/gpu/drm/bridge/tc358775.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index cd2721ab02a9..fecb8558b49a 100644
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -430,7 +430,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge)
val = TC358775_VPCTRL_MSF(1);
dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000;
- clkdiv = dsiclk / DIVIDE_BY_3 * tc->lvds_link;
+ clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3);
byteclk = dsiclk / 4;
t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes;
t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_porch) / 1000;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/bridge/tc358775: Fix DSI clock division for vsync delay calculation
@ 2022-06-15 22:22 ` Jiri Vanek
0 siblings, 0 replies; 10+ messages in thread
From: Jiri Vanek @ 2022-06-15 22:22 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss
Cc: Vinay Simha B N, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
David Airlie, Daniel Vetter, dri-devel, linux-kernel, Jiri Vanek
Use the same PCLK divide option (divide DSI clock to generate pixel clock)
which is set to LVDS Configuration Register (LVCFG) also for a VSync delay
calculation. Without this change an auxiliary variable could underflow
during the calculation for some dual-link LVDS panels and then calculated
VSync delay is wrong. This leads to a shifted picture on a panel.
Tested-by: Jiri Vanek <jirivanek1@gmail.com>
Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
---
drivers/gpu/drm/bridge/tc358775.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index cd2721ab02a9..fecb8558b49a 100644
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -430,7 +430,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge)
val = TC358775_VPCTRL_MSF(1);
dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000;
- clkdiv = dsiclk / DIVIDE_BY_3 * tc->lvds_link;
+ clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3);
byteclk = dsiclk / 4;
t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes;
t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_porch) / 1000;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] drm/bridge/tc358775: Fix DSI clock division for vsync delay calculation
2022-06-15 22:22 ` Jiri Vanek
(?)
@ 2022-06-17 4:33 ` Vinay Simha B N
-1 siblings, 0 replies; 10+ messages in thread
From: Vinay Simha B N @ 2022-06-17 4:33 UTC (permalink / raw)
To: Jiri Vanek
Cc: Jonas Karlman, David Airlie, Robert Foss,
open list:DRM PANEL DRIVERS, Neil Armstrong, open list,
Jernej Skrabec, Andrzej Hajda, Laurent Pinchart
[-- Attachment #1: Type: text/plain, Size: 1497 bytes --]
Reviewed-by: Vinay Simha BN <simhavcs@gmail.com>
On Thu, Jun 16, 2022 at 3:55 AM Jiri Vanek <jirivanek1@gmail.com> wrote:
> Use the same PCLK divide option (divide DSI clock to generate pixel clock)
> which is set to LVDS Configuration Register (LVCFG) also for a VSync delay
> calculation. Without this change an auxiliary variable could underflow
> during the calculation for some dual-link LVDS panels and then calculated
> VSync delay is wrong. This leads to a shifted picture on a panel.
>
> Tested-by: Jiri Vanek <jirivanek1@gmail.com>
> Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
> ---
> drivers/gpu/drm/bridge/tc358775.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358775.c
> b/drivers/gpu/drm/bridge/tc358775.c
> index cd2721ab02a9..fecb8558b49a 100644
> --- a/drivers/gpu/drm/bridge/tc358775.c
> +++ b/drivers/gpu/drm/bridge/tc358775.c
> @@ -430,7 +430,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge)
> val = TC358775_VPCTRL_MSF(1);
>
> dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000;
> - clkdiv = dsiclk / DIVIDE_BY_3 * tc->lvds_link;
> + clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 :
> DIVIDE_BY_3);
> byteclk = dsiclk / 4;
> t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes;
> t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len +
> hfront_porch) / 1000;
> --
> 2.30.2
>
>
--
regards,
vinaysimha
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/2] Fixes for TC358775 DSI to LVDS bridge
2022-06-15 22:22 ` Jiri Vanek
@ 2022-06-20 19:43 ` Robert Foss
-1 siblings, 0 replies; 10+ messages in thread
From: Robert Foss @ 2022-06-20 19:43 UTC (permalink / raw)
To: Jiri Vanek
Cc: Andrzej Hajda, Neil Armstrong, Vinay Simha B N, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter,
dri-devel, linux-kernel
On Thu, 16 Jun 2022 at 00:25, Jiri Vanek <jirivanek1@gmail.com> wrote:
>
> This patchset fixes two bugs in the driver for TC358775 DSI to LVDS bridge.
>
> Jiri Vanek (2):
> drm/bridge/tc358775: Return before displaying inappropriate error
> message
> drm/bridge/tc358775: Fix DSI clock division for vsync delay
> calculation
>
> drivers/gpu/drm/bridge/tc358775.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Applied to drm-misc-next.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/2] Fixes for TC358775 DSI to LVDS bridge
@ 2022-06-20 19:43 ` Robert Foss
0 siblings, 0 replies; 10+ messages in thread
From: Robert Foss @ 2022-06-20 19:43 UTC (permalink / raw)
To: Jiri Vanek
Cc: Jonas Karlman, David Airlie, dri-devel, Neil Armstrong,
linux-kernel, Jernej Skrabec, Andrzej Hajda, Laurent Pinchart,
Vinay Simha B N
On Thu, 16 Jun 2022 at 00:25, Jiri Vanek <jirivanek1@gmail.com> wrote:
>
> This patchset fixes two bugs in the driver for TC358775 DSI to LVDS bridge.
>
> Jiri Vanek (2):
> drm/bridge/tc358775: Return before displaying inappropriate error
> message
> drm/bridge/tc358775: Fix DSI clock division for vsync delay
> calculation
>
> drivers/gpu/drm/bridge/tc358775.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Applied to drm-misc-next.
^ permalink raw reply [flat|nested] 10+ messages in thread