[PATCH 0/7] ARM: dts: sunxi: Support ALL-H3-CC H2+/H5 variants

[PATCH 0/7] ARM: dts: sunxi: Support ALL-H3-CC H2+/H5 variants

[Chen-Yu Tsai]

Hi,

This series is adds support for the H2+ and H5 variants of the Libre
Computer Project ALL-H3-CC board. The board uses the same board design
with the H2+, H3, and H5 SoCs, with different memory capacities. The
H3 version was supported in 4.16.

The H5 version is mostly the same as Neil's. I had the patches around
for a few days and was waiting for stuff to calm down for the H3/H5
branch. These patches are properly rebased.

Patch 1 fixes the regulator voltage specified for the VCC-1V2 regulator,
which is a fixed regulator and should obviously be outputting 1.2 volts,
not 3.3 volts.

Patch 2 splits out the common board design of the ALL-H3-CC.

Patch 3 cleans up the H2+ section of the ARM dts Makefile.

Patch 4 adds a device tree for the H2+ variant of ALL-H3-CC.

Patch 5 adds a cpu0 label for the first core on the H5 SoC.
This is needed so we can share the ALL-H3-CC device tree, which
already has DVFS enabled and fixed regulator set for the CPU domain.

Patch 6 cleans up the H5 section of the arm64 allwinner dts Makefile.

Patch 7 adds a device tree for the H5 variant of ALL-H3-CC.

Please have a look.

ChenYu

Chen-Yu Tsai (7):
  ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage
  ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC
  ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile
  ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.
  arm64: dts: allwinner: h5: Add cpu0 label for first cpu
  arm64: dts: allwinner: Sort dtb entries in Makefile
  arm64: dts: allwinner: h5: Add Libre Computer Board ALL-H3-CC H5 ver.

 arch/arm/boot/dts/Makefile                    |   3 +-
 .../dts/sun8i-h2-plus-libretech-all-h3-cc.dts |  13 ++
 .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
 ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  15 +-
 arch/arm64/boot/dts/allwinner/Makefile        |   5 +-
 .../sun50i-h5-libretech-all-h3-cc.dts         |  14 ++
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi  |   2 +-
 7 files changed, 40 insertions(+), 225 deletions(-)
 create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
 copy arch/arm/boot/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-hx-libretech-all-h3-cc.dtsi} (93%)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts

-- 
2.17.0

[PATCH 0/7] ARM: dts: sunxi: Support ALL-H3-CC H2+/H5 variants

[Chen-Yu Tsai]

Hi,

This series is adds support for the H2+ and H5 variants of the Libre
Computer Project ALL-H3-CC board. The board uses the same board design
with the H2+, H3, and H5 SoCs, with different memory capacities. The
H3 version was supported in 4.16.

The H5 version is mostly the same as Neil's. I had the patches around
for a few days and was waiting for stuff to calm down for the H3/H5
branch. These patches are properly rebased.

Patch 1 fixes the regulator voltage specified for the VCC-1V2 regulator,
which is a fixed regulator and should obviously be outputting 1.2 volts,
not 3.3 volts.

Patch 2 splits out the common board design of the ALL-H3-CC.

Patch 3 cleans up the H2+ section of the ARM dts Makefile.

Patch 4 adds a device tree for the H2+ variant of ALL-H3-CC.

Patch 5 adds a cpu0 label for the first core on the H5 SoC.
This is needed so we can share the ALL-H3-CC device tree, which
already has DVFS enabled and fixed regulator set for the CPU domain.

Patch 6 cleans up the H5 section of the arm64 allwinner dts Makefile.

Patch 7 adds a device tree for the H5 variant of ALL-H3-CC.

Please have a look.

ChenYu

Chen-Yu Tsai (7):
  ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage
  ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC
  ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile
  ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.
  arm64: dts: allwinner: h5: Add cpu0 label for first cpu
  arm64: dts: allwinner: Sort dtb entries in Makefile
  arm64: dts: allwinner: h5: Add Libre Computer Board ALL-H3-CC H5 ver.

 arch/arm/boot/dts/Makefile                    |   3 +-
 .../dts/sun8i-h2-plus-libretech-all-h3-cc.dts |  13 ++
 .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
 ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  15 +-
 arch/arm64/boot/dts/allwinner/Makefile        |   5 +-
 .../sun50i-h5-libretech-all-h3-cc.dts         |  14 ++
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi  |   2 +-
 7 files changed, 40 insertions(+), 225 deletions(-)
 create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
 copy arch/arm/boot/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-hx-libretech-all-h3-cc.dtsi} (93%)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts

-- 
2.17.0

[PATCH 1/7] ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage

[Chen-Yu Tsai]

The voltage of the VCC-1V2 regulator on the ALL-H3-CC H3 ver. should be
1.2V, not the 3.3V currently defined in the device tree.

Fix the voltage in the device tree.

Fixes: 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
		      Computer Board ALL-H3-CC H3 ver.")
Cc: <stable@vger.kernel.org> # 4.16.x
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
index 5971b8b0b768..db6b35bb65ff 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -62,8 +62,8 @@
 	reg_vcc1v2: vcc1v2 {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc1v2";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
 		regulator-always-on;
 		regulator-boot-on;
 		vin-supply = <&reg_vcc5v0>;
-- 
2.17.0

[PATCH 1/7] ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage

[Chen-Yu Tsai]

The voltage of the VCC-1V2 regulator on the ALL-H3-CC H3 ver. should be
1.2V, not the 3.3V currently defined in the device tree.

Fix the voltage in the device tree.

Fixes: 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
		      Computer Board ALL-H3-CC H3 ver.")
Cc: <stable@vger.kernel.org> # 4.16.x
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
index 5971b8b0b768..db6b35bb65ff 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -62,8 +62,8 @@
 	reg_vcc1v2: vcc1v2 {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc1v2";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
 		regulator-always-on;
 		regulator-boot-on;
 		vin-supply = <&reg_vcc5v0>;
-- 
2.17.0

[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

The Libre Computer Project ALL-H3-CC has three models, all using the
same board design, but with different pin compatible SoCs and amount of
DRAM.

Currently only the H3 1GB DRAM variant is supported. To support the two
other variants, first split the original device tree into a common board
design part and an SoC specific part.

The SoC part only defines which SoC is used and model name, and includes
the SoC specific dtsi file and the common design dtsi file.

Also fix up the SPDX identifier line to use the correct comment style,
and place it on the first line.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
 ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
 2 files changed, 5 insertions(+), 219 deletions(-)
 copy arch/arm/boot/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-hx-libretech-all-h3-cc.dtsi} (95%)

diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
index db6b35bb65ff..eabc2208efdb 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -1,222 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 /dts-v1/;
 #include "sun8i-h3.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "sunxi-hx-libretech-all-h3-cc.dtsi"
 
 / {
 	model = "Libre Computer Board ALL-H3-CC H3";
 	compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
-
-	aliases {
-		ethernet0 = &emac;
-		serial0 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	connector {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		pwr_led {
-			label = "librecomputer:green:pwr";
-			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
-			default-state = "on";
-		};
-
-		status_led {
-			label = "librecomputer:blue:status";
-			gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
-		};
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-
-		power {
-			label = "power";
-			linux,code = <KEY_POWER>;
-			gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
-		};
-	};
-
-	reg_vcc1v2: vcc1v2 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc1v2";
-		regulator-min-microvolt = <1200000>;
-		regulator-max-microvolt = <1200000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc5v0>;
-		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-		enable-active-high;
-	};
-
-	reg_vcc3v3: vcc3v3 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&reg_vcc5v0>;
-	};
-
-	/* This represents the board's 5V input */
-	reg_vcc5v0: vcc5v0 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	reg_vcc_dram: vcc-dram {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc-dram";
-		regulator-min-microvolt = <1500000>;
-		regulator-max-microvolt = <1500000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc5v0>;
-		gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
-		enable-active-high;
-	};
-
-	reg_vcc_io: vcc-io {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc-io";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc3v3>;
-		gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
-	};
-
-	reg_vdd_cpux: vdd-cpux {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd-cpux";
-		regulator-min-microvolt = <1200000>;
-		regulator-max-microvolt = <1200000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc5v0>;
-		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-		enable-active-high;
-	};
-};
-
-&codec {
-	allwinner,audio-routing =
-		"Line Out", "LINEOUT",
-		"MIC1", "Mic",
-		"Mic",  "MBIAS";
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&reg_vdd_cpux>;
-};
-
-&de {
-	status = "okay";
-};
-
-&ehci0 {
-	status = "okay";
-};
-
-&ehci1 {
-	status = "okay";
-};
-
-&ehci2 {
-	status = "okay";
-};
-
-&ehci3 {
-	status = "okay";
-};
-
-&emac {
-	phy-handle = <&int_mii_phy>;
-	phy-mode = "mii";
-	allwinner,leds-active-low;
-	status = "okay";
-};
-
-&hdmi {
-	status = "okay";
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&ir {
-	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
-	status = "okay";
-};
-
-&mmc0 {
-	vmmc-supply = <&reg_vcc_io>;
-	bus-width = <4>;
-	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-	status = "okay";
-};
-
-&ohci0 {
-	status = "okay";
-};
-
-&ohci1 {
-	status = "okay";
-};
-
-&ohci2 {
-	status = "okay";
-};
-
-&ohci3 {
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
-	status = "okay";
-};
-
-&usb_otg {
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usbphy {
-	/* VBUS on USB ports are always on */
-	usb0_vbus-supply = <&reg_vcc5v0>;
-	usb1_vbus-supply = <&reg_vcc5v0>;
-	usb2_vbus-supply = <&reg_vcc5v0>;
-	usb3_vbus-supply = <&reg_vcc5v0>;
-	status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sunxi-hx-libretech-all-h3-cc.dtsi
similarity index 95%
copy from arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
copy to arch/arm/boot/dts/sunxi-hx-libretech-all-h3-cc.dtsi
index db6b35bb65ff..d4539c12c6e1 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sunxi-hx-libretech-all-h3-cc.dtsi
@@ -1,19 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ * Common design for Libre Computer ALL-H3-CC boards
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
  */
 
-/dts-v1/;
-#include "sun8i-h3.dtsi"
-
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Libre Computer Board ALL-H3-CC H3";
-	compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
-
 	aliases {
 		ethernet0 = &emac;
 		serial0 = &uart0;
-- 
2.17.0

[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

The Libre Computer Project ALL-H3-CC has three models, all using the
same board design, but with different pin compatible SoCs and amount of
DRAM.

Currently only the H3 1GB DRAM variant is supported. To support the two
other variants, first split the original device tree into a common board
design part and an SoC specific part.

The SoC part only defines which SoC is used and model name, and includes
the SoC specific dtsi file and the common design dtsi file.

Also fix up the SPDX identifier line to use the correct comment style,
and place it on the first line.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
 ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
 2 files changed, 5 insertions(+), 219 deletions(-)
 copy arch/arm/boot/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-hx-libretech-all-h3-cc.dtsi} (95%)

diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
index db6b35bb65ff..eabc2208efdb 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -1,222 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 /dts-v1/;
 #include "sun8i-h3.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "sunxi-hx-libretech-all-h3-cc.dtsi"
 
 / {
 	model = "Libre Computer Board ALL-H3-CC H3";
 	compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
-
-	aliases {
-		ethernet0 = &emac;
-		serial0 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	connector {
-		compatible = "hdmi-connector";
-		type = "a";
-
-		port {
-			hdmi_con_in: endpoint {
-				remote-endpoint = <&hdmi_out_con>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		pwr_led {
-			label = "librecomputer:green:pwr";
-			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
-			default-state = "on";
-		};
-
-		status_led {
-			label = "librecomputer:blue:status";
-			gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
-		};
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-
-		power {
-			label = "power";
-			linux,code = <KEY_POWER>;
-			gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
-		};
-	};
-
-	reg_vcc1v2: vcc1v2 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc1v2";
-		regulator-min-microvolt = <1200000>;
-		regulator-max-microvolt = <1200000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc5v0>;
-		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-		enable-active-high;
-	};
-
-	reg_vcc3v3: vcc3v3 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&reg_vcc5v0>;
-	};
-
-	/* This represents the board's 5V input */
-	reg_vcc5v0: vcc5v0 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	reg_vcc_dram: vcc-dram {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc-dram";
-		regulator-min-microvolt = <1500000>;
-		regulator-max-microvolt = <1500000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc5v0>;
-		gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
-		enable-active-high;
-	};
-
-	reg_vcc_io: vcc-io {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc-io";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc3v3>;
-		gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
-	};
-
-	reg_vdd_cpux: vdd-cpux {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd-cpux";
-		regulator-min-microvolt = <1200000>;
-		regulator-max-microvolt = <1200000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&reg_vcc5v0>;
-		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-		enable-active-high;
-	};
-};
-
-&codec {
-	allwinner,audio-routing =
-		"Line Out", "LINEOUT",
-		"MIC1", "Mic",
-		"Mic",  "MBIAS";
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&reg_vdd_cpux>;
-};
-
-&de {
-	status = "okay";
-};
-
-&ehci0 {
-	status = "okay";
-};
-
-&ehci1 {
-	status = "okay";
-};
-
-&ehci2 {
-	status = "okay";
-};
-
-&ehci3 {
-	status = "okay";
-};
-
-&emac {
-	phy-handle = <&int_mii_phy>;
-	phy-mode = "mii";
-	allwinner,leds-active-low;
-	status = "okay";
-};
-
-&hdmi {
-	status = "okay";
-};
-
-&hdmi_out {
-	hdmi_out_con: endpoint {
-		remote-endpoint = <&hdmi_con_in>;
-	};
-};
-
-&ir {
-	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
-	status = "okay";
-};
-
-&mmc0 {
-	vmmc-supply = <&reg_vcc_io>;
-	bus-width = <4>;
-	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-	status = "okay";
-};
-
-&ohci0 {
-	status = "okay";
-};
-
-&ohci1 {
-	status = "okay";
-};
-
-&ohci2 {
-	status = "okay";
-};
-
-&ohci3 {
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
-	status = "okay";
-};
-
-&usb_otg {
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usbphy {
-	/* VBUS on USB ports are always on */
-	usb0_vbus-supply = <&reg_vcc5v0>;
-	usb1_vbus-supply = <&reg_vcc5v0>;
-	usb2_vbus-supply = <&reg_vcc5v0>;
-	usb3_vbus-supply = <&reg_vcc5v0>;
-	status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sunxi-hx-libretech-all-h3-cc.dtsi
similarity index 95%
copy from arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
copy to arch/arm/boot/dts/sunxi-hx-libretech-all-h3-cc.dtsi
index db6b35bb65ff..d4539c12c6e1 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sunxi-hx-libretech-all-h3-cc.dtsi
@@ -1,19 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ * Common design for Libre Computer ALL-H3-CC boards
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
  */
 
-/dts-v1/;
-#include "sun8i-h3.dtsi"
-
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Libre Computer Board ALL-H3-CC H3";
-	compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
-
 	aliases {
 		ethernet0 = &emac;
 		serial0 = &uart0;
-- 
2.17.0

[PATCH 3/7] ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile

[Chen-Yu Tsai]

The dtb entry for the Banana Pi M2 Zero in the device tree makefile
somehow ended up in between two Orange Pi boards.

Move it so the list is properly sorted.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e2424957809..5c979ed6c77b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -992,8 +992,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a83t-bananapi-m3.dtb \
 	sun8i-a83t-cubietruck-plus.dtb \
 	sun8i-a83t-tbs-a711.dtb \
-	sun8i-h2-plus-orangepi-r1.dtb \
 	sun8i-h2-plus-bananapi-m2-zero.dtb \
+	sun8i-h2-plus-orangepi-r1.dtb \
 	sun8i-h2-plus-orangepi-zero.dtb \
 	sun8i-h3-bananapi-m2-plus.dtb \
 	sun8i-h3-beelink-x2.dtb \
-- 
2.17.0

[PATCH 3/7] ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile

[Chen-Yu Tsai]

The dtb entry for the Banana Pi M2 Zero in the device tree makefile
somehow ended up in between two Orange Pi boards.

Move it so the list is properly sorted.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e2424957809..5c979ed6c77b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -992,8 +992,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a83t-bananapi-m3.dtb \
 	sun8i-a83t-cubietruck-plus.dtb \
 	sun8i-a83t-tbs-a711.dtb \
-	sun8i-h2-plus-orangepi-r1.dtb \
 	sun8i-h2-plus-bananapi-m2-zero.dtb \
+	sun8i-h2-plus-orangepi-r1.dtb \
 	sun8i-h2-plus-orangepi-zero.dtb \
 	sun8i-h3-bananapi-m2-plus.dtb \
 	sun8i-h3-beelink-x2.dtb \
-- 
2.17.0

[PATCH 4/7] ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.

[Chen-Yu Tsai]

This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/Makefile                          |  1 +
 .../boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts  | 13 +++++++++++++
 2 files changed, 14 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5c979ed6c77b..1064d3acb607 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -993,6 +993,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a83t-cubietruck-plus.dtb \
 	sun8i-a83t-tbs-a711.dtb \
 	sun8i-h2-plus-bananapi-m2-zero.dtb \
+	sun8i-h2-plus-libretech-all-h3-cc.dtb \
 	sun8i-h2-plus-orangepi-r1.dtb \
 	sun8i-h2-plus-orangepi-zero.dtb \
 	sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
new file mode 100644
index 000000000000..2e7e13ab7eec
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-hx-libretech-all-h3-cc.dtsi"
+
+/ {
+	model = "Libre Computer Board ALL-H3-CC H2+";
+	compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus";
+};
-- 
2.17.0

[PATCH 4/7] ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.

[Chen-Yu Tsai]

This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/Makefile                          |  1 +
 .../boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts  | 13 +++++++++++++
 2 files changed, 14 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5c979ed6c77b..1064d3acb607 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -993,6 +993,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a83t-cubietruck-plus.dtb \
 	sun8i-a83t-tbs-a711.dtb \
 	sun8i-h2-plus-bananapi-m2-zero.dtb \
+	sun8i-h2-plus-libretech-all-h3-cc.dtb \
 	sun8i-h2-plus-orangepi-r1.dtb \
 	sun8i-h2-plus-orangepi-zero.dtb \
 	sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
new file mode 100644
index 000000000000..2e7e13ab7eec
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-hx-libretech-all-h3-cc.dtsi"
+
+/ {
+	model = "Libre Computer Board ALL-H3-CC H2+";
+	compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus";
+};
-- 
2.17.0

[PATCH 5/7] arm64: dts: allwinner: h5: Add cpu0 label for first cpu

[Chen-Yu Tsai]

At the board level, we want to be able to specify what regulator
supplies power to the cpu domain.

Add a label to the first cpu node so we can reference it later.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index e237c05cfdb4..62d646baac3c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -47,7 +47,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			reg = <0>;
-- 
2.17.0

[PATCH 5/7] arm64: dts: allwinner: h5: Add cpu0 label for first cpu

[Chen-Yu Tsai]

At the board level, we want to be able to specify what regulator
supplies power to the cpu domain.

Add a label to the first cpu node so we can reference it later.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index e237c05cfdb4..62d646baac3c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -47,7 +47,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu at 0 {
+		cpu0: cpu at 0 {
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			reg = <0>;
-- 
2.17.0

[PATCH 6/7] arm64: dts: allwinner: Sort dtb entries in Makefile

[Chen-Yu Tsai]

The dtb entries for NanoPi boards in the device tree makefile somehow
ended up after the Orange Pi boards.

Move them so the list is properly sorted.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8bebe7da5ed9..6ec126e86183 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,10 +6,10 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
-- 
2.17.0

[PATCH 6/7] arm64: dts: allwinner: Sort dtb entries in Makefile

[Chen-Yu Tsai]

The dtb entries for NanoPi boards in the device tree makefile somehow
ended up after the Orange Pi boards.

Move them so the list is properly sorted.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8bebe7da5ed9..6ec126e86183 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,10 +6,10 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
-- 
2.17.0

[PATCH 7/7] arm64: dts: allwinner: h5: Add Libre Computer Board ALL-H3-CC H5 ver.

[Chen-Yu Tsai]

This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
the H5 SoC, and has 4Gb DDR3 chips instead of 2Gb ones.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/Makefile             |  1 +
 .../allwinner/sun50i-h5-libretech-all-h3-cc.dts    | 14 ++++++++++++++
 2 files changed, 15 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 6ec126e86183..c31f90a49481 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
new file mode 100644
index 000000000000..f851bfbc13ed
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "arm/sunxi-hx-libretech-all-h3-cc.dtsi"
+
+/ {
+	model = "Libre Computer Board ALL-H3-CC H5";
+	compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
+};
+
-- 
2.17.0

[PATCH 7/7] arm64: dts: allwinner: h5: Add Libre Computer Board ALL-H3-CC H5 ver.

[Chen-Yu Tsai]

This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
the H5 SoC, and has 4Gb DDR3 chips instead of 2Gb ones.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/Makefile             |  1 +
 .../allwinner/sun50i-h5-libretech-all-h3-cc.dts    | 14 ++++++++++++++
 2 files changed, 15 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 6ec126e86183..c31f90a49481 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
new file mode 100644
index 000000000000..f851bfbc13ed
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "arm/sunxi-hx-libretech-all-h3-cc.dtsi"
+
+/ {
+	model = "Libre Computer Board ALL-H3-CC H5";
+	compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
+};
+
-- 
2.17.0

Re: [PATCH 1/7] ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage

[Maxime Ripard]

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On Tue, Apr 24, 2018 at 07:34:18PM +0800, Chen-Yu Tsai wrote:
> The voltage of the VCC-1V2 regulator on the ALL-H3-CC H3 ver. should be
> 1.2V, not the 3.3V currently defined in the device tree.
> 
> Fix the voltage in the device tree.
> 
> Fixes: 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
> 		      Computer Board ALL-H3-CC H3 ver.")
> Cc: <stable@vger.kernel.org> # 4.16.x
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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[PATCH 1/7] ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage

[Maxime Ripard]

On Tue, Apr 24, 2018 at 07:34:18PM +0800, Chen-Yu Tsai wrote:
> The voltage of the VCC-1V2 regulator on the ALL-H3-CC H3 ver. should be
> 1.2V, not the 3.3V currently defined in the device tree.
> 
> Fix the voltage in the device tree.
> 
> Fixes: 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
> 		      Computer Board ALL-H3-CC H3 ver.")
> Cc: <stable@vger.kernel.org> # 4.16.x
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 3/7] ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile

[Maxime Ripard]

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On Tue, Apr 24, 2018 at 07:34:20PM +0800, Chen-Yu Tsai wrote:
> The dtb entry for the Banana Pi M2 Zero in the device tree makefile
> somehow ended up in between two Orange Pi boards.
> 
> Move it so the list is properly sorted.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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[PATCH 3/7] ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile

[Maxime Ripard]

On Tue, Apr 24, 2018 at 07:34:20PM +0800, Chen-Yu Tsai wrote:
> The dtb entry for the Banana Pi M2 Zero in the device tree makefile
> somehow ended up in between two Orange Pi boards.
> 
> Move it so the list is properly sorted.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 4/7] ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.

[Maxime Ripard]

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On Tue, Apr 24, 2018 at 07:34:21PM +0800, Chen-Yu Tsai wrote:
> This patch adds a device tree file for the H2+ version of the Libre
> Computer Board ALL-H3-CC. It is the same board first introduced in
> commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
> Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
> the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.
> 
> The device tree utilizes the common board design file for ALL-H3-CC,
> providing just the model strings and SoC specifics.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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Re: [PATCH 4/7] ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.

[Maxime Ripard]

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On Tue, Apr 24, 2018 at 07:34:21PM +0800, Chen-Yu Tsai wrote:
> This patch adds a device tree file for the H2+ version of the Libre
> Computer Board ALL-H3-CC. It is the same board first introduced in
> commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
> Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
> the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.
> 
> The device tree utilizes the common board design file for ALL-H3-CC,
> providing just the model strings and SoC specifics.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 4/7] ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.

[Maxime Ripard]

On Tue, Apr 24, 2018 at 07:34:21PM +0800, Chen-Yu Tsai wrote:
> This patch adds a device tree file for the H2+ version of the Libre
> Computer Board ALL-H3-CC. It is the same board first introduced in
> commit 6ca358645d4d ("ARM: dts: sun8i: h3: Add dts file for Libre
> Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
> the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.
> 
> The device tree utilizes the common board design file for ALL-H3-CC,
> providing just the model strings and SoC specifics.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 5/7] arm64: dts: allwinner: h5: Add cpu0 label for first cpu

[Maxime Ripard]

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On Tue, Apr 24, 2018 at 07:34:22PM +0800, Chen-Yu Tsai wrote:
> At the board level, we want to be able to specify what regulator
> supplies power to the cpu domain.
> 
> Add a label to the first cpu node so we can reference it later.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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Re: [PATCH 5/7] arm64: dts: allwinner: h5: Add cpu0 label for first cpu

[Maxime Ripard]

[-- Attachment #1.1: Type: text/plain, Size: 472 bytes --]

On Tue, Apr 24, 2018 at 07:34:22PM +0800, Chen-Yu Tsai wrote:
> At the board level, we want to be able to specify what regulator
> supplies power to the cpu domain.
> 
> Add a label to the first cpu node so we can reference it later.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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_______________________________________________
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[PATCH 5/7] arm64: dts: allwinner: h5: Add cpu0 label for first cpu

[Maxime Ripard]

On Tue, Apr 24, 2018 at 07:34:22PM +0800, Chen-Yu Tsai wrote:
> At the board level, we want to be able to specify what regulator
> supplies power to the cpu domain.
> 
> Add a label to the first cpu node so we can reference it later.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 6/7] arm64: dts: allwinner: Sort dtb entries in Makefile

[Maxime Ripard]

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On Tue, Apr 24, 2018 at 07:34:23PM +0800, Chen-Yu Tsai wrote:
> The dtb entries for NanoPi boards in the device tree makefile somehow
> ended up after the Orange Pi boards.
> 
> Move them so the list is properly sorted.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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[PATCH 6/7] arm64: dts: allwinner: Sort dtb entries in Makefile

[Maxime Ripard]

On Tue, Apr 24, 2018 at 07:34:23PM +0800, Chen-Yu Tsai wrote:
> The dtb entries for NanoPi boards in the device tree makefile somehow
> ended up after the Orange Pi boards.
> 
> Move them so the list is properly sorted.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1206 bytes --]

On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
> The Libre Computer Project ALL-H3-CC has three models, all using the
> same board design, but with different pin compatible SoCs and amount of
> DRAM.
> 
> Currently only the H3 1GB DRAM variant is supported. To support the two
> other variants, first split the original device tree into a common board
> design part and an SoC specific part.
> 
> The SoC part only defines which SoC is used and model name, and includes
> the SoC specific dtsi file and the common design dtsi file.
> 
> Also fix up the SPDX identifier line to use the correct comment style,
> and place it on the first line.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-

I think I prefer the name of Neil's DTSI better, and since pretty much
the same patches (a couple of hours) before, we'll merge them (while
merging the rest of your patches, obviously).

Does that work for you?

Maxime
-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Maxime Ripard]

On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
> The Libre Computer Project ALL-H3-CC has three models, all using the
> same board design, but with different pin compatible SoCs and amount of
> DRAM.
> 
> Currently only the H3 1GB DRAM variant is supported. To support the two
> other variants, first split the original device tree into a common board
> design part and an SoC specific part.
> 
> The SoC part only defines which SoC is used and model name, and includes
> the SoC specific dtsi file and the common design dtsi file.
> 
> Also fix up the SPDX identifier line to use the correct comment style,
> and place it on the first line.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-

I think I prefer the name of Neil's DTSI better, and since pretty much
the same patches (a couple of hours) before, we'll merge them (while
merging the rest of your patches, obviously).

Does that work for you?

Maxime
-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
>> The Libre Computer Project ALL-H3-CC has three models, all using the
>> same board design, but with different pin compatible SoCs and amount of
>> DRAM.
>>
>> Currently only the H3 1GB DRAM variant is supported. To support the two
>> other variants, first split the original device tree into a common board
>> design part and an SoC specific part.
>>
>> The SoC part only defines which SoC is used and model name, and includes
>> the SoC specific dtsi file and the common design dtsi file.
>>
>> Also fix up the SPDX identifier line to use the correct comment style,
>> and place it on the first line.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
>
> I think I prefer the name of Neil's DTSI better, and since pretty much
> the same patches (a couple of hours) before, we'll merge them (while
> merging the rest of your patches, obviously).
>
> Does that work for you?

I would like for the regulator voltage fix to be merged before the split.
This will make it trivial to back port, instead of having to reverse the
split, and maybe failing.

ChenYu

[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
>> The Libre Computer Project ALL-H3-CC has three models, all using the
>> same board design, but with different pin compatible SoCs and amount of
>> DRAM.
>>
>> Currently only the H3 1GB DRAM variant is supported. To support the two
>> other variants, first split the original device tree into a common board
>> design part and an SoC specific part.
>>
>> The SoC part only defines which SoC is used and model name, and includes
>> the SoC specific dtsi file and the common design dtsi file.
>>
>> Also fix up the SPDX identifier line to use the correct comment style,
>> and place it on the first line.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
>
> I think I prefer the name of Neil's DTSI better, and since pretty much
> the same patches (a couple of hours) before, we'll merge them (while
> merging the rest of your patches, obviously).
>
> Does that work for you?

I would like for the regulator voltage fix to be merged before the split.
This will make it trivial to back port, instead of having to reverse the
split, and maybe failing.

ChenYu

Re: [PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Maxime Ripard]

On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
> >> The Libre Computer Project ALL-H3-CC has three models, all using the
> >> same board design, but with different pin compatible SoCs and amount of
> >> DRAM.
> >>
> >> Currently only the H3 1GB DRAM variant is supported. To support the two
> >> other variants, first split the original device tree into a common board
> >> design part and an SoC specific part.
> >>
> >> The SoC part only defines which SoC is used and model name, and includes
> >> the SoC specific dtsi file and the common design dtsi file.
> >>
> >> Also fix up the SPDX identifier line to use the correct comment style,
> >> and place it on the first line.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >> ---
> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
> >
> > I think I prefer the name of Neil's DTSI better, and since pretty much
> > the same patches (a couple of hours) before, we'll merge them (while
> > merging the rest of your patches, obviously).
> >
> > Does that work for you?
> 
> I would like for the regulator voltage fix to be merged before the split.
> This will make it trivial to back port, instead of having to reverse the
> split, and maybe failing.

Yes, I was just talking about replacing your two redundant patches,
but keeping the order you have.

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Maxime Ripard]

On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
> >> The Libre Computer Project ALL-H3-CC has three models, all using the
> >> same board design, but with different pin compatible SoCs and amount of
> >> DRAM.
> >>
> >> Currently only the H3 1GB DRAM variant is supported. To support the two
> >> other variants, first split the original device tree into a common board
> >> design part and an SoC specific part.
> >>
> >> The SoC part only defines which SoC is used and model name, and includes
> >> the SoC specific dtsi file and the common design dtsi file.
> >>
> >> Also fix up the SPDX identifier line to use the correct comment style,
> >> and place it on the first line.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >> ---
> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
> >
> > I think I prefer the name of Neil's DTSI better, and since pretty much
> > the same patches (a couple of hours) before, we'll merge them (while
> > merging the rest of your patches, obviously).
> >
> > Does that work for you?
> 
> I would like for the regulator voltage fix to be merged before the split.
> This will make it trivial to back port, instead of having to reverse the
> split, and maybe failing.

Yes, I was just talking about replacing your two redundant patches,
but keeping the order you have.

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

On Wed, Apr 25, 2018 at 3:37 AM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
>> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
>> <maxime.ripard@bootlin.com> wrote:
>> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
>> >> The Libre Computer Project ALL-H3-CC has three models, all using the
>> >> same board design, but with different pin compatible SoCs and amount of
>> >> DRAM.
>> >>
>> >> Currently only the H3 1GB DRAM variant is supported. To support the two
>> >> other variants, first split the original device tree into a common board
>> >> design part and an SoC specific part.
>> >>
>> >> The SoC part only defines which SoC is used and model name, and includes
>> >> the SoC specific dtsi file and the common design dtsi file.
>> >>
>> >> Also fix up the SPDX identifier line to use the correct comment style,
>> >> and place it on the first line.
>> >>
>> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> >> ---
>> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
>> >
>> > I think I prefer the name of Neil's DTSI better, and since pretty much
>> > the same patches (a couple of hours) before, we'll merge them (while
>> > merging the rest of your patches, obviously).
>> >
>> > Does that work for you?
>>
>> I would like for the regulator voltage fix to be merged before the split.
>> This will make it trivial to back port, instead of having to reverse the
>> split, and maybe failing.
>
> Yes, I was just talking about replacing your two redundant patches,
> but keeping the order you have.

That works for me. Might require a little fixing up.
Let me know if you need help with that.

ChenYu

[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

On Wed, Apr 25, 2018 at 3:37 AM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
>> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
>> <maxime.ripard@bootlin.com> wrote:
>> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
>> >> The Libre Computer Project ALL-H3-CC has three models, all using the
>> >> same board design, but with different pin compatible SoCs and amount of
>> >> DRAM.
>> >>
>> >> Currently only the H3 1GB DRAM variant is supported. To support the two
>> >> other variants, first split the original device tree into a common board
>> >> design part and an SoC specific part.
>> >>
>> >> The SoC part only defines which SoC is used and model name, and includes
>> >> the SoC specific dtsi file and the common design dtsi file.
>> >>
>> >> Also fix up the SPDX identifier line to use the correct comment style,
>> >> and place it on the first line.
>> >>
>> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> >> ---
>> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
>> >
>> > I think I prefer the name of Neil's DTSI better, and since pretty much
>> > the same patches (a couple of hours) before, we'll merge them (while
>> > merging the rest of your patches, obviously).
>> >
>> > Does that work for you?
>>
>> I would like for the regulator voltage fix to be merged before the split.
>> This will make it trivial to back port, instead of having to reverse the
>> split, and maybe failing.
>
> Yes, I was just talking about replacing your two redundant patches,
> but keeping the order you have.

That works for me. Might require a little fixing up.
Let me know if you need help with that.

ChenYu

Re: [PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 2132 bytes --]

On Wed, Apr 25, 2018 at 11:19:20AM +0800, Chen-Yu Tsai wrote:
> On Wed, Apr 25, 2018 at 3:37 AM, Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> > On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
> >> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
> >> <maxime.ripard@bootlin.com> wrote:
> >> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
> >> >> The Libre Computer Project ALL-H3-CC has three models, all using the
> >> >> same board design, but with different pin compatible SoCs and amount of
> >> >> DRAM.
> >> >>
> >> >> Currently only the H3 1GB DRAM variant is supported. To support the two
> >> >> other variants, first split the original device tree into a common board
> >> >> design part and an SoC specific part.
> >> >>
> >> >> The SoC part only defines which SoC is used and model name, and includes
> >> >> the SoC specific dtsi file and the common design dtsi file.
> >> >>
> >> >> Also fix up the SPDX identifier line to use the correct comment style,
> >> >> and place it on the first line.
> >> >>
> >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >> >> ---
> >> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
> >> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
> >> >
> >> > I think I prefer the name of Neil's DTSI better, and since pretty much
> >> > the same patches (a couple of hours) before, we'll merge them (while
> >> > merging the rest of your patches, obviously).
> >> >
> >> > Does that work for you?
> >>
> >> I would like for the regulator voltage fix to be merged before the split.
> >> This will make it trivial to back port, instead of having to reverse the
> >> split, and maybe failing.
> >
> > Yes, I was just talking about replacing your two redundant patches,
> > but keeping the order you have.
> 
> That works for me. Might require a little fixing up.
> Let me know if you need help with that.

I did. You can double check if you want :)

maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Maxime Ripard]

On Wed, Apr 25, 2018 at 11:19:20AM +0800, Chen-Yu Tsai wrote:
> On Wed, Apr 25, 2018 at 3:37 AM, Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> > On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
> >> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
> >> <maxime.ripard@bootlin.com> wrote:
> >> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
> >> >> The Libre Computer Project ALL-H3-CC has three models, all using the
> >> >> same board design, but with different pin compatible SoCs and amount of
> >> >> DRAM.
> >> >>
> >> >> Currently only the H3 1GB DRAM variant is supported. To support the two
> >> >> other variants, first split the original device tree into a common board
> >> >> design part and an SoC specific part.
> >> >>
> >> >> The SoC part only defines which SoC is used and model name, and includes
> >> >> the SoC specific dtsi file and the common design dtsi file.
> >> >>
> >> >> Also fix up the SPDX identifier line to use the correct comment style,
> >> >> and place it on the first line.
> >> >>
> >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >> >> ---
> >> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
> >> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
> >> >
> >> > I think I prefer the name of Neil's DTSI better, and since pretty much
> >> > the same patches (a couple of hours) before, we'll merge them (while
> >> > merging the rest of your patches, obviously).
> >> >
> >> > Does that work for you?
> >>
> >> I would like for the regulator voltage fix to be merged before the split.
> >> This will make it trivial to back port, instead of having to reverse the
> >> split, and maybe failing.
> >
> > Yes, I was just talking about replacing your two redundant patches,
> > but keeping the order you have.
> 
> That works for me. Might require a little fixing up.
> Let me know if you need help with that.

I did. You can double check if you want :)

maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

On Wed, Apr 25, 2018 at 8:39 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Wed, Apr 25, 2018 at 11:19:20AM +0800, Chen-Yu Tsai wrote:
>> On Wed, Apr 25, 2018 at 3:37 AM, Maxime Ripard
>> <maxime.ripard@bootlin.com> wrote:
>> > On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
>> >> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
>> >> <maxime.ripard@bootlin.com> wrote:
>> >> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
>> >> >> The Libre Computer Project ALL-H3-CC has three models, all using the
>> >> >> same board design, but with different pin compatible SoCs and amount of
>> >> >> DRAM.
>> >> >>
>> >> >> Currently only the H3 1GB DRAM variant is supported. To support the two
>> >> >> other variants, first split the original device tree into a common board
>> >> >> design part and an SoC specific part.
>> >> >>
>> >> >> The SoC part only defines which SoC is used and model name, and includes
>> >> >> the SoC specific dtsi file and the common design dtsi file.
>> >> >>
>> >> >> Also fix up the SPDX identifier line to use the correct comment style,
>> >> >> and place it on the first line.
>> >> >>
>> >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> >> >> ---
>> >> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>> >> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
>> >> >
>> >> > I think I prefer the name of Neil's DTSI better, and since pretty much
>> >> > the same patches (a couple of hours) before, we'll merge them (while
>> >> > merging the rest of your patches, obviously).
>> >> >
>> >> > Does that work for you?
>> >>
>> >> I would like for the regulator voltage fix to be merged before the split.
>> >> This will make it trivial to back port, instead of having to reverse the
>> >> split, and maybe failing.
>> >
>> > Yes, I was just talking about replacing your two redundant patches,
>> > but keeping the order you have.
>>
>> That works for me. Might require a little fixing up.
>> Let me know if you need help with that.
>
> I did. You can double check if you want :)

Looks good. Thanks!

ChenYu

[PATCH 2/7] ARM: dts: sun8i: h3: Split out common board design for ALL-H3-CC

[Chen-Yu Tsai]

On Wed, Apr 25, 2018 at 8:39 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Wed, Apr 25, 2018 at 11:19:20AM +0800, Chen-Yu Tsai wrote:
>> On Wed, Apr 25, 2018 at 3:37 AM, Maxime Ripard
>> <maxime.ripard@bootlin.com> wrote:
>> > On Tue, Apr 24, 2018 at 08:17:11PM +0800, Chen-Yu Tsai wrote:
>> >> On Tue, Apr 24, 2018 at 8:13 PM, Maxime Ripard
>> >> <maxime.ripard@bootlin.com> wrote:
>> >> > On Tue, Apr 24, 2018 at 07:34:19PM +0800, Chen-Yu Tsai wrote:
>> >> >> The Libre Computer Project ALL-H3-CC has three models, all using the
>> >> >> same board design, but with different pin compatible SoCs and amount of
>> >> >> DRAM.
>> >> >>
>> >> >> Currently only the H3 1GB DRAM variant is supported. To support the two
>> >> >> other variants, first split the original device tree into a common board
>> >> >> design part and an SoC specific part.
>> >> >>
>> >> >> The SoC part only defines which SoC is used and model name, and includes
>> >> >> the SoC specific dtsi file and the common design dtsi file.
>> >> >>
>> >> >> Also fix up the SPDX identifier line to use the correct comment style,
>> >> >> and place it on the first line.
>> >> >>
>> >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> >> >> ---
>> >> >>  .../boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 213 +-----------------
>> >> >>  ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} |  11 +-
>> >> >
>> >> > I think I prefer the name of Neil's DTSI better, and since pretty much
>> >> > the same patches (a couple of hours) before, we'll merge them (while
>> >> > merging the rest of your patches, obviously).
>> >> >
>> >> > Does that work for you?
>> >>
>> >> I would like for the regulator voltage fix to be merged before the split.
>> >> This will make it trivial to back port, instead of having to reverse the
>> >> split, and maybe failing.
>> >
>> > Yes, I was just talking about replacing your two redundant patches,
>> > but keeping the order you have.
>>
>> That works for me. Might require a little fixing up.
>> Let me know if you need help with that.
>
> I did. You can double check if you want :)

Looks good. Thanks!

ChenYu