* [PATCH 0/4] ARM: add basic CSR atlas7 Auto SoC support
@ 2014-12-25 8:34 Barry Song
2014-12-25 8:34 ` [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Barry Song @ 2014-12-25 8:34 UTC (permalink / raw)
To: linux-arm-kernel
From: Barry Song <Baohua.Song@csr.com>
add basic support for CSR atlas7 new Auto SoC. this patchset only
adds debug port, dts, smp and machine for the chip.
we need some follow-up patches for clock, pinctrl, dma and so on.
Guo Zeng (1):
ARM: sirf: add two debug ports for CSRatlas7 SoC
Zhiwu Song (3):
ARM: sirf: add atlas7 machine support
ARM: dts: add init dts file for CSR atlas7 SoC
ARM: sirf: bring up SMP in atlas7 SoC
Documentation/devicetree/bindings/arm/sirf.txt | 2 +
arch/arm/Kconfig.debug | 21 +-
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/atlas7-evb.dts | 110 ++++
arch/arm/boot/dts/atlas7.dtsi | 813 +++++++++++++++++++++++++
arch/arm/include/debug/sirf.S | 37 +-
arch/arm/mach-prima2/Kconfig | 13 +-
arch/arm/mach-prima2/common.c | 16 +-
arch/arm/mach-prima2/lluart.c | 21 +-
arch/arm/mach-prima2/platsmp.c | 52 +-
10 files changed, 1022 insertions(+), 64 deletions(-)
create mode 100644 arch/arm/boot/dts/atlas7-evb.dts
create mode 100644 arch/arm/boot/dts/atlas7.dtsi
--
2.2.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC 2014-12-25 8:34 [PATCH 0/4] ARM: add basic CSR atlas7 Auto SoC support Barry Song @ 2014-12-25 8:34 ` Barry Song 2014-12-30 22:35 ` Arnd Bergmann 2014-12-25 8:34 ` [PATCH 2/4] ARM: sirf: add atlas7 machine support Barry Song ` (2 subsequent siblings) 3 siblings, 1 reply; 16+ messages in thread From: Barry Song @ 2014-12-25 8:34 UTC (permalink / raw) To: linux-arm-kernel From: Guo Zeng <Guo.Zeng@csr.com> this patch adds UART0 and UART1 as LLUART port, as the new atlas7 registers layout are different, it also refines some names of old hard-coded MARCOs. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> --- arch/arm/Kconfig.debug | 21 ++++++++++++++++++++- arch/arm/include/debug/sirf.S | 37 ++++++++++++++++++++++++------------- arch/arm/mach-prima2/lluart.c | 21 ++++++++++++--------- 3 files changed, 56 insertions(+), 23 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5ddd490..25d4f6b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -927,6 +927,22 @@ choice Say Y here if you want the debug print routines to direct their output to the uart1 port on SiRFmarco devices. + config DEBUG_SIRFATLAS7_UART0 + bool "Kernel low-level debugging messages via SiRFatlas7 UART0" + depends on ARCH_ATLAS7 + help + Say Y here if you want the debug print routines to direct + their output to the uart0 port on SiRFATLAS7 devices.The uart0 + is used on SiRFATLAS7 as a extra debug port.sometimes an extra + debug port can be very useful. + + config DEBUG_SIRFATLAS7_UART1 + bool "Kernel low-level debugging messages via SiRFatlas7 UART1" + depends on ARCH_ATLAS7 + help + Say Y here if you want the debug print routines to direct + their output to the uart1 port on SiRFATLAS7 devices. + config STIH41X_DEBUG_ASC2 bool "Use StiH415/416 ASC2 UART for low-level debug" depends on ARCH_STI @@ -1195,7 +1211,10 @@ config DEBUG_LL_INCLUDE default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4 default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART default "debug/s5pv210.S" if DEBUG_S5PV210_UART - default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 + default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || \ + DEBUG_SIRFMARCO_UART1 || \ + DEBUG_SIRFATLAS7_UART0 || \ + DEBUG_SIRFATLAS7_UART1 default "debug/sti.S" if DEBUG_STI_UART default "debug/tegra.S" if DEBUG_TEGRA_UART default "debug/ux500.S" if DEBUG_UX500_UART diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S index dbf250c..38327fa 100644 --- a/arch/arm/include/debug/sirf.S +++ b/arch/arm/include/debug/sirf.S @@ -7,36 +7,47 @@ */ #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) -#define SIRFSOC_UART1_PA_BASE 0xb0060000 +#define SIRF_LLUART_PA_BASE 0xb0060000 #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) -#define SIRFSOC_UART1_PA_BASE 0xcc060000 +#define SIRF_LLUART_PA_BASE 0xcc060000 +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) +#define SIRF_LLUART_PA_BASE 0x18020000 +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) +#define SIRF_LLUART_PA_BASE 0x18010000 #else -#define SIRFSOC_UART1_PA_BASE 0 +#define SIRF_LLUART_PA_BASE 0 #endif -#define SIRFSOC_UART1_VA_BASE 0xFEC60000 +#define SIRF_LLUART_VA_BASE (0xFEC00000 \ + | (SIRF_LLUART_PA_BASE & 0x000FFFFF)) -#define SIRFSOC_UART_TXFIFO_STATUS 0x0114 -#define SIRFSOC_UART_TXFIFO_DATA 0x0118 +#define SIRF_LLUART_TXFIFO_STATUS 0x0114 +#define SIRF_LLUART_TXFIFO_DATA 0x0118 + +#define SIRF_LLUART_TXFIFO_FULL (1 << 5) + +#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) +#else +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) +#endif -#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5) -#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6) .macro addruart, rp, rv, tmp - ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical - ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual + ldr \rp, =SIRF_LLUART_PA_BASE @ physical + ldr \rv, =SIRF_LLUART_VA_BASE @ virtual .endm .macro senduart,rd,rx - str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA] + str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA] .endm .macro busyuart,rd,rx .endm .macro waituart,rd,rx -1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS] - tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY +1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS] + tst \rd, #SIRF_LLUART_TXFIFO_EMPTY beq 1001b .endm diff --git a/arch/arm/mach-prima2/lluart.c b/arch/arm/mach-prima2/lluart.c index 99c0c92..c42d69b 100644 --- a/arch/arm/mach-prima2/lluart.c +++ b/arch/arm/mach-prima2/lluart.c @@ -12,24 +12,27 @@ #include "common.h" #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) -#define SIRFSOC_UART1_PA_BASE 0xb0060000 +#define SIRF_LLUART_PA_BASE 0xb0060000 #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) -#define SIRFSOC_UART1_PA_BASE 0xcc060000 +#define SIRF_LLUART_PA_BASE 0xcc060000 +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) +#define SIRF_LLUART_PA_BASE 0x18020000 +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) +#define SIRF_LLUART_PA_BASE 0x18010000 #else -#define SIRFSOC_UART1_PA_BASE 0 +#define SIRF_LLUART_PA_BASE 0 #endif -#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000) -#define SIRFSOC_UART1_SIZE SZ_4K +#define SIRF_LLUART_VA_BASE SIRFSOC_VA(SIRF_LLUART_PA_BASE & 0x000FFFFF) +#define SIRF_LLUART_SIZE SZ_4K void __init sirfsoc_map_lluart(void) { struct map_desc sirfsoc_lluart_map = { - .virtual = SIRFSOC_UART1_VA_BASE, - .pfn = __phys_to_pfn(SIRFSOC_UART1_PA_BASE), - .length = SIRFSOC_UART1_SIZE, + .virtual = SIRF_LLUART_VA_BASE, + .pfn = __phys_to_pfn(SIRF_LLUART_PA_BASE), + .length = SIRF_LLUART_SIZE, .type = MT_DEVICE, }; - iotable_init(&sirfsoc_lluart_map, 1); } -- 2.2.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC 2014-12-25 8:34 ` [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song @ 2014-12-30 22:35 ` Arnd Bergmann 2014-12-31 15:05 ` Barry Song 0 siblings, 1 reply; 16+ messages in thread From: Arnd Bergmann @ 2014-12-30 22:35 UTC (permalink / raw) To: linux-arm-kernel On Thursday 25 December 2014 16:34:17 Barry Song wrote: > #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) > -#define SIRFSOC_UART1_PA_BASE 0xb0060000 > +#define SIRF_LLUART_PA_BASE 0xb0060000 > #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) > -#define SIRFSOC_UART1_PA_BASE 0xcc060000 > +#define SIRF_LLUART_PA_BASE 0xcc060000 > +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) > +#define SIRF_LLUART_PA_BASE 0x18020000 > +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) > +#define SIRF_LLUART_PA_BASE 0x18010000 > #else > -#define SIRFSOC_UART1_PA_BASE 0 > +#define SIRF_LLUART_PA_BASE 0 > #endif I think it would be nicer to use DEBUG_UART_PHYS/DEBUG_UART_VIRT here. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC 2014-12-30 22:35 ` Arnd Bergmann @ 2014-12-31 15:05 ` Barry Song 2014-12-31 15:31 ` Arnd Bergmann 0 siblings, 1 reply; 16+ messages in thread From: Barry Song @ 2014-12-31 15:05 UTC (permalink / raw) To: linux-arm-kernel 2014-12-31 6:35 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > On Thursday 25 December 2014 16:34:17 Barry Song wrote: >> #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) >> -#define SIRFSOC_UART1_PA_BASE 0xb0060000 >> +#define SIRF_LLUART_PA_BASE 0xb0060000 >> #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) >> -#define SIRFSOC_UART1_PA_BASE 0xcc060000 >> +#define SIRF_LLUART_PA_BASE 0xcc060000 >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) >> +#define SIRF_LLUART_PA_BASE 0x18020000 >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) >> +#define SIRF_LLUART_PA_BASE 0x18010000 >> #else >> -#define SIRFSOC_UART1_PA_BASE 0 >> +#define SIRF_LLUART_PA_BASE 0 >> #endif > > I think it would be nicer to use DEBUG_UART_PHYS/DEBUG_UART_VIRT here. yes if it is more general name for all. my second feeling is that does this conflict CSR namespace stuff into high-level and common namespace things? > > Arnd -barry ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC 2014-12-31 15:05 ` Barry Song @ 2014-12-31 15:31 ` Arnd Bergmann 2015-01-02 7:51 ` Barry Song 0 siblings, 1 reply; 16+ messages in thread From: Arnd Bergmann @ 2014-12-31 15:31 UTC (permalink / raw) To: linux-arm-kernel On Wednesday 31 December 2014 23:05:44 Barry Song wrote: > 2014-12-31 6:35 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > > On Thursday 25 December 2014 16:34:17 Barry Song wrote: > >> #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) > >> -#define SIRFSOC_UART1_PA_BASE 0xb0060000 > >> +#define SIRF_LLUART_PA_BASE 0xb0060000 > >> #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) > >> -#define SIRFSOC_UART1_PA_BASE 0xcc060000 > >> +#define SIRF_LLUART_PA_BASE 0xcc060000 > >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) > >> +#define SIRF_LLUART_PA_BASE 0x18020000 > >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) > >> +#define SIRF_LLUART_PA_BASE 0x18010000 > >> #else > >> -#define SIRFSOC_UART1_PA_BASE 0 > >> +#define SIRF_LLUART_PA_BASE 0 > >> #endif > > > > I think it would be nicer to use DEBUG_UART_PHYS/DEBUG_UART_VIRT here. > > yes if it is more general name for all. my second feeling is that does > this conflict CSR namespace stuff into high-level and common namespace > things? I think my comment was misleading. What I meant was to use CONFIG_DEBUG_UART_PHYS from arch/arm/Kconfig.debug the same way we do for the 8250 and pl011 compatible uarts. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC 2014-12-31 15:31 ` Arnd Bergmann @ 2015-01-02 7:51 ` Barry Song 2015-01-02 8:59 ` Arnd Bergmann 0 siblings, 1 reply; 16+ messages in thread From: Barry Song @ 2015-01-02 7:51 UTC (permalink / raw) To: linux-arm-kernel 2014-12-31 23:31 GMT+08:00, Arnd Bergmann <arnd@arndb.de>: > On Wednesday 31 December 2014 23:05:44 Barry Song wrote: >> 2014-12-31 6:35 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: >> > On Thursday 25 December 2014 16:34:17 Barry Song wrote: >> >> #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) >> >> -#define SIRFSOC_UART1_PA_BASE 0xb0060000 >> >> +#define SIRF_LLUART_PA_BASE 0xb0060000 >> >> #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) >> >> -#define SIRFSOC_UART1_PA_BASE 0xcc060000 >> >> +#define SIRF_LLUART_PA_BASE 0xcc060000 >> >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) >> >> +#define SIRF_LLUART_PA_BASE 0x18020000 >> >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) >> >> +#define SIRF_LLUART_PA_BASE 0x18010000 >> >> #else >> >> -#define SIRFSOC_UART1_PA_BASE 0 >> >> +#define SIRF_LLUART_PA_BASE 0 >> >> #endif >> > >> > I think it would be nicer to use DEBUG_UART_PHYS/DEBUG_UART_VIRT here. >> >> yes if it is more general name for all. my second feeling is that does >> this conflict CSR namespace stuff into high-level and common namespace >> things? > > I think my comment was misleading. What I meant was to use > CONFIG_DEBUG_UART_PHYS from arch/arm/Kconfig.debug the same way > we do for the 8250 and pl011 compatible uarts. it is even better if all CSR ports are same in register layout. then we can simply have a Kconfig options for all ports and use the CONFIG_DEBUG_UART_VIRT/PHYS to differentiate ports. but here we still need the options for different ports as TXFIFO_EMPTY bits are different on different ports. +#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) +#else +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) +#endif but we can still get benefit to define the BASE address from Kconfig and have some similar ways with: include/debug/8250.S: ldr \rv, =CONFIG_DEBUG_UART_VIRT include/debug/bcm63xx.S: ldr \rv, =CONFIG_DEBUG_UART_VIRT include/debug/meson.S: ldr \rv, =(CONFIG_DEBUG_UART_VIRT) @ virtual include/debug/msm.S: ldr \rv, =CONFIG_DEBUG_UART_VIRT include/debug/pl01x.S: ldr \rv, =CONFIG_DEBUG_UART_VIRT include/debug/s3c24xx.S: ldr \rv, = CONFIG_DEBUG_UART_VIRT > > Arnd > -barry ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC 2015-01-02 7:51 ` Barry Song @ 2015-01-02 8:59 ` Arnd Bergmann 0 siblings, 0 replies; 16+ messages in thread From: Arnd Bergmann @ 2015-01-02 8:59 UTC (permalink / raw) To: linux-arm-kernel On Friday 02 January 2015 15:51:41 Barry Song wrote: > 2014-12-31 23:31 GMT+08:00, Arnd Bergmann <arnd@arndb.de>: > > On Wednesday 31 December 2014 23:05:44 Barry Song wrote: > >> 2014-12-31 6:35 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > >> > On Thursday 25 December 2014 16:34:17 Barry Song wrote: > >> >> #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) > >> >> -#define SIRFSOC_UART1_PA_BASE 0xb0060000 > >> >> +#define SIRF_LLUART_PA_BASE 0xb0060000 > >> >> #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) > >> >> -#define SIRFSOC_UART1_PA_BASE 0xcc060000 > >> >> +#define SIRF_LLUART_PA_BASE 0xcc060000 > >> >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART1) > >> >> +#define SIRF_LLUART_PA_BASE 0x18020000 > >> >> +#elif defined(CONFIG_DEBUG_SIRFATLAS7_UART0) > >> >> +#define SIRF_LLUART_PA_BASE 0x18010000 > >> >> #else > >> >> -#define SIRFSOC_UART1_PA_BASE 0 > >> >> +#define SIRF_LLUART_PA_BASE 0 > >> >> #endif > >> > > >> > I think it would be nicer to use DEBUG_UART_PHYS/DEBUG_UART_VIRT here. > >> > >> yes if it is more general name for all. my second feeling is that does > >> this conflict CSR namespace stuff into high-level and common namespace > >> things? > > > > I think my comment was misleading. What I meant was to use > > CONFIG_DEBUG_UART_PHYS from arch/arm/Kconfig.debug the same way > > we do for the 8250 and pl011 compatible uarts. > > it is even better if all CSR ports are same in register layout. then > we can simply have a Kconfig options for all ports and use the > CONFIG_DEBUG_UART_VIRT/PHYS to differentiate ports. Right. In most other cases, we still have one option per implementation but then only use it to pick a different default for the UART address. As a side note here, we don't yet have working CONFIG_EARLYCON support on ARM, but there are new patches to implement that. With EARLYCON working, it would be much less important to have DEBUG_LL configured easily, and you could just leave entering the right address to advanced users that need to debug the kernel earlier than the earlycon init. > but here we still > need the options for different ports as TXFIFO_EMPTY bits are > different on different ports. > > +#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 > +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) > +#else > +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) > +#endif Yes, so we need two options at least, so we can tell the difference between atlas7 and the others. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/4] ARM: sirf: add atlas7 machine support 2014-12-25 8:34 [PATCH 0/4] ARM: add basic CSR atlas7 Auto SoC support Barry Song 2014-12-25 8:34 ` [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song @ 2014-12-25 8:34 ` Barry Song 2014-12-30 22:34 ` Arnd Bergmann 2014-12-25 8:34 ` [PATCH 3/4] ARM: dts: add init dts file for CSR atlas7 SoC Barry Song 2014-12-25 8:34 ` [PATCH 4/4] ARM: sirf: bring up SMP in " Barry Song 3 siblings, 1 reply; 16+ messages in thread From: Barry Song @ 2014-12-25 8:34 UTC (permalink / raw) To: linux-arm-kernel From: Zhiwu Song <Zhiwu.Song@csr.com> atlas7 is next-gen auto soc from CSR. It could bring to customers most integrated SoC solution: - World leading Bluetooth 4.0 and GNSS baseband - Audio processing, analog CODEC and ADC - Analog video input - SDR accelerators Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> --- Documentation/devicetree/bindings/arm/sirf.txt | 2 ++ arch/arm/mach-prima2/Kconfig | 13 ++++++++++++- arch/arm/mach-prima2/common.c | 15 +++++++++++++++ 3 files changed, 29 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt index c6ba6d3..018de18 100644 --- a/Documentation/devicetree/bindings/arm/sirf.txt +++ b/Documentation/devicetree/bindings/arm/sirf.txt @@ -3,7 +3,9 @@ CSR SiRFprimaII and SiRFmarco device tree bindings. Required root node properties: - compatible: + - "sirf,atlas7-cb" : atlas7 device based board - "sirf,prima2-cb" : prima2 "cb" evaluation board - "sirf,marco-cb" : marco "cb" evaluation board + - "sirf,atlas7" : atlas7 device based board - "sirf,prima2" : prima2 device based board - "sirf,marco" : marco device based board diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 042f693..e8f17c9 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -11,7 +11,7 @@ menuconfig ARCH_SIRF if ARCH_SIRF -comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features" +comment "CSR SiRF atlas6/primaII/Marco/Atlas7 Specific Features" config ARCH_ATLAS6 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" @@ -20,6 +20,17 @@ config ARCH_ATLAS6 help Support for CSR SiRFSoC ARM Cortex A9 Platform +config ARCH_ATLAS7 + bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" + default y + select ARM_GIC + select CPU_V7 + select HAVE_ARM_SCU if SMP + select HAVE_SMP + select SMP_ON_UP if SMP + help + Support for CSR SiRFSoC ARM Cortex A7 Platform + config ARCH_PRIMA2 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" default y diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c index a860ea2..2f45d48 100644 --- a/arch/arm/mach-prima2/common.c +++ b/arch/arm/mach-prima2/common.c @@ -75,3 +75,18 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)") .dt_compat = marco_dt_match, MACHINE_END #endif + +#ifdef CONFIG_ARCH_ATLAS7 +static const char *atlas7_dt_match[] __initdata = { + "sirf,atlas7", + NULL +}; + +DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)") + /* Maintainer: Barry Song <baohua.song@csr.com> */ + .smp = smp_ops(sirfsoc_smp_ops), + .map_io = sirfsoc_map_io, + .init_late = sirfsoc_init_late, + .dt_compat = atlas7_dt_match, +MACHINE_END +#endif -- 2.2.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/4] ARM: sirf: add atlas7 machine support 2014-12-25 8:34 ` [PATCH 2/4] ARM: sirf: add atlas7 machine support Barry Song @ 2014-12-30 22:34 ` Arnd Bergmann 2014-12-31 14:50 ` Barry Song 2015-01-04 7:23 ` Barry Song 0 siblings, 2 replies; 16+ messages in thread From: Arnd Bergmann @ 2014-12-30 22:34 UTC (permalink / raw) To: linux-arm-kernel On Thursday 25 December 2014 16:34:18 Barry Song wrote: > +DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)") > + /* Maintainer: Barry Song <baohua.song@csr.com> */ > + .smp = smp_ops(sirfsoc_smp_ops), > + .map_io = sirfsoc_map_io, > + .init_late = sirfsoc_init_late, > + .dt_compat = atlas7_dt_match, > +MACHINE_END Can you check if the sirfsoc_map_io function is still required? My guess is that you can just replace sirfsoc_map_scu() with a call of ioremap in sirfsoc_smp_prepare_cpus, and drop sirfsoc_map_lluart() entirely in favor of the default debug_ll_io_init() function that is called when map_io is NULL. Also, how about merging the entries for atlas6 and atlas7, and just having multiple compatible strings in atlas_dt_match? Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/4] ARM: sirf: add atlas7 machine support 2014-12-30 22:34 ` Arnd Bergmann @ 2014-12-31 14:50 ` Barry Song 2015-01-02 9:00 ` Arnd Bergmann 2015-01-04 7:23 ` Barry Song 1 sibling, 1 reply; 16+ messages in thread From: Barry Song @ 2014-12-31 14:50 UTC (permalink / raw) To: linux-arm-kernel 2014-12-31 6:34 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > On Thursday 25 December 2014 16:34:18 Barry Song wrote: >> +DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)") >> + /* Maintainer: Barry Song <baohua.song@csr.com> */ >> + .smp = smp_ops(sirfsoc_smp_ops), >> + .map_io = sirfsoc_map_io, >> + .init_late = sirfsoc_init_late, >> + .dt_compat = atlas7_dt_match, >> +MACHINE_END > > Can you check if the sirfsoc_map_io function is still required? > My guess is that you can just replace sirfsoc_map_scu() with a > call of ioremap in sirfsoc_smp_prepare_cpus, and drop sirfsoc_map_lluart() > entirely in favor of the default debug_ll_io_init() function that > is called when map_io is NULL. > > Also, how about merging the entries for atlas6 and atlas7, and just > having multiple compatible strings in atlas_dt_match? the situation is that atlas7 is not a family of atlas6. atlas6 is much similar with prima2, but atlas7 is actually a replacement of earlier marco family. atlas7 is a dual core cortex-a7, but atlas6 is a single core cortex-a9. and atlas7 is using a Network on Chip(NoC) bus architecture which is completely not same with atlas6 which is using a tree-type bus, so atlas7 will have some machine-specific codes like NoC fireware which should be in machine specific codes to handle external data aborts things for security protection. and more important, atlas7 has much different IP modules with atlas6 for things like GPS, connectiviy, software digital radios. and atlas7 has a more cortex-M3 for CAN stack, so this will involve some IPC drivers. and one more DSP for audio processing. this means atlas7 is not a simple atlas6+1, it is a new chip. i have a feeling atlas7 should be highlighted as a seperate machine. > > Arnd -barry ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/4] ARM: sirf: add atlas7 machine support 2014-12-31 14:50 ` Barry Song @ 2015-01-02 9:00 ` Arnd Bergmann 0 siblings, 0 replies; 16+ messages in thread From: Arnd Bergmann @ 2015-01-02 9:00 UTC (permalink / raw) To: linux-arm-kernel On Wednesday 31 December 2014 22:50:16 Barry Song wrote: > 2014-12-31 6:34 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > > On Thursday 25 December 2014 16:34:18 Barry Song wrote: > >> +DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)") > >> + /* Maintainer: Barry Song <baohua.song@csr.com> */ > >> + .smp = smp_ops(sirfsoc_smp_ops), > >> + .map_io = sirfsoc_map_io, > >> + .init_late = sirfsoc_init_late, > >> + .dt_compat = atlas7_dt_match, > >> +MACHINE_END > > > > Can you check if the sirfsoc_map_io function is still required? > > My guess is that you can just replace sirfsoc_map_scu() with a > > call of ioremap in sirfsoc_smp_prepare_cpus, and drop sirfsoc_map_lluart() > > entirely in favor of the default debug_ll_io_init() function that > > is called when map_io is NULL. > > > > Also, how about merging the entries for atlas6 and atlas7, and just > > having multiple compatible strings in atlas_dt_match? > > the situation is that atlas7 is not a family of atlas6. atlas6 is much > similar with prima2, but atlas7 is actually a replacement of earlier > marco family. > > atlas7 is a dual core cortex-a7, but atlas6 is a single core > cortex-a9. and atlas7 is using a Network on Chip(NoC) bus architecture > which is completely not same with atlas6 which is using a tree-type > bus, so atlas7 will have some machine-specific codes like NoC fireware > which should be in machine specific codes to handle external data > aborts things for security protection. and more important, atlas7 has > much different IP modules with atlas6 for things like GPS, > connectiviy, software digital radios. and atlas7 has a more cortex-M3 > for CAN stack, so this will involve some IPC drivers. and one more DSP > for audio processing. > > this means atlas7 is not a simple atlas6+1, it is a new chip. i have > a feeling atlas7 should be highlighted as a seperate machine. Ideally, I'd like to see a single DT_MACHINE_START for all of the sirf machines once you have eliminated all the callbacks, but until then, using one per SoC type for consistency is fine with me as well, so just leave it that way for now. Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/4] ARM: sirf: add atlas7 machine support 2014-12-30 22:34 ` Arnd Bergmann 2014-12-31 14:50 ` Barry Song @ 2015-01-04 7:23 ` Barry Song 1 sibling, 0 replies; 16+ messages in thread From: Barry Song @ 2015-01-04 7:23 UTC (permalink / raw) To: linux-arm-kernel 2014-12-31 6:34 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > On Thursday 25 December 2014 16:34:18 Barry Song wrote: >> +DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)") >> + /* Maintainer: Barry Song <baohua.song@csr.com> */ >> + .smp = smp_ops(sirfsoc_smp_ops), >> + .map_io = sirfsoc_map_io, >> + .init_late = sirfsoc_init_late, >> + .dt_compat = atlas7_dt_match, >> +MACHINE_END > > Can you check if the sirfsoc_map_io function is still required? > My guess is that you can just replace sirfsoc_map_scu() with a > call of ioremap in sirfsoc_smp_prepare_cpus, and drop sirfsoc_map_lluart() > entirely in favor of the default debug_ll_io_init() function that > is called when map_io is NULL. after dropping MARCO, i can simply delete sirfsoc_map_scu() as for atlas7, this is not needed any more. then finally, i can delete all sirfsoc_map_io() and DEBUG_LL mapping. -barry ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/4] ARM: dts: add init dts file for CSR atlas7 SoC 2014-12-25 8:34 [PATCH 0/4] ARM: add basic CSR atlas7 Auto SoC support Barry Song 2014-12-25 8:34 ` [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song 2014-12-25 8:34 ` [PATCH 2/4] ARM: sirf: add atlas7 machine support Barry Song @ 2014-12-25 8:34 ` Barry Song 2014-12-25 8:34 ` [PATCH 4/4] ARM: sirf: bring up SMP in " Barry Song 3 siblings, 0 replies; 16+ messages in thread From: Barry Song @ 2014-12-25 8:34 UTC (permalink / raw) To: linux-arm-kernel From: Zhiwu Song <Zhiwu.Song@csr.com> CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens of MARCOs, in each MARCO, there are dozens of hardware modules. Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Hao Liu <Hao.Liu@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/atlas7-evb.dts | 110 ++++++ arch/arm/boot/dts/atlas7.dtsi | 813 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 924 insertions(+) create mode 100644 arch/arm/boot/dts/atlas7-evb.dts create mode 100644 arch/arm/boot/dts/atlas7.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd..36fe9a2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb +dtb-$(CONFIG_ARCH_ATLAS7) += atlas7-evb.dtb dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb diff --git a/arch/arm/boot/dts/atlas7-evb.dts b/arch/arm/boot/dts/atlas7-evb.dts new file mode 100644 index 0000000..49cf59a --- /dev/null +++ b/arch/arm/boot/dts/atlas7-evb.dts @@ -0,0 +1,110 @@ +/* + * DTS file for CSR SiRFatlas7 Evaluation Board + * + * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +/dts-v1/; + +/include/ "atlas7.dtsi" + +/ { + model = "CSR SiRFatlas7 Evaluation Board"; + compatible = "sirf,atlas7-cb", "sirf,atlas7"; + + chosen { + bootargs = "console=ttySiRF1,115200 earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vpp_reserved: vpp_mem at 5e800000 { + compatible = "sirf,reserved-memory"; + reg = <0x5e800000 0x800000>; + }; + + nanddisk_reserved: nanddisk at 46000000 { + reg = <0x46000000 0x200000>; + no-map; + }; + }; + + + noc { + mediam { + nand at 17050000 { + memory-region = <&nanddisk_reserved>; + }; + }; + + gnssm { + spi1: spi at 18200000 { + status = "okay"; + spiflash: macronix at 0{ + status = "okay"; + compatible = "macronix,mx25l6405d"; + reg = <0>; + spi-max-frequency = <37500000>; + spi-cpha; + spi-cpol; + #address-cells = <1>; + #size-cells = <1>; + partitions at 0 { + label = "myspiboot"; + reg = <0x0 0x800000>; + }; + }; + }; + }; + + btm { + uart6: uart at 11000000 { + status = "okay"; + sirf,uart-has-rtscts; + }; + }; + + disp-iobg { + vpp at 13110000 { + memory-region = <&vpp_reserved>; + }; + }; + + display0: display at 0 { + compatible = "lvds-panel"; + source = "lvds.0"; + + bl-gpios = <&gpio_1 63 0>; + data-lines = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <60000000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <220>; + hback-porch = <100>; + hsync-len = <1>; + vback-porch = <10>; + vfront-porch = <25>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/atlas7.dtsi b/arch/arm/boot/dts/atlas7.dtsi new file mode 100644 index 0000000..43d707a --- /dev/null +++ b/arch/arm/boot/dts/atlas7.dtsi @@ -0,0 +1,813 @@ +/* + * DTS file for CSR SiRFatlas7 SoC + * + * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" +/ { + compatible = "sirf,atlas7"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial9 = &usp2; + }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0>; + }; + cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <1>; + }; + }; + + noc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10000000 0x10000000 0xc0000000>; + + gic: interrupt-controller at 10301000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10301000 0x1000>, + <0x10302000 0x0100>; + }; + + pmu_regulator: pmu_regulator at 10E30020 { + compatible = "sirf,atlas7-pmu-ldo"; + reg = <0x10E30020 0x4>; + ldo: ldo { + regulator-name = "ldo"; + }; + }; + + atlas7_codec: atlas7_codec at 10E30000 { + #sound-dai-cells = <0>; + compatible = "sirf,atlas7-codec"; + reg = <0x10E30000 0x400>; + clocks = <&car 62>; + ldo-supply = <&ldo>; + }; + + atlas7_iacc: atlas7_iacc at 10D01000 { + #sound-dai-cells = <0>; + compatible = "sirf,atlas7-iacc"; + reg = <0x10D01000 0x100>; + dmas = <&dmac3 0>, <&dmac3 7>, <&dmac3 8>, + <&dmac3 3>, <&dmac3 9>; + dma-names = "rx", "tx0", "tx1", "tx2", "tx3"; + clocks = <&car 62>; + }; + + ipc at 13240000 { + compatible = "sirf,atlas7-ipc"; + ranges = <0x13240000 0x13240000 0x00010000>; + #address-cells = <1>; + #size-cells = <1>; + + hwspinlock { + compatible = "sirf,hwspinlock"; + reg = <0x13240000 0x00010000>; + + num-spinlocks = <30>; + }; + + ns_m3_rproc at 0 { + compatible = "sirf,ns2m30-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 123 0>; + }; + + ns_m3_rproc at 1 { + compatible = "sirf,ns2m31-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 126 0>; + }; + + ns_kal_rproc at 0 { + compatible = "sirf,ns2kal0-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 124 0>; + }; + + ns_kal_rproc at 1 { + compatible = "sirf,ns2kal1-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 127 0>; + }; + }; + + pinctrl: ioc at 18880000 { + compatible = "sirf,atlas7-ioc"; + reg = <0x18880000 0x1000>, + <0x10E40000 0x1000>; + }; + + pmipc { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13240000 0x13240000 0x00010000>; + pmipc at 0x13240000 { + compatible = "sirf,atlas7-pmipc"; + reg = <0x13240000 0x00010000>; + }; + }; + + dramfw { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10830000 0x10830000 0x18000>; + dramfw at 10820000 { + compatible = "sirf,nocfw-dramfw"; + reg = <0x10830000 0x18000>; + }; + }; + + spramfw { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10250000 0x10250000 0x3000>; + spramfw at 10820000 { + compatible = "sirf,nocfw-spramfw"; + reg = <0x10250000 0x3000>; + }; + }; + + cpum { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10200000 0x10200000 0x3000>; + cpum at 10200000 { + compatible = "sirf,nocfw-cpum"; + reg = <0x10200000 0x3000>; + }; + }; + + cgum { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18641000 0x18641000 0x3000>, + <0x18620000 0x18620000 0x1000>; + + cgum at 18641000 { + compatible = "sirf,nocfw-cgum"; + reg = <0x18641000 0x3000>; + }; + + car: clock-controller at 18620000 { + compatible = "sirf,atlas7-car"; + reg = <0x18620000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + + gnssm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18000000 0x18000000 0x0000ffff>, + <0x18010000 0x18010000 0x1000>, + <0x18020000 0x18020000 0x1000>, + <0x18030000 0x18030000 0x1000>, + <0x18040000 0x18040000 0x1000>, + <0x18050000 0x18050000 0x1000>, + <0x18060000 0x18060000 0x1000>, + <0x18100000 0x18100000 0x3000>, + <0x18250000 0x18250000 0x10000>, + <0x18200000 0x18200000 0x1000>; + + dmac0: dma-controller at 18000000 { + cell-index = <0>; + compatible = "sirf,atlas7-dmac"; + reg = <0x18000000 0x1000>; + interrupts = <0 12 0>; + clocks = <&car 89>; + dma-channels = <16>; + #dma-cells = <1>; + }; + + gnssmfw at 0x18100000 { + compatible = "sirf,nocfw-gnssm"; + reg = <0x18100000 0x3000>; + }; + + uart0: uart at 18010000 { + cell-index = <0>; + compatible = "sirf,marco-uart"; + reg = <0x18010000 0x1000>; + interrupts = <0 17 0>; + clocks = <&car 90>; + fifosize = <128>; + dmas = <&dmac0 3>, <&dmac0 2>; + dma-names = "rx", "tx"; + }; + + uart1: uart at 18020000 { + cell-index = <1>; + compatible = "sirf,marco-uart"; + reg = <0x18020000 0x1000>; + interrupts = <0 18 0>; + clocks = <&car 88>; + fifosize = <32>; + }; + + uart2: uart at 18030000 { + cell-index = <2>; + compatible = "sirf,marco-uart"; + reg = <0x18030000 0x1000>; + interrupts = <0 19 0>; + clocks = <&car 91>; + fifosize = <128>; + dmas = <&dmac0 6>, <&dmac0 7>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart3: uart at 18040000 { + cell-index = <3>; + compatible = "sirf,marco-uart"; + reg = <0x18040000 0x1000>; + interrupts = <0 66 0>; + clocks = <&car 92>; + fifosize = <128>; + dmas = <&dmac0 4>, <&dmac0 5>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart4: uart at 18050000 { + cell-index = <4>; + compatible = "sirf,marco-uart"; + reg = <0x18050000 0x1000>; + interrupts = <0 69 0>; + clocks = <&car 93>; + fifosize = <128>; + dmas = <&dmac0 0>, <&dmac0 1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart5: uart at 18060000 { + cell-index = <5>; + compatible = "sirf,marco-uart"; + reg = <0x18060000 0x1000>; + interrupts = <0 71 0>; + clocks = <&car 94>; + fifosize = <128>; + dmas = <&dmac0 8>, <&dmac0 9>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + dspub at 18250000 { + compatible = "dx,cc44p"; + reg = <0x18250000 0x10000>; + interrupts = <0 27 0>; + }; + + spi1: spi at 18200000 { + compatible = "sirf,prima2-spi"; + reg = <0x18200000 0x1000>; + interrupts = <0 16 0>; + clocks = <&car 95>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmac0 12>, <&dmac0 13>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + }; + + + gpum { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13000000 0x13000000 0x3000>; + gpum at 0x13000000 { + compatible = "sirf,nocfw-gpum"; + reg = <0x13000000 0x3000>; + }; + }; + + mediam { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x16000000 0x16000000 0x00200000>, + <0x17020000 0x17020000 0x1000>, + <0x17030000 0x17030000 0x1000>, + <0x17040000 0x17040000 0x1000>, + <0x17050000 0x17050000 0x10000>, + <0x17060000 0x17060000 0x200>, + <0x17060200 0x17060200 0x100>, + <0x17070000 0x17070000 0x200>, + <0x17070200 0x17070200 0x100>, + <0x170A0000 0x170A0000 0x3000>; + + mediam at 170A0000 { + compatible = "sirf,nocfw-mediam"; + reg = <0x170A0000 0x3000>; + }; + + gpio_0: gpio_mediam at 17040000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,atlas7-gpio"; + reg = <0x17040000 0x1000>; + interrupts = <0 13 0>, <0 14 0>; + clocks = <&car 107>; + clock-names = "gpio0_io"; + gpio-controller; + interrupt-controller; + }; + + nand at 17050000 { + compatible = "sirf,atlas7-nand"; + reg = <0x17050000 0x10000>; + interrupts = <0 41 0>; + clocks = <&car 108>, <&car 112>; + clock-names = "nand_io", "nand_nand"; + }; + + sd0: sdhci at 16000000 { + cell-index = <0>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x16000000 0x100000>; + interrupts = <0 38 0>; + clocks = <&car 109>, <&car 111>; + clock-names = "core", "iface"; + wp-inverted; + non-removable; + status = "disabled"; + bus-width = <8>; + }; + + sd1: sdhci at 16100000 { + cell-index = <1>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x16100000 0x100000>; + interrupts = <0 38 0>; + clocks = <&car 109>, <&car 111>; + clock-names = "core", "iface"; + non-removable; + status = "disabled"; + bus-width = <8>; + }; + + usb0: usb at 17060000 { + cell-index = <0>; + compatible = "sirf,atlas7-usb"; + reg = <0x17060000 0x200>; + interrupts = <0 10 0>; + clocks = <&car 113>; + sirf,usbphy = <&usbphy0>; + phy_type = "utmi"; + dr_mode = "otg"; + maximum-speed = "high-speed"; + status = "okay"; + }; + + usb1: usb at 17070000 { + cell-index = <1>; + compatible = "sirf,atlas7-usb"; + reg = <0x17070000 0x200>; + interrupts = <0 11 0>; + clocks = <&car 114>; + sirf,usbphy = <&usbphy1>; + phy_type = "utmi"; + dr_mode = "host"; + maximum-speed = "high-speed"; + status = "okay"; + }; + + usbphy0: usbphy at 0 { + compatible = "sirf,atlas7-usbphy"; + reg = <0x17060200 0x100>; + clocks = <&car 115>; + status = "okay"; + }; + + usbphy1: usbphy at 1 { + compatible = "sirf,atlas7-usbphy"; + reg = <0x17070200 0x100>; + clocks = <&car 116>; + status = "okay"; + }; + + i2c0: i2c at 17020000 { + cell-index = <0>; + compatible = "sirf,prima2-i2c"; + reg = <0x17020000 0x1000>; + interrupts = <0 24 0>; + clocks = <&car 105>; + #address-cells = <1>; + #size-cells = <0>; + }; + + }; + + vdifm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13290000 0x13290000 0x3000>, + <0x13300000 0x13300000 0x1000>, + <0x14200000 0x14200000 0x600000>; + + vdifm at 13290000 { + compatible = "sirf,nocfw-vdifm"; + reg = <0x13290000 0x3000>; + }; + + gpio_1: gpio_vdifm at 13300000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,atlas7-gpio"; + reg = <0x13300000 0x1000>; + interrupts = <0 43 0>, <0 44 0>, <0 45 0>; + clocks = <&car 84>; + clock-names = "gpio1_io"; + gpio-controller; + interrupt-controller; + }; + + sd2: sdhci at 14200000 { + cell-index = <2>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14200000 0x100000>; + interrupts = <0 23 0>; + clocks = <&car 70>, <&car 75>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + sd-uhs-sdr50; + vqmmc-supply = <&vqmmc>; + vqmmc: vqmmc at 2 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <1950000>; + regulator-name = "vqmmc-ldo"; + regulator-type = "voltage"; + regulator-boot-on; + regulator-allow-bypass; + }; + }; + + sd3: sdhci at 14300000 { + cell-index = <3>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14300000 0x100000>; + interrupts = <0 23 0>; + clocks = <&car 76>, <&car 81>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + }; + + sd5: sdhci at 14500000 { + cell-index = <5>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14500000 0x100000>; + interrupts = <0 39 0>; + clocks = <&car 71>, <&car 76>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + loop-dma; + }; + + sd6: sdhci at 14600000 { + cell-index = <6>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14600000 0x100000>; + interrupts = <0 98 0>; + clocks = <&car 72>, <&car 77>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + }; + + sd7: sdhci at 14700000 { + cell-index = <7>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14700000 0x100000>; + interrupts = <0 98 0>; + clocks = <&car 72>, <&car 77>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + }; + }; + + audiom { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10d50000 0x10d50000 0x0000ffff>, + <0x10d60000 0x10d60000 0x0000ffff>, + <0x10d80000 0x10d80000 0x0000ffff>, + <0x10d90000 0x10d90000 0x0000ffff>, + <0x10ED0000 0x10ED0000 0x3000>, + <0x10dc8000 0x10dc8000 0x1000>, + <0x10dc0000 0x10dc0000 0x1000>, + <0x10db0000 0x10db0000 0x4000>, + <0x10d40000 0x10d40000 0x1000>, + <0x10d30000 0x10d30000 0x1000>; + + timer at 10dc0000 { + compatible = "sirf,marco-tick"; + reg = <0x10dc0000 0x1000>; + interrupts = <0 0 0>, + <0 1 0>, + <0 2 0>, + <0 49 0>, + <0 50 0>, + <0 51 0>; + clocks = <&car 47>; + }; + + timerb at 10dc8000 { + compatible = "sirf,marco-tick"; + reg = <0x10dc8000 0x1000>; + interrupts = <0 74 0>, + <0 75 0>, + <0 76 0>, + <0 77 0>, + <0 78 0>, + <0 79 0>; + clocks = <&car 47>; + }; + + vip0 at 10db0000 { + compatible = "sirf,atlas7-vip0"; + reg = <0x10db0000 0x2000>; + interrupts = <0 85 0>; + sirf,vip_cma_size = <0xC00000>; + }; + + cvd at 10db2000 { + compatible = "sirf,cvd"; + reg = <0x10db2000 0x2000>; + clocks = <&car 46>; + }; + + dmac2: dma-controller at 10d50000 { + cell-index = <2>; + compatible = "sirf,atlas7-dmac"; + reg = <0x10d50000 0xffff>; + interrupts = <0 55 0>; + clocks = <&car 60>; + dma-channels = <16>; + #dma-cells = <1>; + }; + + dmac3: dma-controller at 10d60000 { + cell-index = <3>; + compatible = "sirf,atlas7-dmac"; + reg = <0x10d60000 0xffff>; + interrupts = <0 56 0>; + clocks = <&car 61>; + dma-channels = <16>; + #dma-cells = <1>; + }; + + adc: adc at 10d80000 { + compatible = "sirf,atlas7-adc"; + reg = <0x10d80000 0xffff>; + interrupts = <0 34 0>; + clocks = <&car 49>; + #io-channel-cells = <1>; + }; + + pulsec at 10d90000 { + compatible = "sirf,prima2-pulsec"; + reg = <0x10d90000 0xffff>; + interrupts = <0 42 0>; + clocks = <&car 54>; + }; + + audiom at 10ED0000 { + compatible = "sirf,nocfw-audiom"; + reg = <0x10ED0000 0x3000>; + interrupts = <0 102 0>; + }; + + usp1: usp at 10d30000 { + cell-index = <1>; + reg = <0x10d30000 0x1000>; + fifosize = <512>; + clocks = <&car 58>; + dmas = <&dmac2 6>, <&dmac2 7>; + dma-names = "rx", "tx"; + }; + + usp2: usp at 10d40000 { + cell-index = <2>; + reg = <0x10d40000 0x1000>; + interrupts = <0 22 0>; + clocks = <&car 59>; + dmas = <&dmac2 12>, <&dmac2 13>; + dma-names = "rx", "tx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + ddrm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10820000 0x10820000 0x3000>, + <0x10800000 0x10800000 0x2000>; + ddrm at 10820000 { + compatible = "sirf,nocfw-ddrm"; + reg = <0x10820000 0x3000>; + interrupts = <0 105 0>; + }; + + memory-controller at 0x10800000 { + compatible = "sirf,atlas7-memc"; + reg = <0x10800000 0x2000>; + }; + + }; + + btm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x11002000 0x11002000 0x0000ffff>, + <0x11010000 0x11010000 0x3000>, + <0x11000000 0x11000000 0x1000>, + <0x11001000 0x11001000 0x1000>; + + dmac4: dma-controller at 11002000 { + cell-index = <4>; + compatible = "sirf,atlas7-dmac"; + reg = <0x11002000 0x1000>; + interrupts = <0 99 0>; + clocks = <&car 130>; + dma-channels = <16>; + #dma-cells = <1>; + }; + uart6: uart at 11000000 { + cell-index = <6>; + compatible = "sirf,marco-bt-uart", + "sirf,marco-uart"; + reg = <0x11000000 0x1000>; + interrupts = <0 100 0>; + clocks = <&car 131>, <&car 133>, <&car 134>; + clock-names = "uart", "general", "noc"; + fifosize = <128>; + dmas = <&dmac4 12>, <&dmac4 13>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + usp3: usp at 11001000 { + compatible = "sirf,atlas7-bt-usp", + "sirf,prima2-usp-pcm"; + cell-index = <3>; + reg = <0x11001000 0x1000>; + fifosize = <512>; + clocks = <&car 132>, <&car 129>, <&car 133>, + <&car 134>, <&car 135>; + clock-names = "usp3_io", "a7ca_btss", "a7ca_io", + "noc_btm_io", "thbtm_io"; + dmas = <&dmac4 0>, <&dmac4 1>; + dma-names = "rx", "tx"; + }; + + btm at 11010000 { + compatible = "sirf,nocfw-btm"; + reg = <0x11010000 0x3000>; + }; + }; + + rtcm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18810000 0x18810000 0x3000>, + <0x18840000 0x18840000 0x1000>, + <0x18890000 0x18890000 0x1000>, + <0x188B0000 0x188B0000 0x10000>, + <0x188D0000 0x188D0000 0x1000>; + rtcm at 18810000 { + compatible = "sirf,nocfw-rtcm"; + reg = <0x18810000 0x3000>; + interrupts = <0 109 0>; + }; + + gpio_2: gpio_rtcm at 18890000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,atlas7-gpio"; + reg = <0x18890000 0x1000>; + interrupts = <0 47 0>; + gpio-controller; + interrupt-controller; + }; + + rtc-iobg at 18840000 { + compatible = "sirf,prima2-rtciobg", + "sirf-prima2-rtciobg-bus", + "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x18840000 0x1000>; + + sysrtc at 2000 { + compatible = "sirf,prima2-sysrtc"; + reg = <0x2000 0x100>; + interrupts = <0 52 0>; + }; + pwrc at 3000 { + compatible = "sirf,atlas7-pwrc"; + reg = <0x3000 0x100>; + }; + }; + + qspi: flash at 188B0000 { + cell-index = <0>; + compatible = "sirf,atlas7-qspi-nor"; + reg = <0x188B0000 0x10000>; + interrupts = <0 15 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + retain at 0x188D0000 { + compatible = "sirf,atlas7-retain"; + reg = <0x188D0000 0x1000>; + }; + + }; + disp-iobg { + /* lcdc0 */ + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13100000 0x13100000 0x20000>, + <0x10e10000 0x10e10000 0x10000>; + + lcd at 13100000 { + compatible = "sirf,atlas7-lcdc"; + reg = <0x13100000 0x10000>; + interrupts = <0 30 0>; + clocks = <&car 79>; + }; + vpp at 13110000 { + compatible = "sirf,atlas7-vpp"; + reg = <0x13110000 0x10000>; + interrupts = <0 31 0>; + clocks = <&car 78>; + resets = <&car 29>; + }; + lvds at 10e10000 { + compatible = "sirf,atlas7-lvdsc"; + reg = <0x10e10000 0x10000>; + interrupts = <0 64 0>; + clocks = <&car 54>; + resets = <&car 29>; + }; + + }; + + graphics-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x12000000 0x12000000 0x1000000>; + + graphics at 12000000 { + compatible = "powervr,sgx531"; + reg = <0x12000000 0x1000000>; + interrupts = <0 6 0>; + clocks = <&car 126>; + }; + }; + }; +}; -- 2.2.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 4/4] ARM: sirf: bring up SMP in atlas7 SoC 2014-12-25 8:34 [PATCH 0/4] ARM: add basic CSR atlas7 Auto SoC support Barry Song ` (2 preceding siblings ...) 2014-12-25 8:34 ` [PATCH 3/4] ARM: dts: add init dts file for CSR atlas7 SoC Barry Song @ 2014-12-25 8:34 ` Barry Song 2014-12-30 22:38 ` Arnd Bergmann 3 siblings, 1 reply; 16+ messages in thread From: Barry Song @ 2014-12-25 8:34 UTC (permalink / raw) To: linux-arm-kernel From: Zhiwu Song <Zhiwu.Song@csr.com> correct cpu1 jump/flag address, remove scu related logic, scu doesn't expose in cortex-a7. this patch breaks marco chip, but marco project has been dropped. Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> --- arch/arm/mach-prima2/common.c | 1 - arch/arm/mach-prima2/platsmp.c | 52 +++++++++++------------------------------- 2 files changed, 13 insertions(+), 40 deletions(-) diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c index 2f45d48..444e34d 100644 --- a/arch/arm/mach-prima2/common.c +++ b/arch/arm/mach-prima2/common.c @@ -23,7 +23,6 @@ static void __init sirfsoc_init_late(void) static __init void sirfsoc_map_io(void) { sirfsoc_map_lluart(); - sirfsoc_map_scu(); } #ifdef CONFIG_ARCH_ATLAS6 diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c index 335c12e..fc2b03c 100644 --- a/arch/arm/mach-prima2/platsmp.c +++ b/arch/arm/mach-prima2/platsmp.c @@ -20,30 +20,10 @@ #include "common.h" -static void __iomem *scu_base; -static void __iomem *rsc_base; +static void __iomem *clk_base; static DEFINE_SPINLOCK(boot_lock); -static struct map_desc scu_io_desc __initdata = { - .length = SZ_4K, - .type = MT_DEVICE, -}; - -void __init sirfsoc_map_scu(void) -{ - unsigned long base; - - /* Get SCU base */ - asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); - - scu_io_desc.virtual = SIRFSOC_VA(base); - scu_io_desc.pfn = __phys_to_pfn(base); - iotable_init(&scu_io_desc, 1); - - scu_base = (void __iomem *)SIRFSOC_VA(base); -} - static void sirfsoc_secondary_init(unsigned int cpu) { /* @@ -60,8 +40,8 @@ static void sirfsoc_secondary_init(unsigned int cpu) spin_unlock(&boot_lock); } -static struct of_device_id rsc_ids[] = { - { .compatible = "sirf,marco-rsc" }, +static struct of_device_id clk_ids[] = { + { .compatible = "sirf,atlas7-clkc" }, {}, }; @@ -70,27 +50,27 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) unsigned long timeout; struct device_node *np; - np = of_find_matching_node(NULL, rsc_ids); + np = of_find_matching_node(NULL, clk_ids); if (!np) return -ENODEV; - rsc_base = of_iomap(np, 0); - if (!rsc_base) + clk_base = of_iomap(np, 0); + if (!clk_base) return -ENOMEM; /* - * write the address of secondary startup into the sram register - * at offset 0x2C, then write the magic number 0x3CAF5D62 to the - * RSC register at offset 0x28, which is what boot rom code is + * write the address of secondary startup into the clkc register + * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the + * clkc register at offset 0x2b8, which is what boot rom code is * waiting for. This would wake up the secondary core from WFE */ -#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2C +#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2bc __raw_writel(virt_to_phys(sirfsoc_secondary_startup), - rsc_base + SIRFSOC_CPU1_JUMPADDR_OFFSET); + clk_base + SIRFSOC_CPU1_JUMPADDR_OFFSET); -#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x28 +#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x2b8 __raw_writel(0x3CAF5D62, - rsc_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET); + clk_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET); /* make sure write buffer is drained */ mb(); @@ -132,13 +112,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) return pen_release != -1 ? -ENOSYS : 0; } -static void __init sirfsoc_smp_prepare_cpus(unsigned int max_cpus) -{ - scu_enable(scu_base); -} - struct smp_operations sirfsoc_smp_ops __initdata = { - .smp_prepare_cpus = sirfsoc_smp_prepare_cpus, .smp_secondary_init = sirfsoc_secondary_init, .smp_boot_secondary = sirfsoc_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU -- 2.2.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 4/4] ARM: sirf: bring up SMP in atlas7 SoC 2014-12-25 8:34 ` [PATCH 4/4] ARM: sirf: bring up SMP in " Barry Song @ 2014-12-30 22:38 ` Arnd Bergmann 2014-12-31 14:52 ` Barry Song 0 siblings, 1 reply; 16+ messages in thread From: Arnd Bergmann @ 2014-12-30 22:38 UTC (permalink / raw) To: linux-arm-kernel On Thursday 25 December 2014 16:34:20 Barry Song wrote: > From: Zhiwu Song <Zhiwu.Song@csr.com> > > correct cpu1 jump/flag address, remove scu related logic, scu doesn't > expose in cortex-a7. > > this patch breaks marco chip, but marco project has been dropped. > > Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> > Signed-off-by: Barry Song <Baohua.Song@csr.com> It doesn't seem nice to intentionally break hardware that we still have support for in the kernel. If Marco is not used anywhere, how about sending another patch before this one to remove all references to it? Arnd ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 4/4] ARM: sirf: bring up SMP in atlas7 SoC 2014-12-30 22:38 ` Arnd Bergmann @ 2014-12-31 14:52 ` Barry Song 0 siblings, 0 replies; 16+ messages in thread From: Barry Song @ 2014-12-31 14:52 UTC (permalink / raw) To: linux-arm-kernel 2014-12-31 6:38 GMT+08:00 Arnd Bergmann <arnd@arndb.de>: > On Thursday 25 December 2014 16:34:20 Barry Song wrote: >> From: Zhiwu Song <Zhiwu.Song@csr.com> >> >> correct cpu1 jump/flag address, remove scu related logic, scu doesn't >> expose in cortex-a7. >> >> this patch breaks marco chip, but marco project has been dropped. >> >> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> >> Signed-off-by: Barry Song <Baohua.Song@csr.com> > > It doesn't seem nice to intentionally break hardware that we still have > support for in the kernel. If Marco is not used anywhere, how about > sending another patch before this one to remove all references to it? it is ok. we can drop the MARCO machine and related configurations. > > Arnd -barry ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2015-01-04 7:23 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2014-12-25 8:34 [PATCH 0/4] ARM: add basic CSR atlas7 Auto SoC support Barry Song 2014-12-25 8:34 ` [PATCH 1/4] ARM: sirf: add two debug ports for CSRatlas7 SoC Barry Song 2014-12-30 22:35 ` Arnd Bergmann 2014-12-31 15:05 ` Barry Song 2014-12-31 15:31 ` Arnd Bergmann 2015-01-02 7:51 ` Barry Song 2015-01-02 8:59 ` Arnd Bergmann 2014-12-25 8:34 ` [PATCH 2/4] ARM: sirf: add atlas7 machine support Barry Song 2014-12-30 22:34 ` Arnd Bergmann 2014-12-31 14:50 ` Barry Song 2015-01-02 9:00 ` Arnd Bergmann 2015-01-04 7:23 ` Barry Song 2014-12-25 8:34 ` [PATCH 3/4] ARM: dts: add init dts file for CSR atlas7 SoC Barry Song 2014-12-25 8:34 ` [PATCH 4/4] ARM: sirf: bring up SMP in " Barry Song 2014-12-30 22:38 ` Arnd Bergmann 2014-12-31 14:52 ` Barry Song
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