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* [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot
@ 2020-05-10 21:01 Philippe Mathieu-Daudé
  2020-05-10 21:01 ` [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
                   ` (13 more replies)
  0 siblings, 14 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

The PMON firmware behave differently regarding it is run
after a cold/warm reset. A simple bit flip fix the issue,
however we need to know the type of reset to set it.
Currently QEMU only supports COLD reset.

This series contains various of my current Fuloong queue,
- Welcome Huacai Chen as co-maintainer,
- Fix typo in machine name,
- Few cleanups in Bonito64,
- Report various Bonito64 accesses as UNIMP,
- Proof-of-concept fix for the reset bit.

The last patch is not for merging, but is included to see
if the Multi-phase reset mechanism can fix the problem.

Regards,

Phil.

Huacai Chen (1):
  MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer

Philippe Mathieu-Daudé (11):
  hw/mips/fuloong2e: Rename PMON BIOS name
  hw/mips/fuloong2e: Move code and update a comment
  hw/mips/fuloong2e: Fix typo in Fuloong machine name
  hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
  hw/pci-host/bonito: Fix DPRINTF() format strings
  hw/pci-host/bonito: Map peripheral using physical address
  hw/pci-host/bonito: Map all the Bonito64 I/O range
  hw/pci-host/bonito: Map the different PCI ranges more detailled
  hw/pci-host/bonito: Better describe the I/O CS regions
  hw/pci-host/bonito: Set the Config register reset value with
    FIELD_DP32
  POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset

 docs/system/target-mips.rst              |  2 +-
 default-configs/mips64el-softmmu.mak     |  2 +-
 hw/isa/vt82c686.c                        |  2 +-
 hw/mips/{mips_fulong2e.c => fuloong2e.c} | 41 +++++------
 hw/pci-host/bonito.c                     | 92 +++++++++++++++++++-----
 tests/qtest/endianness-test.c            |  2 +-
 MAINTAINERS                              |  6 +-
 hw/mips/Kconfig                          |  3 +-
 hw/mips/Makefile.objs                    |  2 +-
 hw/pci-host/Kconfig                      |  5 ++
 hw/pci-host/Makefile.objs                |  2 +-
 11 files changed, 114 insertions(+), 45 deletions(-)
 rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)

-- 
2.21.3



^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  5:46   ` Aleksandar Markovic
  2020-05-10 21:01 ` [PATCH 02/12] hw/mips/fuloong2e: Rename PMON BIOS name Philippe Mathieu-Daudé
                   ` (12 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

From: Huacai Chen <chenhc@lemote.com>

I submitted the MIPS/fuloong2e support about ten years ago, and
after that I became a MIPS kernel developer. Last year, Philippe
Mathieu- Daudé asked me that whether I can be a reviewer of
MIPS/fuloong2e, and I promised that I will do some QEMU work in
the next year (i.e., 2020 and later). I think now (and also in
future) I can have some spare time, so I can finally do some real
work on QEMU/MIPS. And if possible, I hope I can be a co-maintainer
of MIPS/fuloong2e.

Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <1586337380-25217-3-git-send-email-chenhc@lemote.com>
[PMD: Added Jiaxun Yang as reviewer]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1f84e3ae2c..aa5c54c75a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1075,8 +1075,10 @@ S: Obsolete
 F: hw/mips/mips_r4k.c
 
 Fulong 2E
+M: Huacai Chen <chenhc@lemote.com>
 M: Philippe Mathieu-Daudé <f4bug@amsat.org>
 M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
+R: Jiaxun Yang <jiaxun.yang@flygoat.com>
 S: Odd Fixes
 F: hw/mips/mips_fulong2e.c
 F: hw/isa/vt82c686.c
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 02/12] hw/mips/fuloong2e: Rename PMON BIOS name
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
  2020-05-10 21:01 ` [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  1:14   ` chen huacai
  2020-05-10 21:01 ` [PATCH 03/12] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
                   ` (11 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

I'm not sure where 'pmon_fulong2e.bin' comes from. As I always
found this bios named 'pmon_2e.bin', rename the definition.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/mips_fulong2e.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index ef02d54b33..f067fa9720 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -69,7 +69,7 @@
  * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  * in the "Compile Guide".
  */
-#define FULONG_BIOSNAME "pmon_fulong2e.bin"
+#define FULONG_BIOSNAME "pmon_2e.bin"
 
 /* PCI SLOT in fulong 2e */
 #define FULONG2E_VIA_SLOT        5
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 03/12] hw/mips/fuloong2e: Move code and update a comment
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
  2020-05-10 21:01 ` [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
  2020-05-10 21:01 ` [PATCH 02/12] hw/mips/fuloong2e: Rename PMON BIOS name Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  1:15   ` chen huacai
  2020-05-10 21:01 ` [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
                   ` (10 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Move the RAM-related call closer to the RAM creation block,
rename the ROM comment.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/mips_fulong2e.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index f067fa9720..4e1a3646af 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -316,12 +316,11 @@ static void mips_fulong2e_init(MachineState *machine)
         error_report("Invalid RAM size, should be 256MB");
         exit(EXIT_FAILURE);
     }
+    memory_region_add_subregion(address_space_mem, 0, machine->ram);
 
-    /* allocate RAM */
+    /* Boot ROM */
     memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
                            &error_fatal);
-
-    memory_region_add_subregion(address_space_mem, 0, machine->ram);
     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
 
     /*
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (2 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 03/12] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  1:19   ` chen huacai
  2020-05-10 21:01 ` [PATCH 05/12] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
                   ` (9 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Aleksandar Markovic,
	Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

We always miswrote the Fuloong machine... Fix its name.
Add an machine alias to the previous name for backward
compatibility.

Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 docs/system/target-mips.rst              |  2 +-
 default-configs/mips64el-softmmu.mak     |  2 +-
 hw/isa/vt82c686.c                        |  2 +-
 hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
 hw/pci-host/bonito.c                     |  8 ++---
 tests/qtest/endianness-test.c            |  2 +-
 MAINTAINERS                              |  4 +--
 hw/mips/Kconfig                          |  2 +-
 hw/mips/Makefile.objs                    |  2 +-
 9 files changed, 36 insertions(+), 34 deletions(-)
 rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)

diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
index 2736fd0509..cd2a931edf 100644
--- a/docs/system/target-mips.rst
+++ b/docs/system/target-mips.rst
@@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
 
 -  G364 framebuffer
 
-The Fulong 2E emulation supports:
+The Fuloong 2E emulation supports:
 
 -  Loongson 2E CPU
 
diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
index 8b0c9b1e15..9f8a3ef156 100644
--- a/default-configs/mips64el-softmmu.mak
+++ b/default-configs/mips64el-softmmu.mak
@@ -2,7 +2,7 @@
 
 include mips-softmmu-common.mak
 CONFIG_IDE_VIA=y
-CONFIG_FULONG=y
+CONFIG_FULOONG=y
 CONFIG_ATI_VGA=y
 CONFIG_RTL8139_PCI=y
 CONFIG_JAZZ=y
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index d9b51fce8d..fac4e56b7d 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
     dc->vmsd = &vmstate_via;
     /*
      * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
-     * e.g. by mips_fulong2e_init()
+     * e.g. by mips_fuloong2e_init()
      */
     dc->user_creatable = false;
 }
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
similarity index 91%
rename from hw/mips/mips_fulong2e.c
rename to hw/mips/fuloong2e.c
index 4e1a3646af..624c46a4fd 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -1,5 +1,5 @@
 /*
- * QEMU fulong 2e mini pc support
+ * QEMU fuloong 2e mini pc support
  *
  * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
  * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
@@ -11,8 +11,8 @@
  */
 
 /*
- * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
- * http://www.linux-mips.org/wiki/Fulong
+ * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
+ * https://www.linux-mips.org/wiki/Fuloong_2E
  *
  * Loongson 2e user manual:
  * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
@@ -46,13 +46,13 @@
 #include "sysemu/reset.h"
 #include "qemu/error-report.h"
 
-#define DEBUG_FULONG2E_INIT
+#define DEBUG_FULOONG2E_INIT
 
 #define ENVP_ADDR               0x80002000l
 #define ENVP_NB_ENTRIES         16
 #define ENVP_ENTRY_SIZE         256
 
-/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
+/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
 #define BIOS_SIZE               (512 * KiB)
 #define MAX_IDE_BUS             2
 
@@ -69,12 +69,12 @@
  * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  * in the "Compile Guide".
  */
-#define FULONG_BIOSNAME "pmon_2e.bin"
+#define FULOONG_BIOSNAME "pmon_2e.bin"
 
-/* PCI SLOT in fulong 2e */
-#define FULONG2E_VIA_SLOT        5
-#define FULONG2E_ATI_SLOT        6
-#define FULONG2E_RTL8139_SLOT    7
+/* PCI SLOT in Fuloong 2e */
+#define FULOONG2E_VIA_SLOT        5
+#define FULOONG2E_ATI_SLOT        6
+#define FULOONG2E_RTL8139_SLOT    7
 
 static struct _loaderparams {
     int ram_size;
@@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
         const char *default_devaddr = NULL;
 
         if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
-            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
+            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
             default_devaddr = "07";
         }
 
@@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
     }
 }
 
-static void mips_fulong2e_init(MachineState *machine)
+static void mips_fuloong2e_init(MachineState *machine)
 {
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
@@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
         error_report("Invalid RAM size, should be 256MB");
         exit(EXIT_FAILURE);
     }
-    memory_region_add_subregion(address_space_mem, 0, machine->ram);
 
-    /* Boot ROM */
-    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
+    /* allocate RAM */
+    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
                            &error_fatal);
+
+    memory_region_add_subregion(address_space_mem, 0, machine->ram);
     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
 
     /*
@@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
         write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
     } else {
         if (bios_name == NULL) {
-                bios_name = FULONG_BIOSNAME;
+                bios_name = FULOONG_BIOSNAME;
         }
         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
         if (filename) {
@@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 
     /* South bridge -> IP5 */
-    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
+    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
                                &smbus, &isa_bus);
 
     /* GPU */
@@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
     network_init(pci_bus);
 }
 
-static void mips_fulong2e_machine_init(MachineClass *mc)
+static void mips_fuloong2e_machine_init(MachineClass *mc)
 {
-    mc->desc = "Fulong 2e mini pc";
-    mc->init = mips_fulong2e_init;
+    mc->desc = "Fuloong 2e mini pc";
+    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
+    mc->init = mips_fuloong2e_init;
     mc->block_default_type = IF_IDE;
     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
     mc->default_ram_size = 256 * MiB;
-    mc->default_ram_id = "fulong2e.ram";
+    mc->default_ram_id = "fuloong2e.ram";
 }
 
-DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
+DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index cc6545c8a8..b9bfe3c417 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -11,7 +11,7 @@
  */
 
 /*
- * fulong 2e mini pc has a bonito north bridge.
+ * fuloong 2e mini pc has a bonito north bridge.
  */
 
 /*
@@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
     slot = (pci_dev->devfn >> 3);
 
     switch (slot) {
-    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
+    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
         return irq_num % 4 + BONITO_IRQ_BASE;
-    case 6:   /* FULONG2E_ATI_SLOT, VGA */
+    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
         return 4 + BONITO_IRQ_BASE;
-    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
+    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
         return 5 + BONITO_IRQ_BASE;
     case 8 ... 12: /* PCI slot 1 to 4 */
         return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
index 2798802c63..cc088ac01a 100644
--- a/tests/qtest/endianness-test.c
+++ b/tests/qtest/endianness-test.c
@@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
     { "mips64", "pica61", 0x90000000, .bswap = true },
     { "mips64", "mips", 0x14000000, .bswap = true },
     { "mips64", "malta", 0x10000000, .bswap = true },
-    { "mips64el", "fulong2e", 0x1fd00000 },
+    { "mips64el", "fuloong2e", 0x1fd00000 },
     { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
     { "ppc", "40p", 0x80000000, .bswap = true },
     { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
diff --git a/MAINTAINERS b/MAINTAINERS
index aa5c54c75a..50f6a5f1bb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
 S: Obsolete
 F: hw/mips/mips_r4k.c
 
-Fulong 2E
+Fuloong 2E
 M: Huacai Chen <chenhc@lemote.com>
 M: Philippe Mathieu-Daudé <f4bug@amsat.org>
 M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
 R: Jiaxun Yang <jiaxun.yang@flygoat.com>
 S: Odd Fixes
-F: hw/mips/mips_fulong2e.c
+F: hw/mips/fuloong2e.c
 F: hw/isa/vt82c686.c
 F: hw/pci-host/bonito.c
 F: include/hw/isa/vt82c686.h
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 2c2adbc42a..cd38546689 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -41,7 +41,7 @@ config JAZZ
     select DS1225Y
     select JAZZ_LED
 
-config FULONG
+config FULOONG
     bool
 
 config MIPS_CPS
diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
index 525809af07..8ab41edc3f 100644
--- a/hw/mips/Makefile.objs
+++ b/hw/mips/Makefile.objs
@@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
 obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
 obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
 obj-$(CONFIG_JAZZ) += mips_jazz.o
-obj-$(CONFIG_FULONG) += mips_fulong2e.o
+obj-$(CONFIG_FULOONG) += fuloong2e.o
 obj-$(CONFIG_MIPS_CPS) += cps.o
 obj-$(CONFIG_MIPS_BOSTON) += boston.o
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 05/12] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (3 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  1:19   ` chen huacai
  2020-05-10 21:01 ` [PATCH 06/12] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
                   ` (8 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, Jiaxun Yang,
	Aleksandar Markovic, Aleksandar Markovic, Paolo Bonzini,
	Huacai Chen, Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

From: Philippe Mathieu-Daudé <philmd@redhat.com>

Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select
the Bonito North Bridge.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/mips/Kconfig           | 1 +
 hw/pci-host/Kconfig       | 4 ++++
 hw/pci-host/Makefile.objs | 2 +-
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index cd38546689..67d39c56a4 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -43,6 +43,7 @@ config JAZZ
 
 config FULOONG
     bool
+    select PCI_BONITO
 
 config MIPS_CPS
     bool
diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
index 9642c77e98..8db41edc7e 100644
--- a/hw/pci-host/Kconfig
+++ b/hw/pci-host/Kconfig
@@ -55,3 +55,7 @@ config PCI_EXPRESS_DESIGNWARE
     bool
     select PCI_EXPRESS
     select MSI_NONBROKEN
+
+config PCI_BONITO
+    select PCI
+    bool
diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs
index 8c87e8494d..e422e0aca0 100644
--- a/hw/pci-host/Makefile.objs
+++ b/hw/pci-host/Makefile.objs
@@ -12,7 +12,7 @@ common-obj-$(CONFIG_PPCE500_PCI) += ppce500.o
 common-obj-$(CONFIG_VERSATILE_PCI) += versatile.o
 
 common-obj-$(CONFIG_PCI_SABRE) += sabre.o
-common-obj-$(CONFIG_FULONG) += bonito.o
+common-obj-$(CONFIG_PCI_BONITO) += bonito.o
 common-obj-$(CONFIG_PCI_I440FX) += i440fx.o
 common-obj-$(CONFIG_XEN_IGD_PASSTHROUGH) += xen_igd_pt.o
 common-obj-$(CONFIG_PCI_EXPRESS_Q35) += q35.o
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 06/12] hw/pci-host/bonito: Fix DPRINTF() format strings
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (4 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 05/12] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  1:20   ` chen huacai
  2020-05-10 21:01 ` [PATCH 07/12] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
                   ` (7 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci-host/bonito.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index b9bfe3c417..10ead31e4f 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -239,7 +239,7 @@ static void bonito_writel(void *opaque, hwaddr addr,
 
     saddr = addr >> 2;
 
-    DPRINTF("bonito_writel "TARGET_FMT_plx" val %x saddr %x\n",
+    DPRINTF("bonito_writel "TARGET_FMT_plx" val %lx saddr %x\n",
             addr, val, saddr);
     switch (saddr) {
     case BONITO_BONPONCFG:
@@ -327,7 +327,7 @@ static void bonito_pciconf_writel(void *opaque, hwaddr addr,
     PCIBonitoState *s = opaque;
     PCIDevice *d = PCI_DEVICE(s);
 
-    DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %x\n", addr, val);
+    DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %lx\n", addr, val);
     d->config_write(d, addr, val, 4);
 }
 
@@ -474,7 +474,7 @@ static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val,
     uint32_t pciaddr;
     uint16_t status;
 
-    DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n",
+    DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %lx\n",
             addr, size, val);
 
     pciaddr = bonito_sbridge_pciaddr(s, addr);
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 07/12] hw/pci-host/bonito: Map peripheral using physical address
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (5 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 06/12] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  5:50   ` Aleksandar Markovic
  2020-05-10 21:01 ` [PATCH 08/12] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
                   ` (6 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Peripherals are mapped at physical address on busses.
Only CPU/IOMMU can use virtual addresses.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci-host/bonito.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 10ead31e4f..7ed462ffb5 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -647,12 +647,12 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
                           "ldma", 0x100);
     sysbus_init_mmio(sysbus, &s->iomem_ldma);
-    sysbus_mmio_map(sysbus, 3, 0xbfe00200);
+    sysbus_mmio_map(sysbus, 3, 0x1fe00200);
 
     memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
                           "cop", 0x100);
     sysbus_init_mmio(sysbus, &s->iomem_cop);
-    sysbus_mmio_map(sysbus, 4, 0xbfe00300);
+    sysbus_mmio_map(sysbus, 4, 0x1fe00300);
 
     /* Map PCI IO Space  0x1fd0 0000 - 0x1fd1 0000 */
     memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 08/12] hw/pci-host/bonito: Map all the Bonito64 I/O range
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (6 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 07/12] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  5:51   ` Aleksandar Markovic
  2020-05-10 21:01 ` [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled Philippe Mathieu-Daudé
                   ` (5 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

To ease following guest accesses to the Bonito64 chipset,
map its I/O range as UnimplementedDevice.
We can now see the accesses to unimplemented peripheral
using the '-d unimp' command line option.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci-host/bonito.c | 3 +++
 hw/pci-host/Kconfig  | 1 +
 2 files changed, 4 insertions(+)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 7ed462ffb5..9761780f44 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -48,6 +48,7 @@
 #include "sysemu/reset.h"
 #include "sysemu/runstate.h"
 #include "exec/address-spaces.h"
+#include "hw/misc/unimp.h"
 
 /* #define DEBUG_BONITO */
 
@@ -644,6 +645,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     sysbus_init_mmio(sysbus, &phb->data_mem);
     sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
 
+    create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE);
+
     memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
                           "ldma", 0x100);
     sysbus_init_mmio(sysbus, &s->iomem_ldma);
diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
index 8db41edc7e..036a61877a 100644
--- a/hw/pci-host/Kconfig
+++ b/hw/pci-host/Kconfig
@@ -58,4 +58,5 @@ config PCI_EXPRESS_DESIGNWARE
 
 config PCI_BONITO
     select PCI
+    select UNIMP
     bool
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (7 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 08/12] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  6:12   ` Aleksandar Markovic
  2020-05-10 21:01 ` [PATCH 10/12] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
                   ` (4 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Better describe the Bonito64 MEM HI/LO and I/O PCI ranges,
add more PCI regions as unimplemented.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci-host/bonito.c | 30 ++++++++++++++++++++++++++----
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 9761780f44..90a6c52a38 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -39,6 +39,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/units.h"
 #include "qemu/error-report.h"
 #include "hw/pci/pci.h"
 #include "hw/irq.h"
@@ -82,7 +83,7 @@
 #define BONITO_PCILO1_BASE      0x14000000
 #define BONITO_PCILO2_BASE      0x18000000
 #define BONITO_PCIHI_BASE       0x20000000
-#define BONITO_PCIHI_SIZE       0x20000000
+#define BONITO_PCIHI_SIZE       0x60000000
 #define BONITO_PCIHI_TOP        (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
 #define BONITO_PCIIO_BASE       0x1fd00000
 #define BONITO_PCIIO_BASE_VA    0xbfd00000
@@ -606,13 +607,25 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
     BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
 
-    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);
+    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
     phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
                                      pci_bonito_set_irq, pci_bonito_map_irq,
                                      dev, &bs->pci_mem, get_system_io(),
                                      0x28, 32, TYPE_PCI_BUS);
-    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
-                                &bs->pci_mem);
+
+    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
+    for (size_t i = 0; i < 3; i++) {
+        char *name = g_strdup_printf("pci.lomem%zu", i);
+
+        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
+                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
+        memory_region_add_subregion(get_system_memory(),
+                                    BONITO_PCILO_BASE + i * 64 * MiB,
+                                    &pcimem_lo_alias[i]);
+        g_free(name);
+    }
+
+    create_unimplemented_device("pci.io", 0x1fd00000, 1 * MiB);
 }
 
 static void bonito_realize(PCIDevice *dev, Error **errp)
@@ -620,6 +633,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     PCIBonitoState *s = PCI_BONITO(dev);
     SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
     PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
+    BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
 
     /*
      * Bonito North Bridge, built on FPGA,
@@ -652,6 +666,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     sysbus_init_mmio(sysbus, &s->iomem_ldma);
     sysbus_mmio_map(sysbus, 3, 0x1fe00200);
 
+    /* PCI copier */
     memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
                           "cop", 0x100);
     sysbus_init_mmio(sysbus, &s->iomem_cop);
@@ -669,6 +684,13 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     sysbus_init_mmio(sysbus, &s->bonito_localio);
     sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
 
+    MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
+    memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
+                             &bs->pci_mem, 0, BONITO_PCIHI_SIZE);
+    memory_region_add_subregion(get_system_memory(),
+                                0x20000000ul, pcimem_alias);
+    create_unimplemented_device("PCI_2", 0x80000000ul, 2 * GiB); /* pci_hi */
+
     /* set the default value of north bridge pci config */
     pci_set_word(dev->config + PCI_COMMAND, 0x0000);
     pci_set_word(dev->config + PCI_STATUS, 0x0000);
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 10/12] hw/pci-host/bonito: Better describe the I/O CS regions
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (8 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  5:53   ` Aleksandar Markovic
  2020-05-10 21:01 ` [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 Philippe Mathieu-Daudé
                   ` (3 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Better describe the I/O CS regions, add the ROMCS region.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci-host/bonito.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 90a6c52a38..335c7787eb 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -672,6 +672,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     sysbus_init_mmio(sysbus, &s->iomem_cop);
     sysbus_mmio_map(sysbus, 4, 0x1fe00300);
 
+    create_unimplemented_device("ROMCS", 0x1c000000, 60 * MiB);
+
     /* Map PCI IO Space  0x1fd0 0000 - 0x1fd1 0000 */
     memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
                              get_system_io(), 0, BONITO_PCIIO_SIZE);
@@ -679,10 +681,17 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
     sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE);
 
     /* add pci local io mapping */
-    memory_region_init_alias(&s->bonito_localio, OBJECT(s), "isa_mmio",
-                             get_system_io(), 0, BONITO_DEV_SIZE);
+
+    memory_region_init_alias(&s->bonito_localio, OBJECT(s), "IOCS[0]",
+                             get_system_io(), 0, 256 * KiB);
     sysbus_init_mmio(sysbus, &s->bonito_localio);
     sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
+    create_unimplemented_device("IOCS[1]", BONITO_DEV_BASE + 1 * 256 * KiB,
+                                256 * KiB);
+    create_unimplemented_device("IOCS[2]", BONITO_DEV_BASE + 2 * 256 * KiB,
+                                256 * KiB);
+    create_unimplemented_device("IOCS[3]", BONITO_DEV_BASE + 3 * 256 * KiB,
+                                256 * KiB);
 
     MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
     memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (9 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 10/12] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  6:17   ` Aleksandar Markovic
  2020-05-10 21:01 ` [NOTFORMERGE PATCH 12/12] POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset Philippe Mathieu-Daudé
                   ` (2 subsequent siblings)
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Describe some Config registers fields with the registerfields
API. Use the FIELD_DP32() macro to set the BONGENCFG register
bits at reset.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/pci-host/bonito.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 335c7787eb..86aceb333a 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -50,6 +50,7 @@
 #include "sysemu/runstate.h"
 #include "exec/address-spaces.h"
 #include "hw/misc/unimp.h"
+#include "hw/registerfields.h"
 
 /* #define DEBUG_BONITO */
 
@@ -112,8 +113,19 @@
 /* Power on register */
 
 #define BONITO_BONPONCFG        (0x00 >> 2)      /* 0x100 */
+
+/* PCI configuration register */
 #define BONITO_BONGENCFG_OFFSET 0x4
 #define BONITO_BONGENCFG        (BONITO_BONGENCFG_OFFSET >> 2)   /*0x104 */
+REG32(BONGENCFG,        0x104)
+FIELD(BONGENCFG, DEBUGMODE,      0, 1)
+FIELD(BONGENCFG, SNOOP,          1, 1)
+FIELD(BONGENCFG, CPUSELFRESET,   2, 1)
+FIELD(BONGENCFG, BYTESWAP,       6, 1)
+FIELD(BONGENCFG, UNCACHED,       7, 1)
+FIELD(BONGENCFG, PREFETCH,       8, 1)
+FIELD(BONGENCFG, WRITEBEHIND,    9, 1)
+FIELD(BONGENCFG, PCIQUEUE,      12, 1)
 
 /* 2. IO & IDE configuration */
 #define BONITO_IODEVCFG         (0x08 >> 2)      /* 0x108 */
@@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
 static void bonito_reset(void *opaque)
 {
     PCIBonitoState *s = opaque;
+    uint32_t val = 0;
 
     /* set the default value of north bridge registers */
 
     s->regs[BONITO_BONPONCFG] = 0xc40;
-    s->regs[BONITO_BONGENCFG] = 0x1384;
+    val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
+    val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
+    val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
+    val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
+    val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
+    s->regs[BONITO_BONGENCFG] = val;
+
     s->regs[BONITO_IODEVCFG] = 0x2bff8010;
     s->regs[BONITO_SDCFG] = 0x255e0091;
 
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [NOTFORMERGE PATCH 12/12] POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (10 preceding siblings ...)
  2020-05-10 21:01 ` [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 Philippe Mathieu-Daudé
@ 2020-05-10 21:01 ` Philippe Mathieu-Daudé
  2020-05-11  9:43 ` [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Aleksandar Markovic
  2020-05-26  7:47 ` Philippe Mathieu-Daudé
  13 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-10 21:01 UTC (permalink / raw)
  To: qemu-devel
  Cc: Laurent Vivier, Damien Hedde, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

The CPUSELFRESET bit should only be set on COLD reset.
To have the PMON firmware behave correctly after WARM
reset, we need to clear this bit.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: Damien Hedde <damien.hedde@greensocs.com>
---
 hw/pci-host/bonito.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 86aceb333a..60eab867f0 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -586,6 +586,12 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
     }
 }
 
+static ResetType bonito_reset_type(PCIBonitoState *s)
+{
+    /* TODO: Use resettable_get_type(s) to also return RESET_TYPE_WARM */
+    return RESET_TYPE_COLD;
+}
+
 static void bonito_reset(void *opaque)
 {
     PCIBonitoState *s = opaque;
@@ -598,7 +604,8 @@ static void bonito_reset(void *opaque)
     val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
     val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
     val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
-    val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
+    val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET,
+                     bonito_reset_type(s) == RESET_TYPE_COLD);
     s->regs[BONITO_BONGENCFG] = val;
 
     s->regs[BONITO_IODEVCFG] = 0x2bff8010;
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* Re: [PATCH 02/12] hw/mips/fuloong2e: Rename PMON BIOS name
  2020-05-10 21:01 ` [PATCH 02/12] hw/mips/fuloong2e: Rename PMON BIOS name Philippe Mathieu-Daudé
@ 2020-05-11  1:14   ` chen huacai
  0 siblings, 0 replies; 36+ messages in thread
From: chen huacai @ 2020-05-11  1:14 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Hi,  Philippe,

On Mon, May 11, 2020 at 5:05 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> I'm not sure where 'pmon_fulong2e.bin' comes from. As I always
> found this bios named 'pmon_2e.bin', rename the definition.
>
The Fuloong BIOS doesn't integrated in QEMU, so its name can be
anything. So, let's keep the old name (I think the old name more
distsinguishable)?

Huacai
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/mips/mips_fulong2e.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index ef02d54b33..f067fa9720 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -69,7 +69,7 @@
>   * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
>   * in the "Compile Guide".
>   */
> -#define FULONG_BIOSNAME "pmon_fulong2e.bin"
> +#define FULONG_BIOSNAME "pmon_2e.bin"
>
>  /* PCI SLOT in fulong 2e */
>  #define FULONG2E_VIA_SLOT        5
> --
> 2.21.3
>
>


-- 
Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 03/12] hw/mips/fuloong2e: Move code and update a comment
  2020-05-10 21:01 ` [PATCH 03/12] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
@ 2020-05-11  1:15   ` chen huacai
  0 siblings, 0 replies; 36+ messages in thread
From: chen huacai @ 2020-05-11  1:15 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Reviewed-by: Huacai Chen <chenhc@lemote.com>

On Mon, May 11, 2020 at 5:03 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Move the RAM-related call closer to the RAM creation block,
> rename the ROM comment.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/mips/mips_fulong2e.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index f067fa9720..4e1a3646af 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -316,12 +316,11 @@ static void mips_fulong2e_init(MachineState *machine)
>          error_report("Invalid RAM size, should be 256MB");
>          exit(EXIT_FAILURE);
>      }
> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>
> -    /* allocate RAM */
> +    /* Boot ROM */
>      memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
>                             &error_fatal);
> -
> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>      memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
>
>      /*
> --
> 2.21.3
>
>


-- 
Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-10 21:01 ` [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
@ 2020-05-11  1:19   ` chen huacai
  2020-05-11  6:21     ` Aleksandar Markovic
  0 siblings, 1 reply; 36+ messages in thread
From: chen huacai @ 2020-05-11  1:19 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Aleksandar Markovic,
	Huacai Chen, Paolo Bonzini, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

Hi, Philippe,

On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> We always miswrote the Fuloong machine... Fix its name.
> Add an machine alias to the previous name for backward
> compatibility.
>
> Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  docs/system/target-mips.rst              |  2 +-
>  default-configs/mips64el-softmmu.mak     |  2 +-
>  hw/isa/vt82c686.c                        |  2 +-
>  hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
also have a "mips_" prefix.

Huacai
>  hw/pci-host/bonito.c                     |  8 ++---
>  tests/qtest/endianness-test.c            |  2 +-
>  MAINTAINERS                              |  4 +--
>  hw/mips/Kconfig                          |  2 +-
>  hw/mips/Makefile.objs                    |  2 +-
>  9 files changed, 36 insertions(+), 34 deletions(-)
>  rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
>
> diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
> index 2736fd0509..cd2a931edf 100644
> --- a/docs/system/target-mips.rst
> +++ b/docs/system/target-mips.rst
> @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
>
>  -  G364 framebuffer
>
> -The Fulong 2E emulation supports:
> +The Fuloong 2E emulation supports:
>
>  -  Loongson 2E CPU
>
> diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
> index 8b0c9b1e15..9f8a3ef156 100644
> --- a/default-configs/mips64el-softmmu.mak
> +++ b/default-configs/mips64el-softmmu.mak
> @@ -2,7 +2,7 @@
>
>  include mips-softmmu-common.mak
>  CONFIG_IDE_VIA=y
> -CONFIG_FULONG=y
> +CONFIG_FULOONG=y
>  CONFIG_ATI_VGA=y
>  CONFIG_RTL8139_PCI=y
>  CONFIG_JAZZ=y
> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> index d9b51fce8d..fac4e56b7d 100644
> --- a/hw/isa/vt82c686.c
> +++ b/hw/isa/vt82c686.c
> @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
>      dc->vmsd = &vmstate_via;
>      /*
>       * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
> -     * e.g. by mips_fulong2e_init()
> +     * e.g. by mips_fuloong2e_init()
>       */
>      dc->user_creatable = false;
>  }
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
> similarity index 91%
> rename from hw/mips/mips_fulong2e.c
> rename to hw/mips/fuloong2e.c
> index 4e1a3646af..624c46a4fd 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -1,5 +1,5 @@
>  /*
> - * QEMU fulong 2e mini pc support
> + * QEMU fuloong 2e mini pc support
>   *
>   * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
>   * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
> @@ -11,8 +11,8 @@
>   */
>
>  /*
> - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> - * http://www.linux-mips.org/wiki/Fulong
> + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> + * https://www.linux-mips.org/wiki/Fuloong_2E
>   *
>   * Loongson 2e user manual:
>   * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
> @@ -46,13 +46,13 @@
>  #include "sysemu/reset.h"
>  #include "qemu/error-report.h"
>
> -#define DEBUG_FULONG2E_INIT
> +#define DEBUG_FULOONG2E_INIT
>
>  #define ENVP_ADDR               0x80002000l
>  #define ENVP_NB_ENTRIES         16
>  #define ENVP_ENTRY_SIZE         256
>
> -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
> +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
>  #define BIOS_SIZE               (512 * KiB)
>  #define MAX_IDE_BUS             2
>
> @@ -69,12 +69,12 @@
>   * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
>   * in the "Compile Guide".
>   */
> -#define FULONG_BIOSNAME "pmon_2e.bin"
> +#define FULOONG_BIOSNAME "pmon_2e.bin"
>
> -/* PCI SLOT in fulong 2e */
> -#define FULONG2E_VIA_SLOT        5
> -#define FULONG2E_ATI_SLOT        6
> -#define FULONG2E_RTL8139_SLOT    7
> +/* PCI SLOT in Fuloong 2e */
> +#define FULOONG2E_VIA_SLOT        5
> +#define FULOONG2E_ATI_SLOT        6
> +#define FULOONG2E_RTL8139_SLOT    7
>
>  static struct _loaderparams {
>      int ram_size;
> @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
>          const char *default_devaddr = NULL;
>
>          if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
> -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
> +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
>              default_devaddr = "07";
>          }
>
> @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
>      }
>  }
>
> -static void mips_fulong2e_init(MachineState *machine)
> +static void mips_fuloong2e_init(MachineState *machine)
>  {
>      const char *kernel_filename = machine->kernel_filename;
>      const char *kernel_cmdline = machine->kernel_cmdline;
> @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
>          error_report("Invalid RAM size, should be 256MB");
>          exit(EXIT_FAILURE);
>      }
> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>
> -    /* Boot ROM */
> -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
> +    /* allocate RAM */
> +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
>                             &error_fatal);
> +
> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>      memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
>
>      /*
> @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
>          write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
>      } else {
>          if (bios_name == NULL) {
> -                bios_name = FULONG_BIOSNAME;
> +                bios_name = FULOONG_BIOSNAME;
>          }
>          filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
>          if (filename) {
> @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
>      pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
>
>      /* South bridge -> IP5 */
> -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
> +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
>                                 &smbus, &isa_bus);
>
>      /* GPU */
> @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
>      network_init(pci_bus);
>  }
>
> -static void mips_fulong2e_machine_init(MachineClass *mc)
> +static void mips_fuloong2e_machine_init(MachineClass *mc)
>  {
> -    mc->desc = "Fulong 2e mini pc";
> -    mc->init = mips_fulong2e_init;
> +    mc->desc = "Fuloong 2e mini pc";
> +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
> +    mc->init = mips_fuloong2e_init;
>      mc->block_default_type = IF_IDE;
>      mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
>      mc->default_ram_size = 256 * MiB;
> -    mc->default_ram_id = "fulong2e.ram";
> +    mc->default_ram_id = "fuloong2e.ram";
>  }
>
> -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
> +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index cc6545c8a8..b9bfe3c417 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -11,7 +11,7 @@
>   */
>
>  /*
> - * fulong 2e mini pc has a bonito north bridge.
> + * fuloong 2e mini pc has a bonito north bridge.
>   */
>
>  /*
> @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>      slot = (pci_dev->devfn >> 3);
>
>      switch (slot) {
> -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
>          return irq_num % 4 + BONITO_IRQ_BASE;
> -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
> +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
>          return 4 + BONITO_IRQ_BASE;
> -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
> +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
>          return 5 + BONITO_IRQ_BASE;
>      case 8 ... 12: /* PCI slot 1 to 4 */
>          return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
> index 2798802c63..cc088ac01a 100644
> --- a/tests/qtest/endianness-test.c
> +++ b/tests/qtest/endianness-test.c
> @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
>      { "mips64", "pica61", 0x90000000, .bswap = true },
>      { "mips64", "mips", 0x14000000, .bswap = true },
>      { "mips64", "malta", 0x10000000, .bswap = true },
> -    { "mips64el", "fulong2e", 0x1fd00000 },
> +    { "mips64el", "fuloong2e", 0x1fd00000 },
>      { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
>      { "ppc", "40p", 0x80000000, .bswap = true },
>      { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
> diff --git a/MAINTAINERS b/MAINTAINERS
> index aa5c54c75a..50f6a5f1bb 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
>  S: Obsolete
>  F: hw/mips/mips_r4k.c
>
> -Fulong 2E
> +Fuloong 2E
>  M: Huacai Chen <chenhc@lemote.com>
>  M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>  M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
>  R: Jiaxun Yang <jiaxun.yang@flygoat.com>
>  S: Odd Fixes
> -F: hw/mips/mips_fulong2e.c
> +F: hw/mips/fuloong2e.c
>  F: hw/isa/vt82c686.c
>  F: hw/pci-host/bonito.c
>  F: include/hw/isa/vt82c686.h
> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
> index 2c2adbc42a..cd38546689 100644
> --- a/hw/mips/Kconfig
> +++ b/hw/mips/Kconfig
> @@ -41,7 +41,7 @@ config JAZZ
>      select DS1225Y
>      select JAZZ_LED
>
> -config FULONG
> +config FULOONG
>      bool
>
>  config MIPS_CPS
> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
> index 525809af07..8ab41edc3f 100644
> --- a/hw/mips/Makefile.objs
> +++ b/hw/mips/Makefile.objs
> @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
>  obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
>  obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
>  obj-$(CONFIG_JAZZ) += mips_jazz.o
> -obj-$(CONFIG_FULONG) += mips_fulong2e.o
> +obj-$(CONFIG_FULOONG) += fuloong2e.o
>  obj-$(CONFIG_MIPS_CPS) += cps.o
>  obj-$(CONFIG_MIPS_BOSTON) += boston.o
> --
> 2.21.3
>
>


-- 
Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 05/12] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
  2020-05-10 21:01 ` [PATCH 05/12] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
@ 2020-05-11  1:19   ` chen huacai
  0 siblings, 0 replies; 36+ messages in thread
From: chen huacai @ 2020-05-11  1:19 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Aleksandar Markovic,
	Huacai Chen, Paolo Bonzini, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

Reviewed-by: Huacai Chen <chenhc@lemote.com>

On Mon, May 11, 2020 at 5:03 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> From: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select
> the Bonito North Bridge.
>
> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
>  hw/mips/Kconfig           | 1 +
>  hw/pci-host/Kconfig       | 4 ++++
>  hw/pci-host/Makefile.objs | 2 +-
>  3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
> index cd38546689..67d39c56a4 100644
> --- a/hw/mips/Kconfig
> +++ b/hw/mips/Kconfig
> @@ -43,6 +43,7 @@ config JAZZ
>
>  config FULOONG
>      bool
> +    select PCI_BONITO
>
>  config MIPS_CPS
>      bool
> diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
> index 9642c77e98..8db41edc7e 100644
> --- a/hw/pci-host/Kconfig
> +++ b/hw/pci-host/Kconfig
> @@ -55,3 +55,7 @@ config PCI_EXPRESS_DESIGNWARE
>      bool
>      select PCI_EXPRESS
>      select MSI_NONBROKEN
> +
> +config PCI_BONITO
> +    select PCI
> +    bool
> diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs
> index 8c87e8494d..e422e0aca0 100644
> --- a/hw/pci-host/Makefile.objs
> +++ b/hw/pci-host/Makefile.objs
> @@ -12,7 +12,7 @@ common-obj-$(CONFIG_PPCE500_PCI) += ppce500.o
>  common-obj-$(CONFIG_VERSATILE_PCI) += versatile.o
>
>  common-obj-$(CONFIG_PCI_SABRE) += sabre.o
> -common-obj-$(CONFIG_FULONG) += bonito.o
> +common-obj-$(CONFIG_PCI_BONITO) += bonito.o
>  common-obj-$(CONFIG_PCI_I440FX) += i440fx.o
>  common-obj-$(CONFIG_XEN_IGD_PASSTHROUGH) += xen_igd_pt.o
>  common-obj-$(CONFIG_PCI_EXPRESS_Q35) += q35.o
> --
> 2.21.3
>
>


-- 
Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 06/12] hw/pci-host/bonito: Fix DPRINTF() format strings
  2020-05-10 21:01 ` [PATCH 06/12] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
@ 2020-05-11  1:20   ` chen huacai
  0 siblings, 0 replies; 36+ messages in thread
From: chen huacai @ 2020-05-11  1:20 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

Reviewed-by: Huacai Chen <chenhc@lemote.com>

On Mon, May 11, 2020 at 5:07 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/pci-host/bonito.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index b9bfe3c417..10ead31e4f 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -239,7 +239,7 @@ static void bonito_writel(void *opaque, hwaddr addr,
>
>      saddr = addr >> 2;
>
> -    DPRINTF("bonito_writel "TARGET_FMT_plx" val %x saddr %x\n",
> +    DPRINTF("bonito_writel "TARGET_FMT_plx" val %lx saddr %x\n",
>              addr, val, saddr);
>      switch (saddr) {
>      case BONITO_BONPONCFG:
> @@ -327,7 +327,7 @@ static void bonito_pciconf_writel(void *opaque, hwaddr addr,
>      PCIBonitoState *s = opaque;
>      PCIDevice *d = PCI_DEVICE(s);
>
> -    DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %x\n", addr, val);
> +    DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %lx\n", addr, val);
>      d->config_write(d, addr, val, 4);
>  }
>
> @@ -474,7 +474,7 @@ static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val,
>      uint32_t pciaddr;
>      uint16_t status;
>
> -    DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n",
> +    DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %lx\n",
>              addr, size, val);
>
>      pciaddr = bonito_sbridge_pciaddr(s, addr);
> --
> 2.21.3
>
>


-- 
Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
  2020-05-10 21:01 ` [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
@ 2020-05-11  5:46   ` Aleksandar Markovic
  0 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  5:46 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> From: Huacai Chen <chenhc@lemote.com>
>
> I submitted the MIPS/fuloong2e support about ten years ago, and
> after that I became a MIPS kernel developer. Last year, Philippe
> Mathieu- Daudé asked me that whether I can be a reviewer of
> MIPS/fuloong2e, and I promised that I will do some QEMU work in
> the next year (i.e., 2020 and later). I think now (and also in
> future) I can have some spare time, so I can finally do some real
> work on QEMU/MIPS. And if possible, I hope I can be a co-maintainer
> of MIPS/fuloong2e.
>
> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> Message-Id: <1586337380-25217-3-git-send-email-chenhc@lemote.com>
> [PMD: Added Jiaxun Yang as reviewer]
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  MAINTAINERS | 2 ++
>  1 file changed, 2 insertions(+)
>

Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1f84e3ae2c..aa5c54c75a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1075,8 +1075,10 @@ S: Obsolete
>  F: hw/mips/mips_r4k.c
>
>  Fulong 2E
> +M: Huacai Chen <chenhc@lemote.com>
>  M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>  M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> +R: Jiaxun Yang <jiaxun.yang@flygoat.com>
>  S: Odd Fixes
>  F: hw/mips/mips_fulong2e.c
>  F: hw/isa/vt82c686.c
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 07/12] hw/pci-host/bonito: Map peripheral using physical address
  2020-05-10 21:01 ` [PATCH 07/12] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
@ 2020-05-11  5:50   ` Aleksandar Markovic
  0 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  5:50 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> Peripherals are mapped at physical address on busses.
> Only CPU/IOMMU can use virtual addresses.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/pci-host/bonito.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 10ead31e4f..7ed462ffb5 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -647,12 +647,12 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
>                            "ldma", 0x100);
>      sysbus_init_mmio(sysbus, &s->iomem_ldma);
> -    sysbus_mmio_map(sysbus, 3, 0xbfe00200);
> +    sysbus_mmio_map(sysbus, 3, 0x1fe00200);
>
>      memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
>                            "cop", 0x100);
>      sysbus_init_mmio(sysbus, &s->iomem_cop);
> -    sysbus_mmio_map(sysbus, 4, 0xbfe00300);
> +    sysbus_mmio_map(sysbus, 4, 0x1fe00300);
>
>      /* Map PCI IO Space  0x1fd0 0000 - 0x1fd1 0000 */
>      memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 08/12] hw/pci-host/bonito: Map all the Bonito64 I/O range
  2020-05-10 21:01 ` [PATCH 08/12] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
@ 2020-05-11  5:51   ` Aleksandar Markovic
  0 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  5:51 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> To ease following guest accesses to the Bonito64 chipset,
> map its I/O range as UnimplementedDevice.
> We can now see the accesses to unimplemented peripheral
> using the '-d unimp' command line option.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/pci-host/bonito.c | 3 +++
>  hw/pci-host/Kconfig  | 1 +
>  2 files changed, 4 insertions(+)
>

Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 7ed462ffb5..9761780f44 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -48,6 +48,7 @@
>  #include "sysemu/reset.h"
>  #include "sysemu/runstate.h"
>  #include "exec/address-spaces.h"
> +#include "hw/misc/unimp.h"
>
>  /* #define DEBUG_BONITO */
>
> @@ -644,6 +645,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      sysbus_init_mmio(sysbus, &phb->data_mem);
>      sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
>
> +    create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE);
> +
>      memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
>                            "ldma", 0x100);
>      sysbus_init_mmio(sysbus, &s->iomem_ldma);
> diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
> index 8db41edc7e..036a61877a 100644
> --- a/hw/pci-host/Kconfig
> +++ b/hw/pci-host/Kconfig
> @@ -58,4 +58,5 @@ config PCI_EXPRESS_DESIGNWARE
>
>  config PCI_BONITO
>      select PCI
> +    select UNIMP
>      bool
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 10/12] hw/pci-host/bonito: Better describe the I/O CS regions
  2020-05-10 21:01 ` [PATCH 10/12] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
@ 2020-05-11  5:53   ` Aleksandar Markovic
  0 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  5:53 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> Better describe the I/O CS regions, add the ROMCS region.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/pci-host/bonito.c | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
>

Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 90a6c52a38..335c7787eb 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -672,6 +672,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      sysbus_init_mmio(sysbus, &s->iomem_cop);
>      sysbus_mmio_map(sysbus, 4, 0x1fe00300);
>
> +    create_unimplemented_device("ROMCS", 0x1c000000, 60 * MiB);
> +
>      /* Map PCI IO Space  0x1fd0 0000 - 0x1fd1 0000 */
>      memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
>                               get_system_io(), 0, BONITO_PCIIO_SIZE);
> @@ -679,10 +681,17 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE);
>
>      /* add pci local io mapping */
> -    memory_region_init_alias(&s->bonito_localio, OBJECT(s), "isa_mmio",
> -                             get_system_io(), 0, BONITO_DEV_SIZE);
> +
> +    memory_region_init_alias(&s->bonito_localio, OBJECT(s), "IOCS[0]",
> +                             get_system_io(), 0, 256 * KiB);
>      sysbus_init_mmio(sysbus, &s->bonito_localio);
>      sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
> +    create_unimplemented_device("IOCS[1]", BONITO_DEV_BASE + 1 * 256 * KiB,
> +                                256 * KiB);
> +    create_unimplemented_device("IOCS[2]", BONITO_DEV_BASE + 2 * 256 * KiB,
> +                                256 * KiB);
> +    create_unimplemented_device("IOCS[3]", BONITO_DEV_BASE + 3 * 256 * KiB,
> +                                256 * KiB);
>
>      MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
>      memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled
  2020-05-10 21:01 ` [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled Philippe Mathieu-Daudé
@ 2020-05-11  6:12   ` Aleksandar Markovic
  2020-05-11  6:33     ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  6:12 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> Better describe the Bonito64 MEM HI/LO and I/O PCI ranges,
> add more PCI regions as unimplemented.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/pci-host/bonito.c | 30 ++++++++++++++++++++++++++----
>  1 file changed, 26 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 9761780f44..90a6c52a38 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -39,6 +39,7 @@
>   */
>
>  #include "qemu/osdep.h"
> +#include "qemu/units.h"
>  #include "qemu/error-report.h"
>  #include "hw/pci/pci.h"
>  #include "hw/irq.h"
> @@ -82,7 +83,7 @@
>  #define BONITO_PCILO1_BASE      0x14000000
>  #define BONITO_PCILO2_BASE      0x18000000
>  #define BONITO_PCIHI_BASE       0x20000000
> -#define BONITO_PCIHI_SIZE       0x20000000
> +#define BONITO_PCIHI_SIZE       0x60000000
>  #define BONITO_PCIHI_TOP        (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
>  #define BONITO_PCIIO_BASE       0x1fd00000
>  #define BONITO_PCIIO_BASE_VA    0xbfd00000
> @@ -606,13 +607,25 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>      PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>      BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
>
> -    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);
> +    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
>      phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
>                                       pci_bonito_set_irq, pci_bonito_map_irq,
>                                       dev, &bs->pci_mem, get_system_io(),
>                                       0x28, 32, TYPE_PCI_BUS);
> -    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
> -                                &bs->pci_mem);
> +
> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
> +    for (size_t i = 0; i < 3; i++) {
> +        char *name = g_strdup_printf("pci.lomem%zu", i);
> +
> +        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
> +                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
> +        memory_region_add_subregion(get_system_memory(),
> +                                    BONITO_PCILO_BASE + i * 64 * MiB,
> +                                    &pcimem_lo_alias[i]);
> +        g_free(name);
> +    }
> +
> +    create_unimplemented_device("pci.io", 0x1fd00000, 1 * MiB);

Hi, Philippe.

I am delighted with the whole series, finally cleaning Bonito code feels good.

I just want to ask you if it possible to get rid of constants like
0x1fd00000 (generally in this code, not limited to this patch), and
give the some nice "#define" names?

Yours,
Aleksandar

>  }
>
>  static void bonito_realize(PCIDevice *dev, Error **errp)
> @@ -620,6 +633,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      PCIBonitoState *s = PCI_BONITO(dev);
>      SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
>      PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
> +    BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
>
>      /*
>       * Bonito North Bridge, built on FPGA,
> @@ -652,6 +666,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      sysbus_init_mmio(sysbus, &s->iomem_ldma);
>      sysbus_mmio_map(sysbus, 3, 0x1fe00200);
>
> +    /* PCI copier */
>      memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
>                            "cop", 0x100);
>      sysbus_init_mmio(sysbus, &s->iomem_cop);
> @@ -669,6 +684,13 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>      sysbus_init_mmio(sysbus, &s->bonito_localio);
>      sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
>
> +    MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
> +    memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
> +                             &bs->pci_mem, 0, BONITO_PCIHI_SIZE);
> +    memory_region_add_subregion(get_system_memory(),
> +                                0x20000000ul, pcimem_alias);
> +    create_unimplemented_device("PCI_2", 0x80000000ul, 2 * GiB); /* pci_hi */
> +
>      /* set the default value of north bridge pci config */
>      pci_set_word(dev->config + PCI_COMMAND, 0x0000);
>      pci_set_word(dev->config + PCI_STATUS, 0x0000);
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
  2020-05-10 21:01 ` [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 Philippe Mathieu-Daudé
@ 2020-05-11  6:17   ` Aleksandar Markovic
  2020-05-11  6:30     ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  6:17 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> Describe some Config registers fields with the registerfields
> API. Use the FIELD_DP32() macro to set the BONGENCFG register
> bits at reset.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/pci-host/bonito.c | 21 ++++++++++++++++++++-
>  1 file changed, 20 insertions(+), 1 deletion(-)
>

Some Config registers? Is there any reason not to cover all Bonito
config registers? Or, the commit message was inprecise?

But, in general, I salute the intent of this patch.

Sincerely,
Aleksandar

> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index 335c7787eb..86aceb333a 100644
> --- a/hw/pci-host/bonito.c
> +++ b/hw/pci-host/bonito.c
> @@ -50,6 +50,7 @@
>  #include "sysemu/runstate.h"
>  #include "exec/address-spaces.h"
>  #include "hw/misc/unimp.h"
> +#include "hw/registerfields.h"
>
>  /* #define DEBUG_BONITO */
>
> @@ -112,8 +113,19 @@
>  /* Power on register */
>
>  #define BONITO_BONPONCFG        (0x00 >> 2)      /* 0x100 */
> +
> +/* PCI configuration register */
>  #define BONITO_BONGENCFG_OFFSET 0x4
>  #define BONITO_BONGENCFG        (BONITO_BONGENCFG_OFFSET >> 2)   /*0x104 */
> +REG32(BONGENCFG,        0x104)
> +FIELD(BONGENCFG, DEBUGMODE,      0, 1)
> +FIELD(BONGENCFG, SNOOP,          1, 1)
> +FIELD(BONGENCFG, CPUSELFRESET,   2, 1)
> +FIELD(BONGENCFG, BYTESWAP,       6, 1)
> +FIELD(BONGENCFG, UNCACHED,       7, 1)
> +FIELD(BONGENCFG, PREFETCH,       8, 1)
> +FIELD(BONGENCFG, WRITEBEHIND,    9, 1)
> +FIELD(BONGENCFG, PCIQUEUE,      12, 1)
>
>  /* 2. IO & IDE configuration */
>  #define BONITO_IODEVCFG         (0x08 >> 2)      /* 0x108 */
> @@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>  static void bonito_reset(void *opaque)
>  {
>      PCIBonitoState *s = opaque;
> +    uint32_t val = 0;
>
>      /* set the default value of north bridge registers */
>
>      s->regs[BONITO_BONPONCFG] = 0xc40;
> -    s->regs[BONITO_BONGENCFG] = 0x1384;
> +    val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
> +    val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
> +    val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
> +    val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
> +    val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
> +    s->regs[BONITO_BONGENCFG] = val;
> +
>      s->regs[BONITO_IODEVCFG] = 0x2bff8010;
>      s->regs[BONITO_SDCFG] = 0x255e0091;
>
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-11  1:19   ` chen huacai
@ 2020-05-11  6:21     ` Aleksandar Markovic
  2020-05-11  6:38       ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  6:21 UTC (permalink / raw)
  To: chen huacai
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, qemu-level, Aleksandar Markovic, Huacai Chen,
	Paolo Bonzini, Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

пон, 11. мај 2020. у 03:11 chen huacai <zltjiangshi@gmail.com> је написао/ла:
>
> Hi, Philippe,
>
> On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >
> > We always miswrote the Fuloong machine... Fix its name.
> > Add an machine alias to the previous name for backward
> > compatibility.
> >
> > Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > ---
> >  docs/system/target-mips.rst              |  2 +-
> >  default-configs/mips64el-softmmu.mak     |  2 +-
> >  hw/isa/vt82c686.c                        |  2 +-
> >  hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
> Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
> also have a "mips_" prefix.
>

I would leave mips_ prefix for Fuloong, and actually add it to Boston
source file, so that we are finally consistent across all MIPS
machines.

What do you think?

Aleksandar

> Huacai
> >  hw/pci-host/bonito.c                     |  8 ++---
> >  tests/qtest/endianness-test.c            |  2 +-
> >  MAINTAINERS                              |  4 +--
> >  hw/mips/Kconfig                          |  2 +-
> >  hw/mips/Makefile.objs                    |  2 +-
> >  9 files changed, 36 insertions(+), 34 deletions(-)
> >  rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
> >
> > diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
> > index 2736fd0509..cd2a931edf 100644
> > --- a/docs/system/target-mips.rst
> > +++ b/docs/system/target-mips.rst
> > @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
> >
> >  -  G364 framebuffer
> >
> > -The Fulong 2E emulation supports:
> > +The Fuloong 2E emulation supports:
> >
> >  -  Loongson 2E CPU
> >
> > diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
> > index 8b0c9b1e15..9f8a3ef156 100644
> > --- a/default-configs/mips64el-softmmu.mak
> > +++ b/default-configs/mips64el-softmmu.mak
> > @@ -2,7 +2,7 @@
> >
> >  include mips-softmmu-common.mak
> >  CONFIG_IDE_VIA=y
> > -CONFIG_FULONG=y
> > +CONFIG_FULOONG=y
> >  CONFIG_ATI_VGA=y
> >  CONFIG_RTL8139_PCI=y
> >  CONFIG_JAZZ=y
> > diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> > index d9b51fce8d..fac4e56b7d 100644
> > --- a/hw/isa/vt82c686.c
> > +++ b/hw/isa/vt82c686.c
> > @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
> >      dc->vmsd = &vmstate_via;
> >      /*
> >       * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
> > -     * e.g. by mips_fulong2e_init()
> > +     * e.g. by mips_fuloong2e_init()
> >       */
> >      dc->user_creatable = false;
> >  }
> > diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
> > similarity index 91%
> > rename from hw/mips/mips_fulong2e.c
> > rename to hw/mips/fuloong2e.c
> > index 4e1a3646af..624c46a4fd 100644
> > --- a/hw/mips/mips_fulong2e.c
> > +++ b/hw/mips/fuloong2e.c
> > @@ -1,5 +1,5 @@
> >  /*
> > - * QEMU fulong 2e mini pc support
> > + * QEMU fuloong 2e mini pc support
> >   *
> >   * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
> >   * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
> > @@ -11,8 +11,8 @@
> >   */
> >
> >  /*
> > - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> > - * http://www.linux-mips.org/wiki/Fulong
> > + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> > + * https://www.linux-mips.org/wiki/Fuloong_2E
> >   *
> >   * Loongson 2e user manual:
> >   * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
> > @@ -46,13 +46,13 @@
> >  #include "sysemu/reset.h"
> >  #include "qemu/error-report.h"
> >
> > -#define DEBUG_FULONG2E_INIT
> > +#define DEBUG_FULOONG2E_INIT
> >
> >  #define ENVP_ADDR               0x80002000l
> >  #define ENVP_NB_ENTRIES         16
> >  #define ENVP_ENTRY_SIZE         256
> >
> > -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
> > +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
> >  #define BIOS_SIZE               (512 * KiB)
> >  #define MAX_IDE_BUS             2
> >
> > @@ -69,12 +69,12 @@
> >   * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
> >   * in the "Compile Guide".
> >   */
> > -#define FULONG_BIOSNAME "pmon_2e.bin"
> > +#define FULOONG_BIOSNAME "pmon_2e.bin"
> >
> > -/* PCI SLOT in fulong 2e */
> > -#define FULONG2E_VIA_SLOT        5
> > -#define FULONG2E_ATI_SLOT        6
> > -#define FULONG2E_RTL8139_SLOT    7
> > +/* PCI SLOT in Fuloong 2e */
> > +#define FULOONG2E_VIA_SLOT        5
> > +#define FULOONG2E_ATI_SLOT        6
> > +#define FULOONG2E_RTL8139_SLOT    7
> >
> >  static struct _loaderparams {
> >      int ram_size;
> > @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
> >          const char *default_devaddr = NULL;
> >
> >          if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
> > -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
> > +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
> >              default_devaddr = "07";
> >          }
> >
> > @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
> >      }
> >  }
> >
> > -static void mips_fulong2e_init(MachineState *machine)
> > +static void mips_fuloong2e_init(MachineState *machine)
> >  {
> >      const char *kernel_filename = machine->kernel_filename;
> >      const char *kernel_cmdline = machine->kernel_cmdline;
> > @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
> >          error_report("Invalid RAM size, should be 256MB");
> >          exit(EXIT_FAILURE);
> >      }
> > -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> >
> > -    /* Boot ROM */
> > -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
> > +    /* allocate RAM */
> > +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
> >                             &error_fatal);
> > +
> > +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> >      memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
> >
> >      /*
> > @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
> >          write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
> >      } else {
> >          if (bios_name == NULL) {
> > -                bios_name = FULONG_BIOSNAME;
> > +                bios_name = FULOONG_BIOSNAME;
> >          }
> >          filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> >          if (filename) {
> > @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
> >      pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
> >
> >      /* South bridge -> IP5 */
> > -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
> > +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
> >                                 &smbus, &isa_bus);
> >
> >      /* GPU */
> > @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
> >      network_init(pci_bus);
> >  }
> >
> > -static void mips_fulong2e_machine_init(MachineClass *mc)
> > +static void mips_fuloong2e_machine_init(MachineClass *mc)
> >  {
> > -    mc->desc = "Fulong 2e mini pc";
> > -    mc->init = mips_fulong2e_init;
> > +    mc->desc = "Fuloong 2e mini pc";
> > +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
> > +    mc->init = mips_fuloong2e_init;
> >      mc->block_default_type = IF_IDE;
> >      mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
> >      mc->default_ram_size = 256 * MiB;
> > -    mc->default_ram_id = "fulong2e.ram";
> > +    mc->default_ram_id = "fuloong2e.ram";
> >  }
> >
> > -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
> > +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
> > diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> > index cc6545c8a8..b9bfe3c417 100644
> > --- a/hw/pci-host/bonito.c
> > +++ b/hw/pci-host/bonito.c
> > @@ -11,7 +11,7 @@
> >   */
> >
> >  /*
> > - * fulong 2e mini pc has a bonito north bridge.
> > + * fuloong 2e mini pc has a bonito north bridge.
> >   */
> >
> >  /*
> > @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> >      slot = (pci_dev->devfn >> 3);
> >
> >      switch (slot) {
> > -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> > +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> >          return irq_num % 4 + BONITO_IRQ_BASE;
> > -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
> > +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
> >          return 4 + BONITO_IRQ_BASE;
> > -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
> > +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
> >          return 5 + BONITO_IRQ_BASE;
> >      case 8 ... 12: /* PCI slot 1 to 4 */
> >          return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> > diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
> > index 2798802c63..cc088ac01a 100644
> > --- a/tests/qtest/endianness-test.c
> > +++ b/tests/qtest/endianness-test.c
> > @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
> >      { "mips64", "pica61", 0x90000000, .bswap = true },
> >      { "mips64", "mips", 0x14000000, .bswap = true },
> >      { "mips64", "malta", 0x10000000, .bswap = true },
> > -    { "mips64el", "fulong2e", 0x1fd00000 },
> > +    { "mips64el", "fuloong2e", 0x1fd00000 },
> >      { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
> >      { "ppc", "40p", 0x80000000, .bswap = true },
> >      { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index aa5c54c75a..50f6a5f1bb 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> >  S: Obsolete
> >  F: hw/mips/mips_r4k.c
> >
> > -Fulong 2E
> > +Fuloong 2E
> >  M: Huacai Chen <chenhc@lemote.com>
> >  M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >  M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> >  R: Jiaxun Yang <jiaxun.yang@flygoat.com>
> >  S: Odd Fixes
> > -F: hw/mips/mips_fulong2e.c
> > +F: hw/mips/fuloong2e.c
> >  F: hw/isa/vt82c686.c
> >  F: hw/pci-host/bonito.c
> >  F: include/hw/isa/vt82c686.h
> > diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
> > index 2c2adbc42a..cd38546689 100644
> > --- a/hw/mips/Kconfig
> > +++ b/hw/mips/Kconfig
> > @@ -41,7 +41,7 @@ config JAZZ
> >      select DS1225Y
> >      select JAZZ_LED
> >
> > -config FULONG
> > +config FULOONG
> >      bool
> >
> >  config MIPS_CPS
> > diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
> > index 525809af07..8ab41edc3f 100644
> > --- a/hw/mips/Makefile.objs
> > +++ b/hw/mips/Makefile.objs
> > @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
> >  obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
> >  obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
> >  obj-$(CONFIG_JAZZ) += mips_jazz.o
> > -obj-$(CONFIG_FULONG) += mips_fulong2e.o
> > +obj-$(CONFIG_FULOONG) += fuloong2e.o
> >  obj-$(CONFIG_MIPS_CPS) += cps.o
> >  obj-$(CONFIG_MIPS_BOSTON) += boston.o
> > --
> > 2.21.3
> >
> >
>
>
> --
> Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
  2020-05-11  6:17   ` Aleksandar Markovic
@ 2020-05-11  6:30     ` Philippe Mathieu-Daudé
  2020-05-11  7:16       ` Aleksandar Markovic
  0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-11  6:30 UTC (permalink / raw)
  To: Aleksandar Markovic
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

On 5/11/20 8:17 AM, Aleksandar Markovic wrote:
> нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
> написао/ла:
>>
>> Describe some Config registers fields with the registerfields
>> API. Use the FIELD_DP32() macro to set the BONGENCFG register
>> bits at reset.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>   hw/pci-host/bonito.c | 21 ++++++++++++++++++++-
>>   1 file changed, 20 insertions(+), 1 deletion(-)
>>
> 
> Some Config registers? Is there any reason not to cover all Bonito
> config registers? Or, the commit message was inprecise?

The commit message is not correct English, I wanted to say "some bits of 
the Config register" (I don't want to overload the file defining bits 
we'll never use).

> 
> But, in general, I salute the intent of this patch.

Thanks! I'll reword the description.

> 
> Sincerely,
> Aleksandar
> 
>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>> index 335c7787eb..86aceb333a 100644
>> --- a/hw/pci-host/bonito.c
>> +++ b/hw/pci-host/bonito.c
>> @@ -50,6 +50,7 @@
>>   #include "sysemu/runstate.h"
>>   #include "exec/address-spaces.h"
>>   #include "hw/misc/unimp.h"
>> +#include "hw/registerfields.h"
>>
>>   /* #define DEBUG_BONITO */
>>
>> @@ -112,8 +113,19 @@
>>   /* Power on register */
>>
>>   #define BONITO_BONPONCFG        (0x00 >> 2)      /* 0x100 */
>> +
>> +/* PCI configuration register */
>>   #define BONITO_BONGENCFG_OFFSET 0x4
>>   #define BONITO_BONGENCFG        (BONITO_BONGENCFG_OFFSET >> 2)   /*0x104 */
>> +REG32(BONGENCFG,        0x104)
>> +FIELD(BONGENCFG, DEBUGMODE,      0, 1)
>> +FIELD(BONGENCFG, SNOOP,          1, 1)
>> +FIELD(BONGENCFG, CPUSELFRESET,   2, 1)
>> +FIELD(BONGENCFG, BYTESWAP,       6, 1)
>> +FIELD(BONGENCFG, UNCACHED,       7, 1)
>> +FIELD(BONGENCFG, PREFETCH,       8, 1)
>> +FIELD(BONGENCFG, WRITEBEHIND,    9, 1)
>> +FIELD(BONGENCFG, PCIQUEUE,      12, 1)
>>
>>   /* 2. IO & IDE configuration */
>>   #define BONITO_IODEVCFG         (0x08 >> 2)      /* 0x108 */
>> @@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>>   static void bonito_reset(void *opaque)
>>   {
>>       PCIBonitoState *s = opaque;
>> +    uint32_t val = 0;
>>
>>       /* set the default value of north bridge registers */
>>
>>       s->regs[BONITO_BONPONCFG] = 0xc40;
>> -    s->regs[BONITO_BONGENCFG] = 0x1384;
>> +    val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
>> +    val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
>> +    val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
>> +    val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
>> +    val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
>> +    s->regs[BONITO_BONGENCFG] = val;
>> +
>>       s->regs[BONITO_IODEVCFG] = 0x2bff8010;
>>       s->regs[BONITO_SDCFG] = 0x255e0091;
>>
>> --
>> 2.21.3
>>
> 


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled
  2020-05-11  6:12   ` Aleksandar Markovic
@ 2020-05-11  6:33     ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-11  6:33 UTC (permalink / raw)
  To: Aleksandar Markovic
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

On 5/11/20 8:12 AM, Aleksandar Markovic wrote:
> нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
> написао/ла:
>>
>> Better describe the Bonito64 MEM HI/LO and I/O PCI ranges,
>> add more PCI regions as unimplemented.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>   hw/pci-host/bonito.c | 30 ++++++++++++++++++++++++++----
>>   1 file changed, 26 insertions(+), 4 deletions(-)
>>
>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>> index 9761780f44..90a6c52a38 100644
>> --- a/hw/pci-host/bonito.c
>> +++ b/hw/pci-host/bonito.c
>> @@ -39,6 +39,7 @@
>>    */
>>
>>   #include "qemu/osdep.h"
>> +#include "qemu/units.h"
>>   #include "qemu/error-report.h"
>>   #include "hw/pci/pci.h"
>>   #include "hw/irq.h"
>> @@ -82,7 +83,7 @@
>>   #define BONITO_PCILO1_BASE      0x14000000
>>   #define BONITO_PCILO2_BASE      0x18000000
>>   #define BONITO_PCIHI_BASE       0x20000000
>> -#define BONITO_PCIHI_SIZE       0x20000000
>> +#define BONITO_PCIHI_SIZE       0x60000000
>>   #define BONITO_PCIHI_TOP        (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
>>   #define BONITO_PCIIO_BASE       0x1fd00000
>>   #define BONITO_PCIIO_BASE_VA    0xbfd00000
>> @@ -606,13 +607,25 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
>>       PCIHostState *phb = PCI_HOST_BRIDGE(dev);
>>       BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
>>
>> -    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);
>> +    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
>>       phb->bus = pci_register_root_bus(DEVICE(dev), "pci",
>>                                        pci_bonito_set_irq, pci_bonito_map_irq,
>>                                        dev, &bs->pci_mem, get_system_io(),
>>                                        0x28, 32, TYPE_PCI_BUS);
>> -    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
>> -                                &bs->pci_mem);
>> +
>> +    MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
>> +    for (size_t i = 0; i < 3; i++) {
>> +        char *name = g_strdup_printf("pci.lomem%zu", i);
>> +
>> +        memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
>> +                                 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
>> +        memory_region_add_subregion(get_system_memory(),
>> +                                    BONITO_PCILO_BASE + i * 64 * MiB,
>> +                                    &pcimem_lo_alias[i]);
>> +        g_free(name);
>> +    }
>> +
>> +    create_unimplemented_device("pci.io", 0x1fd00000, 1 * MiB);
> 
> Hi, Philippe.
> 
> I am delighted with the whole series, finally cleaning Bonito code feels good.
> 
> I just want to ask you if it possible to get rid of constants like
> 0x1fd00000 (generally in this code, not limited to this patch), and
> give the some nice "#define" names?

Yes sure. These patches are almost 1year old, gathering the result of a 
debugging session. Also ...

> 
> Yours,
> Aleksandar
> 
>>   }
>>
>>   static void bonito_realize(PCIDevice *dev, Error **errp)
>> @@ -620,6 +633,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>>       PCIBonitoState *s = PCI_BONITO(dev);
>>       SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
>>       PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
>> +    BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
>>
>>       /*
>>        * Bonito North Bridge, built on FPGA,
>> @@ -652,6 +666,7 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>>       sysbus_init_mmio(sysbus, &s->iomem_ldma);
>>       sysbus_mmio_map(sysbus, 3, 0x1fe00200);
>>
>> +    /* PCI copier */
>>       memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
>>                             "cop", 0x100);
>>       sysbus_init_mmio(sysbus, &s->iomem_cop);
>> @@ -669,6 +684,13 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
>>       sysbus_init_mmio(sysbus, &s->bonito_localio);
>>       sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
>>
>> +    MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);

... I'll declare the variable during function prologue ;)

>> +    memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
>> +                             &bs->pci_mem, 0, BONITO_PCIHI_SIZE);
>> +    memory_region_add_subregion(get_system_memory(),
>> +                                0x20000000ul, pcimem_alias);
>> +    create_unimplemented_device("PCI_2", 0x80000000ul, 2 * GiB); /* pci_hi */

... And add definitions for these addresses.

Thanks for the other reviews in this series!

>> +
>>       /* set the default value of north bridge pci config */
>>       pci_set_word(dev->config + PCI_COMMAND, 0x0000);
>>       pci_set_word(dev->config + PCI_STATUS, 0x0000);
>> --
>> 2.21.3
>>
> 


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-11  6:21     ` Aleksandar Markovic
@ 2020-05-11  6:38       ` Philippe Mathieu-Daudé
  2020-05-11  7:00         ` chen huacai
  0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-11  6:38 UTC (permalink / raw)
  To: Aleksandar Markovic, chen huacai
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

On 5/11/20 8:21 AM, Aleksandar Markovic wrote:
> пон, 11. мај 2020. у 03:11 chen huacai <zltjiangshi@gmail.com> је написао/ла:
>>
>> Hi, Philippe,
>>
>> On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>>
>>> We always miswrote the Fuloong machine... Fix its name.
>>> Add an machine alias to the previous name for backward
>>> compatibility.
>>>
>>> Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>>   docs/system/target-mips.rst              |  2 +-
>>>   default-configs/mips64el-softmmu.mak     |  2 +-
>>>   hw/isa/vt82c686.c                        |  2 +-
>>>   hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
>> Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
>> also have a "mips_" prefix.
>>
> 
> I would leave mips_ prefix for Fuloong, and actually add it to Boston
> source file, so that we are finally consistent across all MIPS
> machines.
> 
> What do you think?

These names were used years ago when all hardware was in the same hw/ 
directory, not sorted per target. Now new machines don't use the target 
as prefix name. I'd clean the other way around, and dropping the 'mips_' 
prefix. The positive side is we can 5 more characters to better describe 
a patch while limited by the 72 chars in the subject :)

> 
> Aleksandar
> 
>> Huacai
>>>   hw/pci-host/bonito.c                     |  8 ++---
>>>   tests/qtest/endianness-test.c            |  2 +-
>>>   MAINTAINERS                              |  4 +--
>>>   hw/mips/Kconfig                          |  2 +-
>>>   hw/mips/Makefile.objs                    |  2 +-
>>>   9 files changed, 36 insertions(+), 34 deletions(-)
>>>   rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
>>>
>>> diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
>>> index 2736fd0509..cd2a931edf 100644
>>> --- a/docs/system/target-mips.rst
>>> +++ b/docs/system/target-mips.rst
>>> @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
>>>
>>>   -  G364 framebuffer
>>>
>>> -The Fulong 2E emulation supports:
>>> +The Fuloong 2E emulation supports:
>>>
>>>   -  Loongson 2E CPU
>>>
>>> diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
>>> index 8b0c9b1e15..9f8a3ef156 100644
>>> --- a/default-configs/mips64el-softmmu.mak
>>> +++ b/default-configs/mips64el-softmmu.mak
>>> @@ -2,7 +2,7 @@
>>>
>>>   include mips-softmmu-common.mak
>>>   CONFIG_IDE_VIA=y
>>> -CONFIG_FULONG=y
>>> +CONFIG_FULOONG=y
>>>   CONFIG_ATI_VGA=y
>>>   CONFIG_RTL8139_PCI=y
>>>   CONFIG_JAZZ=y
>>> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
>>> index d9b51fce8d..fac4e56b7d 100644
>>> --- a/hw/isa/vt82c686.c
>>> +++ b/hw/isa/vt82c686.c
>>> @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
>>>       dc->vmsd = &vmstate_via;
>>>       /*
>>>        * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
>>> -     * e.g. by mips_fulong2e_init()
>>> +     * e.g. by mips_fuloong2e_init()
>>>        */
>>>       dc->user_creatable = false;
>>>   }
>>> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
>>> similarity index 91%
>>> rename from hw/mips/mips_fulong2e.c
>>> rename to hw/mips/fuloong2e.c
>>> index 4e1a3646af..624c46a4fd 100644
>>> --- a/hw/mips/mips_fulong2e.c
>>> +++ b/hw/mips/fuloong2e.c
>>> @@ -1,5 +1,5 @@
>>>   /*
>>> - * QEMU fulong 2e mini pc support
>>> + * QEMU fuloong 2e mini pc support
>>>    *
>>>    * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
>>>    * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
>>> @@ -11,8 +11,8 @@
>>>    */
>>>
>>>   /*
>>> - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
>>> - * http://www.linux-mips.org/wiki/Fulong
>>> + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
>>> + * https://www.linux-mips.org/wiki/Fuloong_2E
>>>    *
>>>    * Loongson 2e user manual:
>>>    * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
>>> @@ -46,13 +46,13 @@
>>>   #include "sysemu/reset.h"
>>>   #include "qemu/error-report.h"
>>>
>>> -#define DEBUG_FULONG2E_INIT
>>> +#define DEBUG_FULOONG2E_INIT
>>>
>>>   #define ENVP_ADDR               0x80002000l
>>>   #define ENVP_NB_ENTRIES         16
>>>   #define ENVP_ENTRY_SIZE         256
>>>
>>> -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
>>> +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
>>>   #define BIOS_SIZE               (512 * KiB)
>>>   #define MAX_IDE_BUS             2
>>>
>>> @@ -69,12 +69,12 @@
>>>    * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
>>>    * in the "Compile Guide".
>>>    */
>>> -#define FULONG_BIOSNAME "pmon_2e.bin"
>>> +#define FULOONG_BIOSNAME "pmon_2e.bin"
>>>
>>> -/* PCI SLOT in fulong 2e */
>>> -#define FULONG2E_VIA_SLOT        5
>>> -#define FULONG2E_ATI_SLOT        6
>>> -#define FULONG2E_RTL8139_SLOT    7
>>> +/* PCI SLOT in Fuloong 2e */
>>> +#define FULOONG2E_VIA_SLOT        5
>>> +#define FULOONG2E_ATI_SLOT        6
>>> +#define FULOONG2E_RTL8139_SLOT    7
>>>
>>>   static struct _loaderparams {
>>>       int ram_size;
>>> @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
>>>           const char *default_devaddr = NULL;
>>>
>>>           if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
>>> -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
>>> +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
>>>               default_devaddr = "07";
>>>           }
>>>
>>> @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
>>>       }
>>>   }
>>>
>>> -static void mips_fulong2e_init(MachineState *machine)
>>> +static void mips_fuloong2e_init(MachineState *machine)
>>>   {
>>>       const char *kernel_filename = machine->kernel_filename;
>>>       const char *kernel_cmdline = machine->kernel_cmdline;
>>> @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
>>>           error_report("Invalid RAM size, should be 256MB");
>>>           exit(EXIT_FAILURE);
>>>       }
>>> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>>>
>>> -    /* Boot ROM */
>>> -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
>>> +    /* allocate RAM */
>>> +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
>>>                              &error_fatal);
>>> +
>>> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>>>       memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
>>>
>>>       /*
>>> @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
>>>           write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
>>>       } else {
>>>           if (bios_name == NULL) {
>>> -                bios_name = FULONG_BIOSNAME;
>>> +                bios_name = FULOONG_BIOSNAME;
>>>           }
>>>           filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
>>>           if (filename) {
>>> @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
>>>       pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
>>>
>>>       /* South bridge -> IP5 */
>>> -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
>>> +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
>>>                                  &smbus, &isa_bus);
>>>
>>>       /* GPU */
>>> @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
>>>       network_init(pci_bus);
>>>   }
>>>
>>> -static void mips_fulong2e_machine_init(MachineClass *mc)
>>> +static void mips_fuloong2e_machine_init(MachineClass *mc)
>>>   {
>>> -    mc->desc = "Fulong 2e mini pc";
>>> -    mc->init = mips_fulong2e_init;
>>> +    mc->desc = "Fuloong 2e mini pc";
>>> +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
>>> +    mc->init = mips_fuloong2e_init;
>>>       mc->block_default_type = IF_IDE;
>>>       mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
>>>       mc->default_ram_size = 256 * MiB;
>>> -    mc->default_ram_id = "fulong2e.ram";
>>> +    mc->default_ram_id = "fuloong2e.ram";
>>>   }
>>>
>>> -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
>>> +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
>>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>>> index cc6545c8a8..b9bfe3c417 100644
>>> --- a/hw/pci-host/bonito.c
>>> +++ b/hw/pci-host/bonito.c
>>> @@ -11,7 +11,7 @@
>>>    */
>>>
>>>   /*
>>> - * fulong 2e mini pc has a bonito north bridge.
>>> + * fuloong 2e mini pc has a bonito north bridge.
>>>    */
>>>
>>>   /*
>>> @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>>>       slot = (pci_dev->devfn >> 3);
>>>
>>>       switch (slot) {
>>> -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
>>> +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
>>>           return irq_num % 4 + BONITO_IRQ_BASE;
>>> -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
>>> +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
>>>           return 4 + BONITO_IRQ_BASE;
>>> -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
>>> +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
>>>           return 5 + BONITO_IRQ_BASE;
>>>       case 8 ... 12: /* PCI slot 1 to 4 */
>>>           return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
>>> diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
>>> index 2798802c63..cc088ac01a 100644
>>> --- a/tests/qtest/endianness-test.c
>>> +++ b/tests/qtest/endianness-test.c
>>> @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
>>>       { "mips64", "pica61", 0x90000000, .bswap = true },
>>>       { "mips64", "mips", 0x14000000, .bswap = true },
>>>       { "mips64", "malta", 0x10000000, .bswap = true },
>>> -    { "mips64el", "fulong2e", 0x1fd00000 },
>>> +    { "mips64el", "fuloong2e", 0x1fd00000 },
>>>       { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
>>>       { "ppc", "40p", 0x80000000, .bswap = true },
>>>       { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index aa5c54c75a..50f6a5f1bb 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
>>>   S: Obsolete
>>>   F: hw/mips/mips_r4k.c
>>>
>>> -Fulong 2E
>>> +Fuloong 2E
>>>   M: Huacai Chen <chenhc@lemote.com>
>>>   M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>>   M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
>>>   R: Jiaxun Yang <jiaxun.yang@flygoat.com>
>>>   S: Odd Fixes
>>> -F: hw/mips/mips_fulong2e.c
>>> +F: hw/mips/fuloong2e.c
>>>   F: hw/isa/vt82c686.c
>>>   F: hw/pci-host/bonito.c
>>>   F: include/hw/isa/vt82c686.h
>>> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
>>> index 2c2adbc42a..cd38546689 100644
>>> --- a/hw/mips/Kconfig
>>> +++ b/hw/mips/Kconfig
>>> @@ -41,7 +41,7 @@ config JAZZ
>>>       select DS1225Y
>>>       select JAZZ_LED
>>>
>>> -config FULONG
>>> +config FULOONG
>>>       bool
>>>
>>>   config MIPS_CPS
>>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
>>> index 525809af07..8ab41edc3f 100644
>>> --- a/hw/mips/Makefile.objs
>>> +++ b/hw/mips/Makefile.objs
>>> @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
>>>   obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
>>>   obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
>>>   obj-$(CONFIG_JAZZ) += mips_jazz.o
>>> -obj-$(CONFIG_FULONG) += mips_fulong2e.o
>>> +obj-$(CONFIG_FULOONG) += fuloong2e.o
>>>   obj-$(CONFIG_MIPS_CPS) += cps.o
>>>   obj-$(CONFIG_MIPS_BOSTON) += boston.o
>>> --
>>> 2.21.3
>>>
>>>
>>
>>
>> --
>> Huacai Chen
> 


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-11  6:38       ` Philippe Mathieu-Daudé
@ 2020-05-11  7:00         ` chen huacai
  2020-05-11  8:12           ` Aleksandar Markovic
  0 siblings, 1 reply; 36+ messages in thread
From: chen huacai @ 2020-05-11  7:00 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Aleksandar Markovic,
	Huacai Chen, Paolo Bonzini, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

Hi, Philippe and Alexandar,

On Mon, May 11, 2020 at 2:38 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 5/11/20 8:21 AM, Aleksandar Markovic wrote:
> > пон, 11. мај 2020. у 03:11 chen huacai <zltjiangshi@gmail.com> је написао/ла:
> >>
> >> Hi, Philippe,
> >>
> >> On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >>>
> >>> We always miswrote the Fuloong machine... Fix its name.
> >>> Add an machine alias to the previous name for backward
> >>> compatibility.
> >>>
> >>> Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> >>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >>> ---
> >>>   docs/system/target-mips.rst              |  2 +-
> >>>   default-configs/mips64el-softmmu.mak     |  2 +-
> >>>   hw/isa/vt82c686.c                        |  2 +-
> >>>   hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
> >> Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
> >> also have a "mips_" prefix.
> >>
> >
> > I would leave mips_ prefix for Fuloong, and actually add it to Boston
> > source file, so that we are finally consistent across all MIPS
> > machines.
> >
> > What do you think?
>
> These names were used years ago when all hardware was in the same hw/
> directory, not sorted per target. Now new machines don't use the target
> as prefix name. I'd clean the other way around, and dropping the 'mips_'
> prefix. The positive side is we can 5 more characters to better describe
> a patch while limited by the 72 chars in the subject :)

All having the prefix, or all dropping the prefix, are both good for
me, just keep consistency.

Huacai

>
> >
> > Aleksandar
> >
> >> Huacai
> >>>   hw/pci-host/bonito.c                     |  8 ++---
> >>>   tests/qtest/endianness-test.c            |  2 +-
> >>>   MAINTAINERS                              |  4 +--
> >>>   hw/mips/Kconfig                          |  2 +-
> >>>   hw/mips/Makefile.objs                    |  2 +-
> >>>   9 files changed, 36 insertions(+), 34 deletions(-)
> >>>   rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
> >>>
> >>> diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
> >>> index 2736fd0509..cd2a931edf 100644
> >>> --- a/docs/system/target-mips.rst
> >>> +++ b/docs/system/target-mips.rst
> >>> @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
> >>>
> >>>   -  G364 framebuffer
> >>>
> >>> -The Fulong 2E emulation supports:
> >>> +The Fuloong 2E emulation supports:
> >>>
> >>>   -  Loongson 2E CPU
> >>>
> >>> diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
> >>> index 8b0c9b1e15..9f8a3ef156 100644
> >>> --- a/default-configs/mips64el-softmmu.mak
> >>> +++ b/default-configs/mips64el-softmmu.mak
> >>> @@ -2,7 +2,7 @@
> >>>
> >>>   include mips-softmmu-common.mak
> >>>   CONFIG_IDE_VIA=y
> >>> -CONFIG_FULONG=y
> >>> +CONFIG_FULOONG=y
> >>>   CONFIG_ATI_VGA=y
> >>>   CONFIG_RTL8139_PCI=y
> >>>   CONFIG_JAZZ=y
> >>> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> >>> index d9b51fce8d..fac4e56b7d 100644
> >>> --- a/hw/isa/vt82c686.c
> >>> +++ b/hw/isa/vt82c686.c
> >>> @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
> >>>       dc->vmsd = &vmstate_via;
> >>>       /*
> >>>        * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
> >>> -     * e.g. by mips_fulong2e_init()
> >>> +     * e.g. by mips_fuloong2e_init()
> >>>        */
> >>>       dc->user_creatable = false;
> >>>   }
> >>> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
> >>> similarity index 91%
> >>> rename from hw/mips/mips_fulong2e.c
> >>> rename to hw/mips/fuloong2e.c
> >>> index 4e1a3646af..624c46a4fd 100644
> >>> --- a/hw/mips/mips_fulong2e.c
> >>> +++ b/hw/mips/fuloong2e.c
> >>> @@ -1,5 +1,5 @@
> >>>   /*
> >>> - * QEMU fulong 2e mini pc support
> >>> + * QEMU fuloong 2e mini pc support
> >>>    *
> >>>    * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
> >>>    * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
> >>> @@ -11,8 +11,8 @@
> >>>    */
> >>>
> >>>   /*
> >>> - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> >>> - * http://www.linux-mips.org/wiki/Fulong
> >>> + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> >>> + * https://www.linux-mips.org/wiki/Fuloong_2E
> >>>    *
> >>>    * Loongson 2e user manual:
> >>>    * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
> >>> @@ -46,13 +46,13 @@
> >>>   #include "sysemu/reset.h"
> >>>   #include "qemu/error-report.h"
> >>>
> >>> -#define DEBUG_FULONG2E_INIT
> >>> +#define DEBUG_FULOONG2E_INIT
> >>>
> >>>   #define ENVP_ADDR               0x80002000l
> >>>   #define ENVP_NB_ENTRIES         16
> >>>   #define ENVP_ENTRY_SIZE         256
> >>>
> >>> -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
> >>> +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
> >>>   #define BIOS_SIZE               (512 * KiB)
> >>>   #define MAX_IDE_BUS             2
> >>>
> >>> @@ -69,12 +69,12 @@
> >>>    * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
> >>>    * in the "Compile Guide".
> >>>    */
> >>> -#define FULONG_BIOSNAME "pmon_2e.bin"
> >>> +#define FULOONG_BIOSNAME "pmon_2e.bin"
> >>>
> >>> -/* PCI SLOT in fulong 2e */
> >>> -#define FULONG2E_VIA_SLOT        5
> >>> -#define FULONG2E_ATI_SLOT        6
> >>> -#define FULONG2E_RTL8139_SLOT    7
> >>> +/* PCI SLOT in Fuloong 2e */
> >>> +#define FULOONG2E_VIA_SLOT        5
> >>> +#define FULOONG2E_ATI_SLOT        6
> >>> +#define FULOONG2E_RTL8139_SLOT    7
> >>>
> >>>   static struct _loaderparams {
> >>>       int ram_size;
> >>> @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
> >>>           const char *default_devaddr = NULL;
> >>>
> >>>           if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
> >>> -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
> >>> +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
> >>>               default_devaddr = "07";
> >>>           }
> >>>
> >>> @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
> >>>       }
> >>>   }
> >>>
> >>> -static void mips_fulong2e_init(MachineState *machine)
> >>> +static void mips_fuloong2e_init(MachineState *machine)
> >>>   {
> >>>       const char *kernel_filename = machine->kernel_filename;
> >>>       const char *kernel_cmdline = machine->kernel_cmdline;
> >>> @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
> >>>           error_report("Invalid RAM size, should be 256MB");
> >>>           exit(EXIT_FAILURE);
> >>>       }
> >>> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> >>>
> >>> -    /* Boot ROM */
> >>> -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
> >>> +    /* allocate RAM */
> >>> +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
> >>>                              &error_fatal);
> >>> +
> >>> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> >>>       memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
> >>>
> >>>       /*
> >>> @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
> >>>           write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
> >>>       } else {
> >>>           if (bios_name == NULL) {
> >>> -                bios_name = FULONG_BIOSNAME;
> >>> +                bios_name = FULOONG_BIOSNAME;
> >>>           }
> >>>           filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> >>>           if (filename) {
> >>> @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
> >>>       pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
> >>>
> >>>       /* South bridge -> IP5 */
> >>> -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
> >>> +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
> >>>                                  &smbus, &isa_bus);
> >>>
> >>>       /* GPU */
> >>> @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
> >>>       network_init(pci_bus);
> >>>   }
> >>>
> >>> -static void mips_fulong2e_machine_init(MachineClass *mc)
> >>> +static void mips_fuloong2e_machine_init(MachineClass *mc)
> >>>   {
> >>> -    mc->desc = "Fulong 2e mini pc";
> >>> -    mc->init = mips_fulong2e_init;
> >>> +    mc->desc = "Fuloong 2e mini pc";
> >>> +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
> >>> +    mc->init = mips_fuloong2e_init;
> >>>       mc->block_default_type = IF_IDE;
> >>>       mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
> >>>       mc->default_ram_size = 256 * MiB;
> >>> -    mc->default_ram_id = "fulong2e.ram";
> >>> +    mc->default_ram_id = "fuloong2e.ram";
> >>>   }
> >>>
> >>> -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
> >>> +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
> >>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> >>> index cc6545c8a8..b9bfe3c417 100644
> >>> --- a/hw/pci-host/bonito.c
> >>> +++ b/hw/pci-host/bonito.c
> >>> @@ -11,7 +11,7 @@
> >>>    */
> >>>
> >>>   /*
> >>> - * fulong 2e mini pc has a bonito north bridge.
> >>> + * fuloong 2e mini pc has a bonito north bridge.
> >>>    */
> >>>
> >>>   /*
> >>> @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> >>>       slot = (pci_dev->devfn >> 3);
> >>>
> >>>       switch (slot) {
> >>> -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> >>> +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> >>>           return irq_num % 4 + BONITO_IRQ_BASE;
> >>> -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
> >>> +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
> >>>           return 4 + BONITO_IRQ_BASE;
> >>> -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
> >>> +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
> >>>           return 5 + BONITO_IRQ_BASE;
> >>>       case 8 ... 12: /* PCI slot 1 to 4 */
> >>>           return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> >>> diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
> >>> index 2798802c63..cc088ac01a 100644
> >>> --- a/tests/qtest/endianness-test.c
> >>> +++ b/tests/qtest/endianness-test.c
> >>> @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
> >>>       { "mips64", "pica61", 0x90000000, .bswap = true },
> >>>       { "mips64", "mips", 0x14000000, .bswap = true },
> >>>       { "mips64", "malta", 0x10000000, .bswap = true },
> >>> -    { "mips64el", "fulong2e", 0x1fd00000 },
> >>> +    { "mips64el", "fuloong2e", 0x1fd00000 },
> >>>       { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
> >>>       { "ppc", "40p", 0x80000000, .bswap = true },
> >>>       { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
> >>> diff --git a/MAINTAINERS b/MAINTAINERS
> >>> index aa5c54c75a..50f6a5f1bb 100644
> >>> --- a/MAINTAINERS
> >>> +++ b/MAINTAINERS
> >>> @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> >>>   S: Obsolete
> >>>   F: hw/mips/mips_r4k.c
> >>>
> >>> -Fulong 2E
> >>> +Fuloong 2E
> >>>   M: Huacai Chen <chenhc@lemote.com>
> >>>   M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >>>   M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> >>>   R: Jiaxun Yang <jiaxun.yang@flygoat.com>
> >>>   S: Odd Fixes
> >>> -F: hw/mips/mips_fulong2e.c
> >>> +F: hw/mips/fuloong2e.c
> >>>   F: hw/isa/vt82c686.c
> >>>   F: hw/pci-host/bonito.c
> >>>   F: include/hw/isa/vt82c686.h
> >>> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
> >>> index 2c2adbc42a..cd38546689 100644
> >>> --- a/hw/mips/Kconfig
> >>> +++ b/hw/mips/Kconfig
> >>> @@ -41,7 +41,7 @@ config JAZZ
> >>>       select DS1225Y
> >>>       select JAZZ_LED
> >>>
> >>> -config FULONG
> >>> +config FULOONG
> >>>       bool
> >>>
> >>>   config MIPS_CPS
> >>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
> >>> index 525809af07..8ab41edc3f 100644
> >>> --- a/hw/mips/Makefile.objs
> >>> +++ b/hw/mips/Makefile.objs
> >>> @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
> >>>   obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
> >>>   obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
> >>>   obj-$(CONFIG_JAZZ) += mips_jazz.o
> >>> -obj-$(CONFIG_FULONG) += mips_fulong2e.o
> >>> +obj-$(CONFIG_FULOONG) += fuloong2e.o
> >>>   obj-$(CONFIG_MIPS_CPS) += cps.o
> >>>   obj-$(CONFIG_MIPS_BOSTON) += boston.o
> >>> --
> >>> 2.21.3
> >>>
> >>>
> >>
> >>
> >> --
> >> Huacai Chen
> >



-- 
Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
  2020-05-11  6:30     ` Philippe Mathieu-Daudé
@ 2020-05-11  7:16       ` Aleksandar Markovic
  0 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  7:16 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

пон, 11. мај 2020. у 08:30 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> On 5/11/20 8:17 AM, Aleksandar Markovic wrote:
> > нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
> > написао/ла:
> >>
> >> Describe some Config registers fields with the registerfields
> >> API. Use the FIELD_DP32() macro to set the BONGENCFG register
> >> bits at reset.
> >>
> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >> ---
> >>   hw/pci-host/bonito.c | 21 ++++++++++++++++++++-
> >>   1 file changed, 20 insertions(+), 1 deletion(-)
> >>
> >
> > Some Config registers? Is there any reason not to cover all Bonito
> > config registers? Or, the commit message was inprecise?
>
> The commit message is not correct English, I wanted to say "some bits of
> the Config register" (I don't want to overload the file defining bits
> we'll never use).
>
> >
> > But, in general, I salute the intent of this patch.
>
> Thanks! I'll reword the description.
>

OK, then, with that little rewording, certainly, a good patch:

Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

> >
> > Sincerely,
> > Aleksandar
> >
> >> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> >> index 335c7787eb..86aceb333a 100644
> >> --- a/hw/pci-host/bonito.c
> >> +++ b/hw/pci-host/bonito.c
> >> @@ -50,6 +50,7 @@
> >>   #include "sysemu/runstate.h"
> >>   #include "exec/address-spaces.h"
> >>   #include "hw/misc/unimp.h"
> >> +#include "hw/registerfields.h"
> >>
> >>   /* #define DEBUG_BONITO */
> >>
> >> @@ -112,8 +113,19 @@
> >>   /* Power on register */
> >>
> >>   #define BONITO_BONPONCFG        (0x00 >> 2)      /* 0x100 */
> >> +
> >> +/* PCI configuration register */
> >>   #define BONITO_BONGENCFG_OFFSET 0x4
> >>   #define BONITO_BONGENCFG        (BONITO_BONGENCFG_OFFSET >> 2)   /*0x104 */
> >> +REG32(BONGENCFG,        0x104)
> >> +FIELD(BONGENCFG, DEBUGMODE,      0, 1)
> >> +FIELD(BONGENCFG, SNOOP,          1, 1)
> >> +FIELD(BONGENCFG, CPUSELFRESET,   2, 1)
> >> +FIELD(BONGENCFG, BYTESWAP,       6, 1)
> >> +FIELD(BONGENCFG, UNCACHED,       7, 1)
> >> +FIELD(BONGENCFG, PREFETCH,       8, 1)
> >> +FIELD(BONGENCFG, WRITEBEHIND,    9, 1)
> >> +FIELD(BONGENCFG, PCIQUEUE,      12, 1)
> >>
> >>   /* 2. IO & IDE configuration */
> >>   #define BONITO_IODEVCFG         (0x08 >> 2)      /* 0x108 */
> >> @@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> >>   static void bonito_reset(void *opaque)
> >>   {
> >>       PCIBonitoState *s = opaque;
> >> +    uint32_t val = 0;
> >>
> >>       /* set the default value of north bridge registers */
> >>
> >>       s->regs[BONITO_BONPONCFG] = 0xc40;
> >> -    s->regs[BONITO_BONGENCFG] = 0x1384;
> >> +    val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
> >> +    val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
> >> +    val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
> >> +    val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
> >> +    val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
> >> +    s->regs[BONITO_BONGENCFG] = val;
> >> +
> >>       s->regs[BONITO_IODEVCFG] = 0x2bff8010;
> >>       s->regs[BONITO_SDCFG] = 0x255e0091;
> >>
> >> --
> >> 2.21.3
> >>
> >


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-11  7:00         ` chen huacai
@ 2020-05-11  8:12           ` Aleksandar Markovic
  2020-05-11  8:27             ` Aleksandar Markovic
  0 siblings, 1 reply; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  8:12 UTC (permalink / raw)
  To: chen huacai
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, qemu-level, Aleksandar Markovic, Huacai Chen,
	Paolo Bonzini, Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

пон, 11. мај 2020. у 08:52 chen huacai <zltjiangshi@gmail.com> је написао/ла:
>
> Hi, Philippe and Alexandar,
>
> On Mon, May 11, 2020 at 2:38 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >
> > On 5/11/20 8:21 AM, Aleksandar Markovic wrote:
> > > пон, 11. мај 2020. у 03:11 chen huacai <zltjiangshi@gmail.com> је написао/ла:
> > >>
> > >> Hi, Philippe,
> > >>
> > >> On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > >>>
> > >>> We always miswrote the Fuloong machine... Fix its name.
> > >>> Add an machine alias to the previous name for backward
> > >>> compatibility.
> > >>>
> > >>> Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> > >>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > >>> ---
> > >>>   docs/system/target-mips.rst              |  2 +-
> > >>>   default-configs/mips64el-softmmu.mak     |  2 +-
> > >>>   hw/isa/vt82c686.c                        |  2 +-
> > >>>   hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
> > >> Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
> > >> also have a "mips_" prefix.
> > >>
> > >
> > > I would leave mips_ prefix for Fuloong, and actually add it to Boston
> > > source file, so that we are finally consistent across all MIPS
> > > machines.
> > >
> > > What do you think?
> >
> > These names were used years ago when all hardware was in the same hw/
> > directory, not sorted per target. Now new machines don't use the target
> > as prefix name. I'd clean the other way around, and dropping the 'mips_'
> > prefix. The positive side is we can 5 more characters to better describe
> > a patch while limited by the 72 chars in the subject :)
>
> All having the prefix, or all dropping the prefix, are both good for
> me, just keep consistency.
>
> Huacai
>

Philippe, Huacai,

Prefix or not, I have mixed feelings. I had consistency more in mind
than prefix.

So it seems the prevailing opinion is slightly on the side of dropping
prefix "mips_".

Philippe, if it is not too difficult, could you perhaps make dropping
that prefix for all source file names in hw/mips a part of the this
series (not to complicate situation with a separate series) in its
follow-up version (but perhaps keep that change(s) in separate
patch(es))?

Sincerely,
Aleksandar

> >
> > >
> > > Aleksandar
> > >
> > >> Huacai
> > >>>   hw/pci-host/bonito.c                     |  8 ++---
> > >>>   tests/qtest/endianness-test.c            |  2 +-
> > >>>   MAINTAINERS                              |  4 +--
> > >>>   hw/mips/Kconfig                          |  2 +-
> > >>>   hw/mips/Makefile.objs                    |  2 +-
> > >>>   9 files changed, 36 insertions(+), 34 deletions(-)
> > >>>   rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
> > >>>
> > >>> diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
> > >>> index 2736fd0509..cd2a931edf 100644
> > >>> --- a/docs/system/target-mips.rst
> > >>> +++ b/docs/system/target-mips.rst
> > >>> @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
> > >>>
> > >>>   -  G364 framebuffer
> > >>>
> > >>> -The Fulong 2E emulation supports:
> > >>> +The Fuloong 2E emulation supports:
> > >>>
> > >>>   -  Loongson 2E CPU
> > >>>
> > >>> diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
> > >>> index 8b0c9b1e15..9f8a3ef156 100644
> > >>> --- a/default-configs/mips64el-softmmu.mak
> > >>> +++ b/default-configs/mips64el-softmmu.mak
> > >>> @@ -2,7 +2,7 @@
> > >>>
> > >>>   include mips-softmmu-common.mak
> > >>>   CONFIG_IDE_VIA=y
> > >>> -CONFIG_FULONG=y
> > >>> +CONFIG_FULOONG=y
> > >>>   CONFIG_ATI_VGA=y
> > >>>   CONFIG_RTL8139_PCI=y
> > >>>   CONFIG_JAZZ=y
> > >>> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> > >>> index d9b51fce8d..fac4e56b7d 100644
> > >>> --- a/hw/isa/vt82c686.c
> > >>> +++ b/hw/isa/vt82c686.c
> > >>> @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
> > >>>       dc->vmsd = &vmstate_via;
> > >>>       /*
> > >>>        * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
> > >>> -     * e.g. by mips_fulong2e_init()
> > >>> +     * e.g. by mips_fuloong2e_init()
> > >>>        */
> > >>>       dc->user_creatable = false;
> > >>>   }
> > >>> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
> > >>> similarity index 91%
> > >>> rename from hw/mips/mips_fulong2e.c
> > >>> rename to hw/mips/fuloong2e.c
> > >>> index 4e1a3646af..624c46a4fd 100644
> > >>> --- a/hw/mips/mips_fulong2e.c
> > >>> +++ b/hw/mips/fuloong2e.c
> > >>> @@ -1,5 +1,5 @@
> > >>>   /*
> > >>> - * QEMU fulong 2e mini pc support
> > >>> + * QEMU fuloong 2e mini pc support
> > >>>    *
> > >>>    * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
> > >>>    * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
> > >>> @@ -11,8 +11,8 @@
> > >>>    */
> > >>>
> > >>>   /*
> > >>> - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> > >>> - * http://www.linux-mips.org/wiki/Fulong
> > >>> + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> > >>> + * https://www.linux-mips.org/wiki/Fuloong_2E
> > >>>    *
> > >>>    * Loongson 2e user manual:
> > >>>    * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
> > >>> @@ -46,13 +46,13 @@
> > >>>   #include "sysemu/reset.h"
> > >>>   #include "qemu/error-report.h"
> > >>>
> > >>> -#define DEBUG_FULONG2E_INIT
> > >>> +#define DEBUG_FULOONG2E_INIT
> > >>>
> > >>>   #define ENVP_ADDR               0x80002000l
> > >>>   #define ENVP_NB_ENTRIES         16
> > >>>   #define ENVP_ENTRY_SIZE         256
> > >>>
> > >>> -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
> > >>> +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
> > >>>   #define BIOS_SIZE               (512 * KiB)
> > >>>   #define MAX_IDE_BUS             2
> > >>>
> > >>> @@ -69,12 +69,12 @@
> > >>>    * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
> > >>>    * in the "Compile Guide".
> > >>>    */
> > >>> -#define FULONG_BIOSNAME "pmon_2e.bin"
> > >>> +#define FULOONG_BIOSNAME "pmon_2e.bin"
> > >>>
> > >>> -/* PCI SLOT in fulong 2e */
> > >>> -#define FULONG2E_VIA_SLOT        5
> > >>> -#define FULONG2E_ATI_SLOT        6
> > >>> -#define FULONG2E_RTL8139_SLOT    7
> > >>> +/* PCI SLOT in Fuloong 2e */
> > >>> +#define FULOONG2E_VIA_SLOT        5
> > >>> +#define FULOONG2E_ATI_SLOT        6
> > >>> +#define FULOONG2E_RTL8139_SLOT    7
> > >>>
> > >>>   static struct _loaderparams {
> > >>>       int ram_size;
> > >>> @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
> > >>>           const char *default_devaddr = NULL;
> > >>>
> > >>>           if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
> > >>> -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
> > >>> +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
> > >>>               default_devaddr = "07";
> > >>>           }
> > >>>
> > >>> @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
> > >>>       }
> > >>>   }
> > >>>
> > >>> -static void mips_fulong2e_init(MachineState *machine)
> > >>> +static void mips_fuloong2e_init(MachineState *machine)
> > >>>   {
> > >>>       const char *kernel_filename = machine->kernel_filename;
> > >>>       const char *kernel_cmdline = machine->kernel_cmdline;
> > >>> @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
> > >>>           error_report("Invalid RAM size, should be 256MB");
> > >>>           exit(EXIT_FAILURE);
> > >>>       }
> > >>> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> > >>>
> > >>> -    /* Boot ROM */
> > >>> -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
> > >>> +    /* allocate RAM */
> > >>> +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
> > >>>                              &error_fatal);
> > >>> +
> > >>> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> > >>>       memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
> > >>>
> > >>>       /*
> > >>> @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
> > >>>           write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
> > >>>       } else {
> > >>>           if (bios_name == NULL) {
> > >>> -                bios_name = FULONG_BIOSNAME;
> > >>> +                bios_name = FULOONG_BIOSNAME;
> > >>>           }
> > >>>           filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> > >>>           if (filename) {
> > >>> @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
> > >>>       pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
> > >>>
> > >>>       /* South bridge -> IP5 */
> > >>> -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
> > >>> +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
> > >>>                                  &smbus, &isa_bus);
> > >>>
> > >>>       /* GPU */
> > >>> @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
> > >>>       network_init(pci_bus);
> > >>>   }
> > >>>
> > >>> -static void mips_fulong2e_machine_init(MachineClass *mc)
> > >>> +static void mips_fuloong2e_machine_init(MachineClass *mc)
> > >>>   {
> > >>> -    mc->desc = "Fulong 2e mini pc";
> > >>> -    mc->init = mips_fulong2e_init;
> > >>> +    mc->desc = "Fuloong 2e mini pc";
> > >>> +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
> > >>> +    mc->init = mips_fuloong2e_init;
> > >>>       mc->block_default_type = IF_IDE;
> > >>>       mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
> > >>>       mc->default_ram_size = 256 * MiB;
> > >>> -    mc->default_ram_id = "fulong2e.ram";
> > >>> +    mc->default_ram_id = "fuloong2e.ram";
> > >>>   }
> > >>>
> > >>> -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
> > >>> +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
> > >>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> > >>> index cc6545c8a8..b9bfe3c417 100644
> > >>> --- a/hw/pci-host/bonito.c
> > >>> +++ b/hw/pci-host/bonito.c
> > >>> @@ -11,7 +11,7 @@
> > >>>    */
> > >>>
> > >>>   /*
> > >>> - * fulong 2e mini pc has a bonito north bridge.
> > >>> + * fuloong 2e mini pc has a bonito north bridge.
> > >>>    */
> > >>>
> > >>>   /*
> > >>> @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> > >>>       slot = (pci_dev->devfn >> 3);
> > >>>
> > >>>       switch (slot) {
> > >>> -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> > >>> +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> > >>>           return irq_num % 4 + BONITO_IRQ_BASE;
> > >>> -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
> > >>> +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
> > >>>           return 4 + BONITO_IRQ_BASE;
> > >>> -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
> > >>> +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
> > >>>           return 5 + BONITO_IRQ_BASE;
> > >>>       case 8 ... 12: /* PCI slot 1 to 4 */
> > >>>           return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> > >>> diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
> > >>> index 2798802c63..cc088ac01a 100644
> > >>> --- a/tests/qtest/endianness-test.c
> > >>> +++ b/tests/qtest/endianness-test.c
> > >>> @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
> > >>>       { "mips64", "pica61", 0x90000000, .bswap = true },
> > >>>       { "mips64", "mips", 0x14000000, .bswap = true },
> > >>>       { "mips64", "malta", 0x10000000, .bswap = true },
> > >>> -    { "mips64el", "fulong2e", 0x1fd00000 },
> > >>> +    { "mips64el", "fuloong2e", 0x1fd00000 },
> > >>>       { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
> > >>>       { "ppc", "40p", 0x80000000, .bswap = true },
> > >>>       { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
> > >>> diff --git a/MAINTAINERS b/MAINTAINERS
> > >>> index aa5c54c75a..50f6a5f1bb 100644
> > >>> --- a/MAINTAINERS
> > >>> +++ b/MAINTAINERS
> > >>> @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> > >>>   S: Obsolete
> > >>>   F: hw/mips/mips_r4k.c
> > >>>
> > >>> -Fulong 2E
> > >>> +Fuloong 2E
> > >>>   M: Huacai Chen <chenhc@lemote.com>
> > >>>   M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > >>>   M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> > >>>   R: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > >>>   S: Odd Fixes
> > >>> -F: hw/mips/mips_fulong2e.c
> > >>> +F: hw/mips/fuloong2e.c
> > >>>   F: hw/isa/vt82c686.c
> > >>>   F: hw/pci-host/bonito.c
> > >>>   F: include/hw/isa/vt82c686.h
> > >>> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
> > >>> index 2c2adbc42a..cd38546689 100644
> > >>> --- a/hw/mips/Kconfig
> > >>> +++ b/hw/mips/Kconfig
> > >>> @@ -41,7 +41,7 @@ config JAZZ
> > >>>       select DS1225Y
> > >>>       select JAZZ_LED
> > >>>
> > >>> -config FULONG
> > >>> +config FULOONG
> > >>>       bool
> > >>>
> > >>>   config MIPS_CPS
> > >>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
> > >>> index 525809af07..8ab41edc3f 100644
> > >>> --- a/hw/mips/Makefile.objs
> > >>> +++ b/hw/mips/Makefile.objs
> > >>> @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
> > >>>   obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
> > >>>   obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
> > >>>   obj-$(CONFIG_JAZZ) += mips_jazz.o
> > >>> -obj-$(CONFIG_FULONG) += mips_fulong2e.o
> > >>> +obj-$(CONFIG_FULOONG) += fuloong2e.o
> > >>>   obj-$(CONFIG_MIPS_CPS) += cps.o
> > >>>   obj-$(CONFIG_MIPS_BOSTON) += boston.o
> > >>> --
> > >>> 2.21.3
> > >>>
> > >>>
> > >>
> > >>
> > >> --
> > >> Huacai Chen
> > >
>
>
>
> --
> Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-11  8:12           ` Aleksandar Markovic
@ 2020-05-11  8:27             ` Aleksandar Markovic
  2020-05-12  8:09               ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  8:27 UTC (permalink / raw)
  To: chen huacai
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, qemu-level, Aleksandar Markovic, Huacai Chen,
	Paolo Bonzini, Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

пон, 11. мај 2020. у 10:12 Aleksandar Markovic
<aleksandar.qemu.devel@gmail.com> је написао/ла:
>
> пон, 11. мај 2020. у 08:52 chen huacai <zltjiangshi@gmail.com> је написао/ла:
> >
> > Hi, Philippe and Alexandar,
> >
> > On Mon, May 11, 2020 at 2:38 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > >
> > > On 5/11/20 8:21 AM, Aleksandar Markovic wrote:
> > > > пон, 11. мај 2020. у 03:11 chen huacai <zltjiangshi@gmail.com> је написао/ла:
> > > >>
> > > >> Hi, Philippe,
> > > >>
> > > >> On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > > >>>
> > > >>> We always miswrote the Fuloong machine... Fix its name.
> > > >>> Add an machine alias to the previous name for backward
> > > >>> compatibility.
> > > >>>
> > > >>> Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> > > >>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > > >>> ---
> > > >>>   docs/system/target-mips.rst              |  2 +-
> > > >>>   default-configs/mips64el-softmmu.mak     |  2 +-
> > > >>>   hw/isa/vt82c686.c                        |  2 +-
> > > >>>   hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
> > > >> Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
> > > >> also have a "mips_" prefix.
> > > >>
> > > >
> > > > I would leave mips_ prefix for Fuloong, and actually add it to Boston
> > > > source file, so that we are finally consistent across all MIPS
> > > > machines.
> > > >
> > > > What do you think?
> > >
> > > These names were used years ago when all hardware was in the same hw/
> > > directory, not sorted per target. Now new machines don't use the target
> > > as prefix name. I'd clean the other way around, and dropping the 'mips_'
> > > prefix. The positive side is we can 5 more characters to better describe
> > > a patch while limited by the 72 chars in the subject :)
> >
> > All having the prefix, or all dropping the prefix, are both good for
> > me, just keep consistency.
> >
> > Huacai
> >
>
> Philippe, Huacai,
>
> Prefix or not, I have mixed feelings. I had consistency more in mind
> than prefix.
>
> So it seems the prevailing opinion is slightly on the side of dropping
> prefix "mips_".
>
> Philippe, if it is not too difficult, could you perhaps make dropping
> that prefix for all source file names in hw/mips a part of the this
> series (not to complicate situation with a separate series) in its
> follow-up version (but perhaps keep that change(s) in separate
> patch(es))?
>

Conveniently enough, most of involved files do not have checkpatch
warnings and errors:

$ ../../scripts/checkpatch.pl --strict -f ./mips_fulong2e.c
total: 0 errors, 0 warnings, 404 lines checked

./mips_fulong2e.c has no obvious style problems and is ready for submission.
$ ../../scripts/checkpatch.pl --strict -f ./mips_malta.c
ERROR: if this code is redundant consider removing it
#430: FILE: ./mips_malta.c:430:
+#if 0

ERROR: if this code is redundant consider removing it
#518: FILE: ./mips_malta.c:518:
+#if 0

total: 2 errors, 0 warnings, 1458 lines checked

./mips_malta.c has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
$ ../../scripts/checkpatch.pl --strict -f ./mips_mipssim.c
total: 0 errors, 0 warnings, 246 lines checked

./mips_mipssim.c has no obvious style problems and is ready for submission.
$ ../../scripts/checkpatch.pl --strict -f ./mips_r4k.c
total: 0 errors, 0 warnings, 318 lines checked

./mips_r4k.c has no obvious style problems and is ready for submission.


Maybe we should also finally get rid of these segments in mips_malta.c:

#if 0
        printf("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n",
               addr);
#endif

and

#if 0
        printf("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n",
               addr);
#endif

possibly replacing them with some logging?

Philippe?

Thanks,
Aleksandar



> Sincerely,
> Aleksandar
>
> > >
> > > >
> > > > Aleksandar
> > > >
> > > >> Huacai
> > > >>>   hw/pci-host/bonito.c                     |  8 ++---
> > > >>>   tests/qtest/endianness-test.c            |  2 +-
> > > >>>   MAINTAINERS                              |  4 +--
> > > >>>   hw/mips/Kconfig                          |  2 +-
> > > >>>   hw/mips/Makefile.objs                    |  2 +-
> > > >>>   9 files changed, 36 insertions(+), 34 deletions(-)
> > > >>>   rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
> > > >>>
> > > >>> diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
> > > >>> index 2736fd0509..cd2a931edf 100644
> > > >>> --- a/docs/system/target-mips.rst
> > > >>> +++ b/docs/system/target-mips.rst
> > > >>> @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
> > > >>>
> > > >>>   -  G364 framebuffer
> > > >>>
> > > >>> -The Fulong 2E emulation supports:
> > > >>> +The Fuloong 2E emulation supports:
> > > >>>
> > > >>>   -  Loongson 2E CPU
> > > >>>
> > > >>> diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
> > > >>> index 8b0c9b1e15..9f8a3ef156 100644
> > > >>> --- a/default-configs/mips64el-softmmu.mak
> > > >>> +++ b/default-configs/mips64el-softmmu.mak
> > > >>> @@ -2,7 +2,7 @@
> > > >>>
> > > >>>   include mips-softmmu-common.mak
> > > >>>   CONFIG_IDE_VIA=y
> > > >>> -CONFIG_FULONG=y
> > > >>> +CONFIG_FULOONG=y
> > > >>>   CONFIG_ATI_VGA=y
> > > >>>   CONFIG_RTL8139_PCI=y
> > > >>>   CONFIG_JAZZ=y
> > > >>> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> > > >>> index d9b51fce8d..fac4e56b7d 100644
> > > >>> --- a/hw/isa/vt82c686.c
> > > >>> +++ b/hw/isa/vt82c686.c
> > > >>> @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
> > > >>>       dc->vmsd = &vmstate_via;
> > > >>>       /*
> > > >>>        * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
> > > >>> -     * e.g. by mips_fulong2e_init()
> > > >>> +     * e.g. by mips_fuloong2e_init()
> > > >>>        */
> > > >>>       dc->user_creatable = false;
> > > >>>   }
> > > >>> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
> > > >>> similarity index 91%
> > > >>> rename from hw/mips/mips_fulong2e.c
> > > >>> rename to hw/mips/fuloong2e.c
> > > >>> index 4e1a3646af..624c46a4fd 100644
> > > >>> --- a/hw/mips/mips_fulong2e.c
> > > >>> +++ b/hw/mips/fuloong2e.c
> > > >>> @@ -1,5 +1,5 @@
> > > >>>   /*
> > > >>> - * QEMU fulong 2e mini pc support
> > > >>> + * QEMU fuloong 2e mini pc support
> > > >>>    *
> > > >>>    * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
> > > >>>    * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
> > > >>> @@ -11,8 +11,8 @@
> > > >>>    */
> > > >>>
> > > >>>   /*
> > > >>> - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> > > >>> - * http://www.linux-mips.org/wiki/Fulong
> > > >>> + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
> > > >>> + * https://www.linux-mips.org/wiki/Fuloong_2E
> > > >>>    *
> > > >>>    * Loongson 2e user manual:
> > > >>>    * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
> > > >>> @@ -46,13 +46,13 @@
> > > >>>   #include "sysemu/reset.h"
> > > >>>   #include "qemu/error-report.h"
> > > >>>
> > > >>> -#define DEBUG_FULONG2E_INIT
> > > >>> +#define DEBUG_FULOONG2E_INIT
> > > >>>
> > > >>>   #define ENVP_ADDR               0x80002000l
> > > >>>   #define ENVP_NB_ENTRIES         16
> > > >>>   #define ENVP_ENTRY_SIZE         256
> > > >>>
> > > >>> -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
> > > >>> +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
> > > >>>   #define BIOS_SIZE               (512 * KiB)
> > > >>>   #define MAX_IDE_BUS             2
> > > >>>
> > > >>> @@ -69,12 +69,12 @@
> > > >>>    * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
> > > >>>    * in the "Compile Guide".
> > > >>>    */
> > > >>> -#define FULONG_BIOSNAME "pmon_2e.bin"
> > > >>> +#define FULOONG_BIOSNAME "pmon_2e.bin"
> > > >>>
> > > >>> -/* PCI SLOT in fulong 2e */
> > > >>> -#define FULONG2E_VIA_SLOT        5
> > > >>> -#define FULONG2E_ATI_SLOT        6
> > > >>> -#define FULONG2E_RTL8139_SLOT    7
> > > >>> +/* PCI SLOT in Fuloong 2e */
> > > >>> +#define FULOONG2E_VIA_SLOT        5
> > > >>> +#define FULOONG2E_ATI_SLOT        6
> > > >>> +#define FULOONG2E_RTL8139_SLOT    7
> > > >>>
> > > >>>   static struct _loaderparams {
> > > >>>       int ram_size;
> > > >>> @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
> > > >>>           const char *default_devaddr = NULL;
> > > >>>
> > > >>>           if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
> > > >>> -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
> > > >>> +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
> > > >>>               default_devaddr = "07";
> > > >>>           }
> > > >>>
> > > >>> @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
> > > >>>       }
> > > >>>   }
> > > >>>
> > > >>> -static void mips_fulong2e_init(MachineState *machine)
> > > >>> +static void mips_fuloong2e_init(MachineState *machine)
> > > >>>   {
> > > >>>       const char *kernel_filename = machine->kernel_filename;
> > > >>>       const char *kernel_cmdline = machine->kernel_cmdline;
> > > >>> @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
> > > >>>           error_report("Invalid RAM size, should be 256MB");
> > > >>>           exit(EXIT_FAILURE);
> > > >>>       }
> > > >>> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> > > >>>
> > > >>> -    /* Boot ROM */
> > > >>> -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
> > > >>> +    /* allocate RAM */
> > > >>> +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
> > > >>>                              &error_fatal);
> > > >>> +
> > > >>> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
> > > >>>       memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
> > > >>>
> > > >>>       /*
> > > >>> @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
> > > >>>           write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
> > > >>>       } else {
> > > >>>           if (bios_name == NULL) {
> > > >>> -                bios_name = FULONG_BIOSNAME;
> > > >>> +                bios_name = FULOONG_BIOSNAME;
> > > >>>           }
> > > >>>           filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> > > >>>           if (filename) {
> > > >>> @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
> > > >>>       pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
> > > >>>
> > > >>>       /* South bridge -> IP5 */
> > > >>> -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
> > > >>> +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
> > > >>>                                  &smbus, &isa_bus);
> > > >>>
> > > >>>       /* GPU */
> > > >>> @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
> > > >>>       network_init(pci_bus);
> > > >>>   }
> > > >>>
> > > >>> -static void mips_fulong2e_machine_init(MachineClass *mc)
> > > >>> +static void mips_fuloong2e_machine_init(MachineClass *mc)
> > > >>>   {
> > > >>> -    mc->desc = "Fulong 2e mini pc";
> > > >>> -    mc->init = mips_fulong2e_init;
> > > >>> +    mc->desc = "Fuloong 2e mini pc";
> > > >>> +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
> > > >>> +    mc->init = mips_fuloong2e_init;
> > > >>>       mc->block_default_type = IF_IDE;
> > > >>>       mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
> > > >>>       mc->default_ram_size = 256 * MiB;
> > > >>> -    mc->default_ram_id = "fulong2e.ram";
> > > >>> +    mc->default_ram_id = "fuloong2e.ram";
> > > >>>   }
> > > >>>
> > > >>> -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
> > > >>> +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
> > > >>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> > > >>> index cc6545c8a8..b9bfe3c417 100644
> > > >>> --- a/hw/pci-host/bonito.c
> > > >>> +++ b/hw/pci-host/bonito.c
> > > >>> @@ -11,7 +11,7 @@
> > > >>>    */
> > > >>>
> > > >>>   /*
> > > >>> - * fulong 2e mini pc has a bonito north bridge.
> > > >>> + * fuloong 2e mini pc has a bonito north bridge.
> > > >>>    */
> > > >>>
> > > >>>   /*
> > > >>> @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
> > > >>>       slot = (pci_dev->devfn >> 3);
> > > >>>
> > > >>>       switch (slot) {
> > > >>> -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> > > >>> +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
> > > >>>           return irq_num % 4 + BONITO_IRQ_BASE;
> > > >>> -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
> > > >>> +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
> > > >>>           return 4 + BONITO_IRQ_BASE;
> > > >>> -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
> > > >>> +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
> > > >>>           return 5 + BONITO_IRQ_BASE;
> > > >>>       case 8 ... 12: /* PCI slot 1 to 4 */
> > > >>>           return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
> > > >>> diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
> > > >>> index 2798802c63..cc088ac01a 100644
> > > >>> --- a/tests/qtest/endianness-test.c
> > > >>> +++ b/tests/qtest/endianness-test.c
> > > >>> @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
> > > >>>       { "mips64", "pica61", 0x90000000, .bswap = true },
> > > >>>       { "mips64", "mips", 0x14000000, .bswap = true },
> > > >>>       { "mips64", "malta", 0x10000000, .bswap = true },
> > > >>> -    { "mips64el", "fulong2e", 0x1fd00000 },
> > > >>> +    { "mips64el", "fuloong2e", 0x1fd00000 },
> > > >>>       { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
> > > >>>       { "ppc", "40p", 0x80000000, .bswap = true },
> > > >>>       { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
> > > >>> diff --git a/MAINTAINERS b/MAINTAINERS
> > > >>> index aa5c54c75a..50f6a5f1bb 100644
> > > >>> --- a/MAINTAINERS
> > > >>> +++ b/MAINTAINERS
> > > >>> @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
> > > >>>   S: Obsolete
> > > >>>   F: hw/mips/mips_r4k.c
> > > >>>
> > > >>> -Fulong 2E
> > > >>> +Fuloong 2E
> > > >>>   M: Huacai Chen <chenhc@lemote.com>
> > > >>>   M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > > >>>   M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
> > > >>>   R: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > > >>>   S: Odd Fixes
> > > >>> -F: hw/mips/mips_fulong2e.c
> > > >>> +F: hw/mips/fuloong2e.c
> > > >>>   F: hw/isa/vt82c686.c
> > > >>>   F: hw/pci-host/bonito.c
> > > >>>   F: include/hw/isa/vt82c686.h
> > > >>> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
> > > >>> index 2c2adbc42a..cd38546689 100644
> > > >>> --- a/hw/mips/Kconfig
> > > >>> +++ b/hw/mips/Kconfig
> > > >>> @@ -41,7 +41,7 @@ config JAZZ
> > > >>>       select DS1225Y
> > > >>>       select JAZZ_LED
> > > >>>
> > > >>> -config FULONG
> > > >>> +config FULOONG
> > > >>>       bool
> > > >>>
> > > >>>   config MIPS_CPS
> > > >>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
> > > >>> index 525809af07..8ab41edc3f 100644
> > > >>> --- a/hw/mips/Makefile.objs
> > > >>> +++ b/hw/mips/Makefile.objs
> > > >>> @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
> > > >>>   obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
> > > >>>   obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
> > > >>>   obj-$(CONFIG_JAZZ) += mips_jazz.o
> > > >>> -obj-$(CONFIG_FULONG) += mips_fulong2e.o
> > > >>> +obj-$(CONFIG_FULOONG) += fuloong2e.o
> > > >>>   obj-$(CONFIG_MIPS_CPS) += cps.o
> > > >>>   obj-$(CONFIG_MIPS_BOSTON) += boston.o
> > > >>> --
> > > >>> 2.21.3
> > > >>>
> > > >>>
> > > >>
> > > >>
> > > >> --
> > > >> Huacai Chen
> > > >
> >
> >
> >
> > --
> > Huacai Chen


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (11 preceding siblings ...)
  2020-05-10 21:01 ` [NOTFORMERGE PATCH 12/12] POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset Philippe Mathieu-Daudé
@ 2020-05-11  9:43 ` Aleksandar Markovic
  2020-05-26  7:47 ` Philippe Mathieu-Daudé
  13 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-11  9:43 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, QEMU Developers,
	Jiaxun Yang, Paolo Bonzini, Huacai Chen, Aleksandar Rikalo,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

нед, 10. мај 2020. у 23:01 Philippe Mathieu-Daudé <f4bug@amsat.org> је
написао/ла:
>
> The PMON firmware behave differently regarding it is run
> after a cold/warm reset. A simple bit flip fix the issue,
> however we need to know the type of reset to set it.
> Currently QEMU only supports COLD reset.
>
> This series contains various of my current Fuloong queue,
> - Welcome Huacai Chen as co-maintainer,
> - Fix typo in machine name,
> - Few cleanups in Bonito64,
> - Report various Bonito64 accesses as UNIMP,
> - Proof-of-concept fix for the reset bit.
>
> The last patch is not for merging, but is included to see
> if the Multi-phase reset mechanism can fix the problem.
>

Perhaps you can change the title of the series in its next version to:

target/mips: Fuloong2e and ither mips fixes and improvements

or similar, since its scope is wider than the current title conveys.

Regards,
Aleksandar



> Regards,
>
> Phil.
>
> Huacai Chen (1):
>   MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
>
> Philippe Mathieu-Daudé (11):
>   hw/mips/fuloong2e: Rename PMON BIOS name
>   hw/mips/fuloong2e: Move code and update a comment
>   hw/mips/fuloong2e: Fix typo in Fuloong machine name
>   hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
>   hw/pci-host/bonito: Fix DPRINTF() format strings
>   hw/pci-host/bonito: Map peripheral using physical address
>   hw/pci-host/bonito: Map all the Bonito64 I/O range
>   hw/pci-host/bonito: Map the different PCI ranges more detailled
>   hw/pci-host/bonito: Better describe the I/O CS regions
>   hw/pci-host/bonito: Set the Config register reset value with
>     FIELD_DP32
>   POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset
>
>  docs/system/target-mips.rst              |  2 +-
>  default-configs/mips64el-softmmu.mak     |  2 +-
>  hw/isa/vt82c686.c                        |  2 +-
>  hw/mips/{mips_fulong2e.c => fuloong2e.c} | 41 +++++------
>  hw/pci-host/bonito.c                     | 92 +++++++++++++++++++-----
>  tests/qtest/endianness-test.c            |  2 +-
>  MAINTAINERS                              |  6 +-
>  hw/mips/Kconfig                          |  3 +-
>  hw/mips/Makefile.objs                    |  2 +-
>  hw/pci-host/Kconfig                      |  5 ++
>  hw/pci-host/Makefile.objs                |  2 +-
>  11 files changed, 114 insertions(+), 45 deletions(-)
>  rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
>
> --
> 2.21.3
>


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name
  2020-05-11  8:27             ` Aleksandar Markovic
@ 2020-05-12  8:09               ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-12  8:09 UTC (permalink / raw)
  To: Aleksandar Markovic, chen huacai
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, qemu-level,
	Jiaxun Yang, Aleksandar Markovic, Huacai Chen, Paolo Bonzini,
	Aleksandar Rikalo, Philippe Mathieu-Daudé,
	Aurelien Jarno

On 5/11/20 10:27 AM, Aleksandar Markovic wrote:
> пон, 11. мај 2020. у 10:12 Aleksandar Markovic
> <aleksandar.qemu.devel@gmail.com> је написао/ла:
>>
>> пон, 11. мај 2020. у 08:52 chen huacai <zltjiangshi@gmail.com> је написао/ла:
>>>
>>> Hi, Philippe and Alexandar,
>>>
>>> On Mon, May 11, 2020 at 2:38 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>>>
>>>> On 5/11/20 8:21 AM, Aleksandar Markovic wrote:
>>>>> пон, 11. мај 2020. у 03:11 chen huacai <zltjiangshi@gmail.com> је написао/ла:
>>>>>>
>>>>>> Hi, Philippe,
>>>>>>
>>>>>> On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>>>>>>
>>>>>>> We always miswrote the Fuloong machine... Fix its name.
>>>>>>> Add an machine alias to the previous name for backward
>>>>>>> compatibility.
>>>>>>>
>>>>>>> Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com>
>>>>>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>>>>>> ---
>>>>>>>    docs/system/target-mips.rst              |  2 +-
>>>>>>>    default-configs/mips64el-softmmu.mak     |  2 +-
>>>>>>>    hw/isa/vt82c686.c                        |  2 +-
>>>>>>>    hw/mips/{mips_fulong2e.c => fuloong2e.c} | 46 ++++++++++++------------
>>>>>> Use mips_fuloong2e.c instead of fuloong2e.c? Other machine file names
>>>>>> also have a "mips_" prefix.
>>>>>>
>>>>>
>>>>> I would leave mips_ prefix for Fuloong, and actually add it to Boston
>>>>> source file, so that we are finally consistent across all MIPS
>>>>> machines.
>>>>>
>>>>> What do you think?
>>>>
>>>> These names were used years ago when all hardware was in the same hw/
>>>> directory, not sorted per target. Now new machines don't use the target
>>>> as prefix name. I'd clean the other way around, and dropping the 'mips_'
>>>> prefix. The positive side is we can 5 more characters to better describe
>>>> a patch while limited by the 72 chars in the subject :)
>>>
>>> All having the prefix, or all dropping the prefix, are both good for
>>> me, just keep consistency.
>>>
>>> Huacai
>>>
>>
>> Philippe, Huacai,
>>
>> Prefix or not, I have mixed feelings. I had consistency more in mind
>> than prefix.
>>
>> So it seems the prevailing opinion is slightly on the side of dropping
>> prefix "mips_".
>>
>> Philippe, if it is not too difficult, could you perhaps make dropping
>> that prefix for all source file names in hw/mips a part of the this
>> series (not to complicate situation with a separate series) in its
>> follow-up version (but perhaps keep that change(s) in separate
>> patch(es))?

Certainly not difficult, but I won't take that as a priority.
I already spend more time trying to document better the MIPS commits, as 
it is important to you, and it also serves the community. Regarding 
unifying the file names I don't care much, so I'll not rename this file 
to stop bikeshredding on futile topics and keep focus on the technical 
changes of the patches.

>>
> 
> Conveniently enough, most of involved files do not have checkpatch
> warnings and errors:
> 
> $ ../../scripts/checkpatch.pl --strict -f ./mips_fulong2e.c
> total: 0 errors, 0 warnings, 404 lines checked
> 
> ./mips_fulong2e.c has no obvious style problems and is ready for submission.
> $ ../../scripts/checkpatch.pl --strict -f ./mips_malta.c
> ERROR: if this code is redundant consider removing it
> #430: FILE: ./mips_malta.c:430:
> +#if 0
> 
> ERROR: if this code is redundant consider removing it
> #518: FILE: ./mips_malta.c:518:
> +#if 0
> 
> total: 2 errors, 0 warnings, 1458 lines checked
> 
> ./mips_malta.c has style problems, please review.  If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
> $ ../../scripts/checkpatch.pl --strict -f ./mips_mipssim.c
> total: 0 errors, 0 warnings, 246 lines checked
> 
> ./mips_mipssim.c has no obvious style problems and is ready for submission.
> $ ../../scripts/checkpatch.pl --strict -f ./mips_r4k.c
> total: 0 errors, 0 warnings, 318 lines checked
> 
> ./mips_r4k.c has no obvious style problems and is ready for submission.
> 
> 
> Maybe we should also finally get rid of these segments in mips_malta.c:
> 
> #if 0
>          printf("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n",
>                 addr);
> #endif
> 
> and
> 
> #if 0
>          printf("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n",
>                 addr);
> #endif
> 
> possibly replacing them with some logging?

Yes, I had it done before the checkpatch fixes on hw/mips/, now I have 
to rebase. Instead I postpone for the day I find interest in playing 
with the Malta. Remember this is a hobbyist board (the Boston being the 
corporate quality one).

> 
> Philippe?
> 
> Thanks,
> Aleksandar
> 
> 
> 
>> Sincerely,
>> Aleksandar
>>
>>>>
>>>>>
>>>>> Aleksandar
>>>>>
>>>>>> Huacai
>>>>>>>    hw/pci-host/bonito.c                     |  8 ++---
>>>>>>>    tests/qtest/endianness-test.c            |  2 +-
>>>>>>>    MAINTAINERS                              |  4 +--
>>>>>>>    hw/mips/Kconfig                          |  2 +-
>>>>>>>    hw/mips/Makefile.objs                    |  2 +-
>>>>>>>    9 files changed, 36 insertions(+), 34 deletions(-)
>>>>>>>    rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%)
>>>>>>>
>>>>>>> diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
>>>>>>> index 2736fd0509..cd2a931edf 100644
>>>>>>> --- a/docs/system/target-mips.rst
>>>>>>> +++ b/docs/system/target-mips.rst
>>>>>>> @@ -74,7 +74,7 @@ The MIPS Magnum R4000 emulation supports:
>>>>>>>
>>>>>>>    -  G364 framebuffer
>>>>>>>
>>>>>>> -The Fulong 2E emulation supports:
>>>>>>> +The Fuloong 2E emulation supports:
>>>>>>>
>>>>>>>    -  Loongson 2E CPU
>>>>>>>
>>>>>>> diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
>>>>>>> index 8b0c9b1e15..9f8a3ef156 100644
>>>>>>> --- a/default-configs/mips64el-softmmu.mak
>>>>>>> +++ b/default-configs/mips64el-softmmu.mak
>>>>>>> @@ -2,7 +2,7 @@
>>>>>>>
>>>>>>>    include mips-softmmu-common.mak
>>>>>>>    CONFIG_IDE_VIA=y
>>>>>>> -CONFIG_FULONG=y
>>>>>>> +CONFIG_FULOONG=y
>>>>>>>    CONFIG_ATI_VGA=y
>>>>>>>    CONFIG_RTL8139_PCI=y
>>>>>>>    CONFIG_JAZZ=y
>>>>>>> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
>>>>>>> index d9b51fce8d..fac4e56b7d 100644
>>>>>>> --- a/hw/isa/vt82c686.c
>>>>>>> +++ b/hw/isa/vt82c686.c
>>>>>>> @@ -503,7 +503,7 @@ static void via_class_init(ObjectClass *klass, void *data)
>>>>>>>        dc->vmsd = &vmstate_via;
>>>>>>>        /*
>>>>>>>         * Reason: part of VIA VT82C686 southbridge, needs to be wired up,
>>>>>>> -     * e.g. by mips_fulong2e_init()
>>>>>>> +     * e.g. by mips_fuloong2e_init()
>>>>>>>         */
>>>>>>>        dc->user_creatable = false;
>>>>>>>    }
>>>>>>> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/fuloong2e.c
>>>>>>> similarity index 91%
>>>>>>> rename from hw/mips/mips_fulong2e.c
>>>>>>> rename to hw/mips/fuloong2e.c
>>>>>>> index 4e1a3646af..624c46a4fd 100644
>>>>>>> --- a/hw/mips/mips_fulong2e.c
>>>>>>> +++ b/hw/mips/fuloong2e.c
>>>>>>> @@ -1,5 +1,5 @@
>>>>>>>    /*
>>>>>>> - * QEMU fulong 2e mini pc support
>>>>>>> + * QEMU fuloong 2e mini pc support
>>>>>>>     *
>>>>>>>     * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
>>>>>>>     * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
>>>>>>> @@ -11,8 +11,8 @@
>>>>>>>     */
>>>>>>>
>>>>>>>    /*
>>>>>>> - * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
>>>>>>> - * http://www.linux-mips.org/wiki/Fulong
>>>>>>> + * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
>>>>>>> + * https://www.linux-mips.org/wiki/Fuloong_2E
>>>>>>>     *
>>>>>>>     * Loongson 2e user manual:
>>>>>>>     * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
>>>>>>> @@ -46,13 +46,13 @@
>>>>>>>    #include "sysemu/reset.h"
>>>>>>>    #include "qemu/error-report.h"
>>>>>>>
>>>>>>> -#define DEBUG_FULONG2E_INIT
>>>>>>> +#define DEBUG_FULOONG2E_INIT
>>>>>>>
>>>>>>>    #define ENVP_ADDR               0x80002000l
>>>>>>>    #define ENVP_NB_ENTRIES         16
>>>>>>>    #define ENVP_ENTRY_SIZE         256
>>>>>>>
>>>>>>> -/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
>>>>>>> +/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
>>>>>>>    #define BIOS_SIZE               (512 * KiB)
>>>>>>>    #define MAX_IDE_BUS             2
>>>>>>>
>>>>>>> @@ -69,12 +69,12 @@
>>>>>>>     * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
>>>>>>>     * in the "Compile Guide".
>>>>>>>     */
>>>>>>> -#define FULONG_BIOSNAME "pmon_2e.bin"
>>>>>>> +#define FULOONG_BIOSNAME "pmon_2e.bin"
>>>>>>>
>>>>>>> -/* PCI SLOT in fulong 2e */
>>>>>>> -#define FULONG2E_VIA_SLOT        5
>>>>>>> -#define FULONG2E_ATI_SLOT        6
>>>>>>> -#define FULONG2E_RTL8139_SLOT    7
>>>>>>> +/* PCI SLOT in Fuloong 2e */
>>>>>>> +#define FULOONG2E_VIA_SLOT        5
>>>>>>> +#define FULOONG2E_ATI_SLOT        6
>>>>>>> +#define FULOONG2E_RTL8139_SLOT    7
>>>>>>>
>>>>>>>    static struct _loaderparams {
>>>>>>>        int ram_size;
>>>>>>> @@ -279,7 +279,7 @@ static void network_init(PCIBus *pci_bus)
>>>>>>>            const char *default_devaddr = NULL;
>>>>>>>
>>>>>>>            if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
>>>>>>> -            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
>>>>>>> +            /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
>>>>>>>                default_devaddr = "07";
>>>>>>>            }
>>>>>>>
>>>>>>> @@ -287,7 +287,7 @@ static void network_init(PCIBus *pci_bus)
>>>>>>>        }
>>>>>>>    }
>>>>>>>
>>>>>>> -static void mips_fulong2e_init(MachineState *machine)
>>>>>>> +static void mips_fuloong2e_init(MachineState *machine)
>>>>>>>    {
>>>>>>>        const char *kernel_filename = machine->kernel_filename;
>>>>>>>        const char *kernel_cmdline = machine->kernel_cmdline;
>>>>>>> @@ -316,11 +316,12 @@ static void mips_fulong2e_init(MachineState *machine)
>>>>>>>            error_report("Invalid RAM size, should be 256MB");
>>>>>>>            exit(EXIT_FAILURE);
>>>>>>>        }
>>>>>>> -    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>>>>>>>
>>>>>>> -    /* Boot ROM */
>>>>>>> -    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
>>>>>>> +    /* allocate RAM */
>>>>>>> +    memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
>>>>>>>                               &error_fatal);
>>>>>>> +
>>>>>>> +    memory_region_add_subregion(address_space_mem, 0, machine->ram);
>>>>>>>        memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
>>>>>>>
>>>>>>>        /*
>>>>>>> @@ -337,7 +338,7 @@ static void mips_fulong2e_init(MachineState *machine)
>>>>>>>            write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
>>>>>>>        } else {
>>>>>>>            if (bios_name == NULL) {
>>>>>>> -                bios_name = FULONG_BIOSNAME;
>>>>>>> +                bios_name = FULOONG_BIOSNAME;
>>>>>>>            }
>>>>>>>            filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
>>>>>>>            if (filename) {
>>>>>>> @@ -363,7 +364,7 @@ static void mips_fulong2e_init(MachineState *machine)
>>>>>>>        pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
>>>>>>>
>>>>>>>        /* South bridge -> IP5 */
>>>>>>> -    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
>>>>>>> +    vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
>>>>>>>                                   &smbus, &isa_bus);
>>>>>>>
>>>>>>>        /* GPU */
>>>>>>> @@ -384,14 +385,15 @@ static void mips_fulong2e_init(MachineState *machine)
>>>>>>>        network_init(pci_bus);
>>>>>>>    }
>>>>>>>
>>>>>>> -static void mips_fulong2e_machine_init(MachineClass *mc)
>>>>>>> +static void mips_fuloong2e_machine_init(MachineClass *mc)
>>>>>>>    {
>>>>>>> -    mc->desc = "Fulong 2e mini pc";
>>>>>>> -    mc->init = mips_fulong2e_init;
>>>>>>> +    mc->desc = "Fuloong 2e mini pc";
>>>>>>> +    mc->alias = "fulong2e";             /* Incorrect name used up to QEMU 4.2 */
>>>>>>> +    mc->init = mips_fuloong2e_init;
>>>>>>>        mc->block_default_type = IF_IDE;
>>>>>>>        mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
>>>>>>>        mc->default_ram_size = 256 * MiB;
>>>>>>> -    mc->default_ram_id = "fulong2e.ram";
>>>>>>> +    mc->default_ram_id = "fuloong2e.ram";
>>>>>>>    }
>>>>>>>
>>>>>>> -DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
>>>>>>> +DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
>>>>>>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
>>>>>>> index cc6545c8a8..b9bfe3c417 100644
>>>>>>> --- a/hw/pci-host/bonito.c
>>>>>>> +++ b/hw/pci-host/bonito.c
>>>>>>> @@ -11,7 +11,7 @@
>>>>>>>     */
>>>>>>>
>>>>>>>    /*
>>>>>>> - * fulong 2e mini pc has a bonito north bridge.
>>>>>>> + * fuloong 2e mini pc has a bonito north bridge.
>>>>>>>     */
>>>>>>>
>>>>>>>    /*
>>>>>>> @@ -559,11 +559,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
>>>>>>>        slot = (pci_dev->devfn >> 3);
>>>>>>>
>>>>>>>        switch (slot) {
>>>>>>> -    case 5:   /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
>>>>>>> +    case 5:   /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
>>>>>>>            return irq_num % 4 + BONITO_IRQ_BASE;
>>>>>>> -    case 6:   /* FULONG2E_ATI_SLOT, VGA */
>>>>>>> +    case 6:   /* FULOONG2E_ATI_SLOT, VGA */
>>>>>>>            return 4 + BONITO_IRQ_BASE;
>>>>>>> -    case 7:   /* FULONG2E_RTL_SLOT, RTL8139 */
>>>>>>> +    case 7:   /* FULOONG2E_RTL_SLOT, RTL8139 */
>>>>>>>            return 5 + BONITO_IRQ_BASE;
>>>>>>>        case 8 ... 12: /* PCI slot 1 to 4 */
>>>>>>>            return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
>>>>>>> diff --git a/tests/qtest/endianness-test.c b/tests/qtest/endianness-test.c
>>>>>>> index 2798802c63..cc088ac01a 100644
>>>>>>> --- a/tests/qtest/endianness-test.c
>>>>>>> +++ b/tests/qtest/endianness-test.c
>>>>>>> @@ -33,7 +33,7 @@ static const TestCase test_cases[] = {
>>>>>>>        { "mips64", "pica61", 0x90000000, .bswap = true },
>>>>>>>        { "mips64", "mips", 0x14000000, .bswap = true },
>>>>>>>        { "mips64", "malta", 0x10000000, .bswap = true },
>>>>>>> -    { "mips64el", "fulong2e", 0x1fd00000 },
>>>>>>> +    { "mips64el", "fuloong2e", 0x1fd00000 },
>>>>>>>        { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
>>>>>>>        { "ppc", "40p", 0x80000000, .bswap = true },
>>>>>>>        { "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
>>>>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>>>>> index aa5c54c75a..50f6a5f1bb 100644
>>>>>>> --- a/MAINTAINERS
>>>>>>> +++ b/MAINTAINERS
>>>>>>> @@ -1074,13 +1074,13 @@ R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
>>>>>>>    S: Obsolete
>>>>>>>    F: hw/mips/mips_r4k.c
>>>>>>>
>>>>>>> -Fulong 2E
>>>>>>> +Fuloong 2E
>>>>>>>    M: Huacai Chen <chenhc@lemote.com>
>>>>>>>    M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>>>>>>    M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
>>>>>>>    R: Jiaxun Yang <jiaxun.yang@flygoat.com>
>>>>>>>    S: Odd Fixes
>>>>>>> -F: hw/mips/mips_fulong2e.c
>>>>>>> +F: hw/mips/fuloong2e.c
>>>>>>>    F: hw/isa/vt82c686.c
>>>>>>>    F: hw/pci-host/bonito.c
>>>>>>>    F: include/hw/isa/vt82c686.h
>>>>>>> diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
>>>>>>> index 2c2adbc42a..cd38546689 100644
>>>>>>> --- a/hw/mips/Kconfig
>>>>>>> +++ b/hw/mips/Kconfig
>>>>>>> @@ -41,7 +41,7 @@ config JAZZ
>>>>>>>        select DS1225Y
>>>>>>>        select JAZZ_LED
>>>>>>>
>>>>>>> -config FULONG
>>>>>>> +config FULOONG
>>>>>>>        bool
>>>>>>>
>>>>>>>    config MIPS_CPS
>>>>>>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
>>>>>>> index 525809af07..8ab41edc3f 100644
>>>>>>> --- a/hw/mips/Makefile.objs
>>>>>>> +++ b/hw/mips/Makefile.objs
>>>>>>> @@ -3,6 +3,6 @@ obj-$(CONFIG_R4K) += mips_r4k.o
>>>>>>>    obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o
>>>>>>>    obj-$(CONFIG_MIPSSIM) += mips_mipssim.o
>>>>>>>    obj-$(CONFIG_JAZZ) += mips_jazz.o
>>>>>>> -obj-$(CONFIG_FULONG) += mips_fulong2e.o
>>>>>>> +obj-$(CONFIG_FULOONG) += fuloong2e.o
>>>>>>>    obj-$(CONFIG_MIPS_CPS) += cps.o
>>>>>>>    obj-$(CONFIG_MIPS_BOSTON) += boston.o
>>>>>>> --
>>>>>>> 2.21.3
>>>>>>>
>>>>>>>
>>>>>>
>>>>>>
>>>>>> --
>>>>>> Huacai Chen
>>>>>
>>>
>>>
>>>
>>> --
>>> Huacai Chen
> 


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot
  2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
                   ` (12 preceding siblings ...)
  2020-05-11  9:43 ` [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Aleksandar Markovic
@ 2020-05-26  7:47 ` Philippe Mathieu-Daudé
  2020-05-26 10:41   ` Aleksandar Markovic
  13 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-26  7:47 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen, Jiaxun Yang,
	Aleksandar Markovic, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Aurelien Jarno

On 5/10/20 11:01 PM, Philippe Mathieu-Daudé wrote:
> The PMON firmware behave differently regarding it is run
> after a cold/warm reset. A simple bit flip fix the issue,
> however we need to know the type of reset to set it.
> Currently QEMU only supports COLD reset.
> 
> This series contains various of my current Fuloong queue,
> - Welcome Huacai Chen as co-maintainer,
> - Fix typo in machine name,
> - Few cleanups in Bonito64,
> - Report various Bonito64 accesses as UNIMP,
> - Proof-of-concept fix for the reset bit.
> 
> The last patch is not for merging, but is included to see
> if the Multi-phase reset mechanism can fix the problem.
> 
> Regards,
> 
> Phil.
> 
> Huacai Chen (1):
>   MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
> 
> Philippe Mathieu-Daudé (11):
>   hw/mips/fuloong2e: Rename PMON BIOS name
>   hw/mips/fuloong2e: Move code and update a comment
>   hw/mips/fuloong2e: Fix typo in Fuloong machine name
>   hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
>   hw/pci-host/bonito: Fix DPRINTF() format strings
>   hw/pci-host/bonito: Map peripheral using physical address
>   hw/pci-host/bonito: Map all the Bonito64 I/O range
>   hw/pci-host/bonito: Map the different PCI ranges more detailled
>   hw/pci-host/bonito: Better describe the I/O CS regions
>   hw/pci-host/bonito: Set the Config register reset value with
>     FIELD_DP32
>   POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset

Thanks, patches 1, 3-11 queued to mips-next after addressing Aleksandar
comments.



^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot
  2020-05-26  7:47 ` Philippe Mathieu-Daudé
@ 2020-05-26 10:41   ` Aleksandar Markovic
  0 siblings, 0 replies; 36+ messages in thread
From: Aleksandar Markovic @ 2020-05-26 10:41 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Laurent Vivier, Thomas Huth, Huacai Chen,
	Philippe Mathieu-Daudé,
	Jiaxun Yang, QEMU Developers, Paolo Bonzini, Huacai Chen,
	Aleksandar Rikalo, Aurelien Jarno

уто, 26. мај 2020. у 09:47 Philippe Mathieu-Daudé <philmd@redhat.com>
је написао/ла:
>
> On 5/10/20 11:01 PM, Philippe Mathieu-Daudé wrote:
> > The PMON firmware behave differently regarding it is run
> > after a cold/warm reset. A simple bit flip fix the issue,
> > however we need to know the type of reset to set it.
> > Currently QEMU only supports COLD reset.
> >
> > This series contains various of my current Fuloong queue,
> > - Welcome Huacai Chen as co-maintainer,
> > - Fix typo in machine name,
> > - Few cleanups in Bonito64,
> > - Report various Bonito64 accesses as UNIMP,
> > - Proof-of-concept fix for the reset bit.
> >
> > The last patch is not for merging, but is included to see
> > if the Multi-phase reset mechanism can fix the problem.
> >
> > Regards,
> >
> > Phil.
> >
> > Huacai Chen (1):
> >   MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
> >
> > Philippe Mathieu-Daudé (11):
> >   hw/mips/fuloong2e: Rename PMON BIOS name
> >   hw/mips/fuloong2e: Move code and update a comment
> >   hw/mips/fuloong2e: Fix typo in Fuloong machine name
> >   hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge
> >   hw/pci-host/bonito: Fix DPRINTF() format strings
> >   hw/pci-host/bonito: Map peripheral using physical address
> >   hw/pci-host/bonito: Map all the Bonito64 I/O range
> >   hw/pci-host/bonito: Map the different PCI ranges more detailled
> >   hw/pci-host/bonito: Better describe the I/O CS regions
> >   hw/pci-host/bonito: Set the Config register reset value with
> >     FIELD_DP32
> >   POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset
>
> Thanks, patches 1, 3-11 queued to mips-next after addressing Aleksandar
> comments.
>

Over all, I think you should have sent a new version of the series
rather than starting applying to the queueu.
Philippe, I think you should "unqueue" everything, and start from
scratch you queue.
In future, I think you should coordinate better queuing, possibly in
some separate off-list messages.
Patch 4/12 - does it have r-b?

Patch 9/12 - I don't want to block you r work, but you are making some
missteps that are not good here:

- i did not see how you addressed mu comments
- I didnt give the patch R-b, neither I remember anyone else
- I am against pull request with patches without r-b, if that is the
case with 9/12, and insist on applying the same principle to hw/mips


^ permalink raw reply	[flat|nested] 36+ messages in thread

end of thread, other threads:[~2020-05-26 10:42 UTC | newest]

Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-10 21:01 [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Philippe Mathieu-Daudé
2020-05-10 21:01 ` [PATCH 01/12] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
2020-05-11  5:46   ` Aleksandar Markovic
2020-05-10 21:01 ` [PATCH 02/12] hw/mips/fuloong2e: Rename PMON BIOS name Philippe Mathieu-Daudé
2020-05-11  1:14   ` chen huacai
2020-05-10 21:01 ` [PATCH 03/12] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
2020-05-11  1:15   ` chen huacai
2020-05-10 21:01 ` [PATCH 04/12] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
2020-05-11  1:19   ` chen huacai
2020-05-11  6:21     ` Aleksandar Markovic
2020-05-11  6:38       ` Philippe Mathieu-Daudé
2020-05-11  7:00         ` chen huacai
2020-05-11  8:12           ` Aleksandar Markovic
2020-05-11  8:27             ` Aleksandar Markovic
2020-05-12  8:09               ` Philippe Mathieu-Daudé
2020-05-10 21:01 ` [PATCH 05/12] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
2020-05-11  1:19   ` chen huacai
2020-05-10 21:01 ` [PATCH 06/12] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
2020-05-11  1:20   ` chen huacai
2020-05-10 21:01 ` [PATCH 07/12] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
2020-05-11  5:50   ` Aleksandar Markovic
2020-05-10 21:01 ` [PATCH 08/12] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
2020-05-11  5:51   ` Aleksandar Markovic
2020-05-10 21:01 ` [PATCH 09/12] hw/pci-host/bonito: Map the different PCI ranges more detailled Philippe Mathieu-Daudé
2020-05-11  6:12   ` Aleksandar Markovic
2020-05-11  6:33     ` Philippe Mathieu-Daudé
2020-05-10 21:01 ` [PATCH 10/12] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
2020-05-11  5:53   ` Aleksandar Markovic
2020-05-10 21:01 ` [PATCH 11/12] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 Philippe Mathieu-Daudé
2020-05-11  6:17   ` Aleksandar Markovic
2020-05-11  6:30     ` Philippe Mathieu-Daudé
2020-05-11  7:16       ` Aleksandar Markovic
2020-05-10 21:01 ` [NOTFORMERGE PATCH 12/12] POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset Philippe Mathieu-Daudé
2020-05-11  9:43 ` [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Aleksandar Markovic
2020-05-26  7:47 ` Philippe Mathieu-Daudé
2020-05-26 10:41   ` Aleksandar Markovic

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