From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Hector Martin <marcan@marcan.st> Cc: linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@kernel.org>, Olof Johansson <olof@lixom.net>, Krzysztof Kozlowski <krzk@kernel.org>, Mark Kettenis <mark.kettenis@xs4all.nl>, Tony Lindgren <tony@atomide.com>, Mohamed Mediouni <mohamed.mediouni@caramail.com>, Stan Skowronek <stan@corellium.com>, Alexander Graf <graf@amazon.com>, Will Deacon <will@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Mark Rutland <mark.rutland@arm.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jonathan Corbet <corbet@lwn.net>, Catalin Marinas <catalin.marinas@arm.com>, Christoph Hellwig <hch@infradead.org>, "David S. Miller" <davem@davemloft.net>, devicetree <devicetree@vger.kernel.org>, "open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>, Linux Documentation List <linux-doc@vger.kernel.org>, Linux Samsung SOC <linux-samsung-soc@vger.kernel.org>, Linux-Arch <linux-arch@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Subject: Re: [RFT PATCH v3 16/27] irqchip/apple-aic: Add support for the Apple Interrupt Controller Date: Fri, 5 Mar 2021 17:05:08 +0200 [thread overview] Message-ID: <CAHp75Vco_rcjHJ4THLZ8CJP=yX2fesfAo_tOY8zohfSmTLEVgw@mail.gmail.com> (raw) In-Reply-To: <20210304213902.83903-17-marcan@marcan.st> On Thu, Mar 4, 2021 at 11:41 PM Hector Martin <marcan@marcan.st> wrote: > > This is the root interrupt controller used on Apple ARM SoCs such as the > M1. This irqchip driver performs multiple functions: > > * Handles both IRQs and FIQs > > * Drives the AIC peripheral itself (which handles IRQs) > > * Dispatches FIQs to downstream hard-wired clients (currently the ARM > timer). > > * Implements a virtual IPI multiplexer to funnel multiple Linux IPIs > into a single hardware IPI ... > + * - <0 nr flags> - hwirq #nr > + * - <1 nr flags> - FIQ #nr > + * - nr=0 Physical HV timer > + * - nr=1 Virtual HV timer > + * - nr=2 Physical guest timer > + * - nr=3 Virtual guest timer > + * Unneeded blank line. > + */ ... > +#define pr_fmt(fmt) "%s: " fmt, __func__ This is not needed, really, if you have unique / distinguishable messages in the first place. Rather people include module names, which may be useful. ... > +#define MASK_REG(x) (4 * ((x) >> 5)) > +#define MASK_BIT(x) BIT((x) & 0x1f) GENMASK(4,0) ... > +/* > + * Max 31 bits in IPI SEND register (top bit is self). > + * >=32-core chips will need code changes anyway. > + */ > +#define AIC_MAX_CPUS 31 I would put it as (32 - 1) to show that the register is actually 32-bit long. ... > +static atomic_t aic_vipi_flag[AIC_MAX_CPUS]; > +static atomic_t aic_vipi_enable[AIC_MAX_CPUS]; Isn't it easier to handle these when they are full width, i.e. 32 items per the array? ... > +static int aic_irq_set_affinity(struct irq_data *d, > + const struct cpumask *mask_val, bool force) > +{ > + irq_hw_number_t hwirq = irqd_to_hwirq(d); > + struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); > + int cpu; > + > + if (hwirq > ic->nr_hw) >= ? > + return -EINVAL; > + > + if (force) > + cpu = cpumask_first(mask_val); > + else > + cpu = cpumask_any_and(mask_val, cpu_online_mask); > + > + aic_ic_write(ic, AIC_TARGET_CPU + hwirq * 4, BIT(cpu)); > + irq_data_update_effective_affinity(d, cpumask_of(cpu)); > + > + return IRQ_SET_MASK_OK; > +} ... > +static void aic_fiq_mask(struct irq_data *d) > +{ > + /* Only the guest timers have real mask bits, unfortunately. */ > + switch (d->hwirq) { > + case AIC_TMR_GUEST_PHYS: > + sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_P, 0); > + break; > + case AIC_TMR_GUEST_VIRT: > + sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_V, 0); > + break; default case? // some compilers may not be happy Ditto for all similar places in the series. > + } > +} ... > +#define TIMER_FIRING(x) \ > + (((x) & (ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_MASK | \ > + ARCH_TIMER_CTRL_IT_STAT)) == \ > + (ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_STAT)) It's a bit hard to read. Perhaps #define FOO_MASK (_ENABLE | _STAT) #define _FIRING ... (FOO_MASK | _MASK == FOO_MASK) ? ... > + if ((read_sysreg_s(SYS_APL_PMCR0_EL1) & (PMCR0_IMODE | PMCR0_IACT)) > + == (FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_FIQ) | PMCR0_IACT)) { It's better to have == on the previous line. ... > + for_each_set_bit(i, &firing, AIC_NR_SWIPI) { > + handle_domain_irq(aic_irqc->ipi_domain, i, regs); > + } No {} needed. ... > +static int aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node) > +{ > + int base_ipi; Introducing a temporary variable may help with readability ... *d = irqc->hw_domain; > + irqc->ipi_domain = irq_domain_create_linear(irqc->hw_domain->fwnode, AIC_NR_SWIPI, > + &aic_ipi_domain_ops, irqc); > + if (WARN_ON(!irqc->ipi_domain)) > + return -ENODEV; > + > + irqc->ipi_domain->flags |= IRQ_DOMAIN_FLAG_IPI_SINGLE; > + irq_domain_update_bus_token(irqc->ipi_domain, DOMAIN_BUS_IPI); > + > + base_ipi = __irq_domain_alloc_irqs(irqc->ipi_domain, -1, AIC_NR_SWIPI, > + NUMA_NO_NODE, NULL, false, NULL); > + > + if (WARN_ON(!base_ipi)) { > + irq_domain_remove(irqc->ipi_domain); > + return -ENODEV; > + } > + > + set_smp_ipi_range(base_ipi, AIC_NR_SWIPI); > + > + return 0; > +} ... > + return 0; > + Extra blank line. ... > + irqc->hw_domain = irq_domain_create_linear(of_node_to_fwnode(node), > + irqc->nr_hw + AIC_NR_FIQ, > + &aic_irq_domain_ops, irqc); If you are sure it will be always OF-only, why not to use irq_domain_add_linear()? ... > + for (i = 0; i < BITS_TO_U32(irqc->nr_hw); i++) > + aic_ic_write(irqc, AIC_MASK_SET + i * 4, ~0); > + for (i = 0; i < BITS_TO_U32(irqc->nr_hw); i++) > + aic_ic_write(irqc, AIC_SW_CLR + i * 4, ~0); ~0 is a beast when it suddenly gets into > int size. I would recommend using either GENMASK() if it's a bit field, or type_MAX values if it's a plain number. -- With Best Regards, Andy Shevchenko
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Hector Martin <marcan@marcan.st> Cc: linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@kernel.org>, Olof Johansson <olof@lixom.net>, Krzysztof Kozlowski <krzk@kernel.org>, Mark Kettenis <mark.kettenis@xs4all.nl>, Tony Lindgren <tony@atomide.com>, Mohamed Mediouni <mohamed.mediouni@caramail.com>, Stan Skowronek <stan@corellium.com>, Alexander Graf <graf@amazon.com>, Will Deacon <will@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Mark Rutland <mark.rutland@arm.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jonathan Corbet <corbet@lwn.net>, Catalin Marinas <catalin.marinas@arm.com>, Christoph Hellwig <hch@infradead.org>, "David S. Miller" <davem@davemloft.net>, devicetree <devicetree@vger.kernel.org>, "open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>, Linux Documentation List <linux-doc@vger.kernel.org>, Linux Samsung SOC <linux-samsung-soc@vger.kernel.org>, Linux-Arch <linux-arch@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Subject: Re: [RFT PATCH v3 16/27] irqchip/apple-aic: Add support for the Apple Interrupt Controller Date: Fri, 5 Mar 2021 17:05:08 +0200 [thread overview] Message-ID: <CAHp75Vco_rcjHJ4THLZ8CJP=yX2fesfAo_tOY8zohfSmTLEVgw@mail.gmail.com> (raw) In-Reply-To: <20210304213902.83903-17-marcan@marcan.st> On Thu, Mar 4, 2021 at 11:41 PM Hector Martin <marcan@marcan.st> wrote: > > This is the root interrupt controller used on Apple ARM SoCs such as the > M1. This irqchip driver performs multiple functions: > > * Handles both IRQs and FIQs > > * Drives the AIC peripheral itself (which handles IRQs) > > * Dispatches FIQs to downstream hard-wired clients (currently the ARM > timer). > > * Implements a virtual IPI multiplexer to funnel multiple Linux IPIs > into a single hardware IPI ... > + * - <0 nr flags> - hwirq #nr > + * - <1 nr flags> - FIQ #nr > + * - nr=0 Physical HV timer > + * - nr=1 Virtual HV timer > + * - nr=2 Physical guest timer > + * - nr=3 Virtual guest timer > + * Unneeded blank line. > + */ ... > +#define pr_fmt(fmt) "%s: " fmt, __func__ This is not needed, really, if you have unique / distinguishable messages in the first place. Rather people include module names, which may be useful. ... > +#define MASK_REG(x) (4 * ((x) >> 5)) > +#define MASK_BIT(x) BIT((x) & 0x1f) GENMASK(4,0) ... > +/* > + * Max 31 bits in IPI SEND register (top bit is self). > + * >=32-core chips will need code changes anyway. > + */ > +#define AIC_MAX_CPUS 31 I would put it as (32 - 1) to show that the register is actually 32-bit long. ... > +static atomic_t aic_vipi_flag[AIC_MAX_CPUS]; > +static atomic_t aic_vipi_enable[AIC_MAX_CPUS]; Isn't it easier to handle these when they are full width, i.e. 32 items per the array? ... > +static int aic_irq_set_affinity(struct irq_data *d, > + const struct cpumask *mask_val, bool force) > +{ > + irq_hw_number_t hwirq = irqd_to_hwirq(d); > + struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); > + int cpu; > + > + if (hwirq > ic->nr_hw) >= ? > + return -EINVAL; > + > + if (force) > + cpu = cpumask_first(mask_val); > + else > + cpu = cpumask_any_and(mask_val, cpu_online_mask); > + > + aic_ic_write(ic, AIC_TARGET_CPU + hwirq * 4, BIT(cpu)); > + irq_data_update_effective_affinity(d, cpumask_of(cpu)); > + > + return IRQ_SET_MASK_OK; > +} ... > +static void aic_fiq_mask(struct irq_data *d) > +{ > + /* Only the guest timers have real mask bits, unfortunately. */ > + switch (d->hwirq) { > + case AIC_TMR_GUEST_PHYS: > + sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_P, 0); > + break; > + case AIC_TMR_GUEST_VIRT: > + sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_V, 0); > + break; default case? // some compilers may not be happy Ditto for all similar places in the series. > + } > +} ... > +#define TIMER_FIRING(x) \ > + (((x) & (ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_MASK | \ > + ARCH_TIMER_CTRL_IT_STAT)) == \ > + (ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_STAT)) It's a bit hard to read. Perhaps #define FOO_MASK (_ENABLE | _STAT) #define _FIRING ... (FOO_MASK | _MASK == FOO_MASK) ? ... > + if ((read_sysreg_s(SYS_APL_PMCR0_EL1) & (PMCR0_IMODE | PMCR0_IACT)) > + == (FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_FIQ) | PMCR0_IACT)) { It's better to have == on the previous line. ... > + for_each_set_bit(i, &firing, AIC_NR_SWIPI) { > + handle_domain_irq(aic_irqc->ipi_domain, i, regs); > + } No {} needed. ... > +static int aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node) > +{ > + int base_ipi; Introducing a temporary variable may help with readability ... *d = irqc->hw_domain; > + irqc->ipi_domain = irq_domain_create_linear(irqc->hw_domain->fwnode, AIC_NR_SWIPI, > + &aic_ipi_domain_ops, irqc); > + if (WARN_ON(!irqc->ipi_domain)) > + return -ENODEV; > + > + irqc->ipi_domain->flags |= IRQ_DOMAIN_FLAG_IPI_SINGLE; > + irq_domain_update_bus_token(irqc->ipi_domain, DOMAIN_BUS_IPI); > + > + base_ipi = __irq_domain_alloc_irqs(irqc->ipi_domain, -1, AIC_NR_SWIPI, > + NUMA_NO_NODE, NULL, false, NULL); > + > + if (WARN_ON(!base_ipi)) { > + irq_domain_remove(irqc->ipi_domain); > + return -ENODEV; > + } > + > + set_smp_ipi_range(base_ipi, AIC_NR_SWIPI); > + > + return 0; > +} ... > + return 0; > + Extra blank line. ... > + irqc->hw_domain = irq_domain_create_linear(of_node_to_fwnode(node), > + irqc->nr_hw + AIC_NR_FIQ, > + &aic_irq_domain_ops, irqc); If you are sure it will be always OF-only, why not to use irq_domain_add_linear()? ... > + for (i = 0; i < BITS_TO_U32(irqc->nr_hw); i++) > + aic_ic_write(irqc, AIC_MASK_SET + i * 4, ~0); > + for (i = 0; i < BITS_TO_U32(irqc->nr_hw); i++) > + aic_ic_write(irqc, AIC_SW_CLR + i * 4, ~0); ~0 is a beast when it suddenly gets into > int size. I would recommend using either GENMASK() if it's a bit field, or type_MAX values if it's a plain number. -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-05 15:06 UTC|newest] Thread overview: 275+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-04 21:38 [RFT PATCH v3 00/27] Apple M1 SoC platform bring-up Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 01/27] arm64: Cope with CPUs stuck in VHE mode Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-24 18:05 ` Will Deacon 2021-03-24 18:05 ` Will Deacon 2021-03-24 20:00 ` Marc Zyngier 2021-03-24 20:00 ` Marc Zyngier 2021-03-26 7:54 ` Hector Martin 2021-03-26 7:54 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 02/27] dt-bindings: vendor-prefixes: Add apple prefix Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-08 20:26 ` Rob Herring 2021-03-08 20:26 ` Rob Herring 2021-03-04 21:38 ` [RFT PATCH v3 03/27] dt-bindings: arm: apple: Add bindings for Apple ARM platforms Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:16 ` Linus Walleij 2021-03-05 10:16 ` Linus Walleij 2021-03-08 20:27 ` Rob Herring 2021-03-08 20:27 ` Rob Herring 2021-03-04 21:38 ` [RFT PATCH v3 04/27] dt-bindings: arm: cpus: Add apple,firestorm & icestorm compatibles Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 04/27] dt-bindings: arm: cpus: Add apple, firestorm " Hector Martin 2021-03-08 20:27 ` [RFT PATCH v3 04/27] dt-bindings: arm: cpus: Add apple,firestorm " Rob Herring 2021-03-08 20:27 ` [RFT PATCH v3 04/27] dt-bindings: arm: cpus: Add apple, firestorm " Rob Herring 2021-03-04 21:38 ` [RFT PATCH v3 05/27] arm64: cputype: Add CPU implementor & types for the Apple M1 cores Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-24 18:13 ` Will Deacon 2021-03-24 18:13 ` Will Deacon 2021-03-04 21:38 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm,arch_timer: Add interrupt-names support Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm, arch_timer: " Hector Martin 2021-03-05 10:18 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm,arch_timer: " Linus Walleij 2021-03-05 10:18 ` Linus Walleij 2021-03-08 11:12 ` Marc Zyngier 2021-03-08 11:12 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm, arch_timer: " Marc Zyngier 2021-03-08 17:14 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm,arch_timer: " Tony Lindgren 2021-03-08 17:14 ` Tony Lindgren 2021-03-08 20:38 ` Rob Herring 2021-03-08 20:38 ` Rob Herring 2021-03-08 22:42 ` Marc Zyngier 2021-03-08 22:42 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm, arch_timer: " Marc Zyngier 2021-03-09 16:11 ` [RFT PATCH v3 06/27] dt-bindings: timer: arm,arch_timer: " Rob Herring 2021-03-09 16:11 ` Rob Herring 2021-03-09 20:28 ` Hector Martin 2021-03-09 20:28 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 07/27] arm64: arch_timer: implement support for interrupt-names Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:19 ` Linus Walleij 2021-03-05 10:19 ` Linus Walleij 2021-03-08 11:13 ` Marc Zyngier 2021-03-08 11:13 ` Marc Zyngier 2021-03-04 21:38 ` [RFT PATCH v3 08/27] asm-generic/io.h: Add a non-posted variant of ioremap() Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 14:45 ` Andy Shevchenko 2021-03-05 14:45 ` Andy Shevchenko 2021-03-05 15:19 ` Hector Martin 2021-03-05 15:19 ` Hector Martin 2021-03-08 11:20 ` Marc Zyngier 2021-03-08 11:20 ` Marc Zyngier 2021-03-24 18:12 ` Will Deacon 2021-03-24 18:12 ` Will Deacon 2021-03-24 19:09 ` Arnd Bergmann 2021-03-24 19:09 ` Arnd Bergmann 2021-03-25 14:07 ` Hector Martin 2021-03-25 14:07 ` Hector Martin 2021-03-25 14:49 ` Will Deacon 2021-03-25 14:49 ` Will Deacon 2021-03-04 21:38 ` [RFT PATCH v3 09/27] docs: driver-api: device-io: Document I/O access functions Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:22 ` Linus Walleij 2021-03-05 10:22 ` Linus Walleij 2021-03-04 21:38 ` [RFT PATCH v3 10/27] docs: driver-api: device-io: Document ioremap() variants & access funcs Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:25 ` Linus Walleij 2021-03-05 10:25 ` Linus Walleij 2021-03-05 15:09 ` Andy Shevchenko 2021-03-05 15:09 ` Andy Shevchenko 2021-03-05 15:51 ` Arnd Bergmann 2021-03-05 15:51 ` Arnd Bergmann 2021-03-09 20:29 ` Hector Martin 2021-03-09 20:29 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 11/27] arm64: Implement ioremap_np() to map MMIO as nGnRnE Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-08 11:22 ` Marc Zyngier 2021-03-08 11:22 ` Marc Zyngier 2021-03-24 18:18 ` Will Deacon 2021-03-24 18:18 ` Will Deacon 2021-03-04 21:38 ` [RFT PATCH v3 12/27] of/address: Add infrastructure to declare MMIO as non-posted Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:28 ` Linus Walleij 2021-03-05 10:28 ` Linus Walleij 2021-03-05 15:13 ` Andy Shevchenko 2021-03-05 15:13 ` Andy Shevchenko 2021-03-05 15:55 ` Hector Martin 2021-03-05 15:55 ` Hector Martin 2021-03-05 16:08 ` Andy Shevchenko 2021-03-05 16:08 ` Andy Shevchenko 2021-03-05 16:43 ` Arnd Bergmann 2021-03-05 16:43 ` Arnd Bergmann 2021-03-05 17:19 ` Hector Martin 2021-03-05 17:19 ` Hector Martin 2021-03-05 16:05 ` Rob Herring 2021-03-05 16:05 ` Rob Herring 2021-03-05 17:39 ` Rob Herring 2021-03-05 17:39 ` Rob Herring 2021-03-05 18:18 ` Hector Martin 2021-03-05 18:18 ` Hector Martin 2021-03-05 21:17 ` Arnd Bergmann 2021-03-05 21:17 ` Arnd Bergmann 2021-03-08 15:56 ` Rob Herring 2021-03-08 15:56 ` Rob Herring 2021-03-08 20:29 ` Arnd Bergmann 2021-03-08 20:29 ` Arnd Bergmann 2021-03-08 21:13 ` Rob Herring 2021-03-08 21:13 ` Rob Herring 2021-03-08 21:56 ` Arnd Bergmann 2021-03-08 21:56 ` Arnd Bergmann 2021-03-09 15:48 ` Rob Herring 2021-03-09 15:48 ` Rob Herring 2021-03-09 20:23 ` Hector Martin 2021-03-09 20:23 ` Hector Martin 2021-03-09 22:06 ` Rob Herring 2021-03-09 22:06 ` Rob Herring 2021-03-10 8:26 ` Hector Martin 2021-03-10 8:26 ` Hector Martin 2021-03-10 17:01 ` Rob Herring 2021-03-10 17:01 ` Rob Herring 2021-03-11 9:12 ` Arnd Bergmann 2021-03-11 9:12 ` Arnd Bergmann 2021-03-11 12:11 ` Hector Martin 2021-03-11 12:11 ` Hector Martin 2021-03-11 13:35 ` Arnd Bergmann 2021-03-11 13:35 ` Arnd Bergmann 2021-03-11 16:07 ` Rob Herring 2021-03-11 16:07 ` Rob Herring 2021-03-11 16:48 ` Arnd Bergmann 2021-03-11 16:48 ` Arnd Bergmann 2021-03-11 18:10 ` Rob Herring 2021-03-11 18:10 ` Rob Herring 2021-03-12 10:20 ` Arnd Bergmann 2021-03-12 10:20 ` Arnd Bergmann 2021-03-09 11:14 ` Linus Walleij 2021-03-09 11:14 ` Linus Walleij 2021-03-09 12:41 ` Arnd Bergmann 2021-03-09 12:41 ` Arnd Bergmann 2021-03-09 15:40 ` Linus Walleij 2021-03-09 15:40 ` Linus Walleij 2021-03-04 21:38 ` [RFT PATCH v3 13/27] arm64: Add Apple vendor-specific system registers Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-24 18:38 ` Will Deacon 2021-03-24 18:38 ` Will Deacon 2021-03-24 18:59 ` Mark Rutland 2021-03-24 18:59 ` Mark Rutland 2021-03-24 19:04 ` Will Deacon 2021-03-24 19:04 ` Will Deacon 2021-03-26 6:23 ` Hector Martin 2021-03-26 6:23 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 14/27] arm64: move ICH_ sysreg bits from arm-gic-v3.h to sysreg.h Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-08 11:39 ` Marc Zyngier 2021-03-08 11:39 ` Marc Zyngier 2021-03-24 18:23 ` Will Deacon 2021-03-24 18:23 ` Will Deacon 2021-03-04 21:38 ` [RFT PATCH v3 15/27] dt-bindings: interrupt-controller: Add DT bindings for apple-aic Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-08 21:16 ` Rob Herring 2021-03-08 21:16 ` Rob Herring 2021-03-04 21:38 ` [RFT PATCH v3 16/27] irqchip/apple-aic: Add support for the Apple Interrupt Controller Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 15:05 ` Andy Shevchenko [this message] 2021-03-05 15:05 ` Andy Shevchenko 2021-03-08 11:50 ` Marc Zyngier 2021-03-08 11:50 ` Marc Zyngier 2021-03-08 12:02 ` Andy Shevchenko 2021-03-08 12:02 ` Andy Shevchenko 2021-03-26 13:40 ` Hector Martin 2021-03-26 13:40 ` Hector Martin 2021-03-08 13:31 ` Marc Zyngier 2021-03-08 13:31 ` Marc Zyngier 2021-03-26 7:57 ` Hector Martin 2021-03-26 7:57 ` Hector Martin 2021-03-24 19:57 ` Will Deacon 2021-03-24 19:57 ` Will Deacon 2021-03-26 8:58 ` Hector Martin 2021-03-26 8:58 ` Hector Martin 2021-03-29 12:04 ` Will Deacon 2021-03-29 12:04 ` Will Deacon 2021-04-01 13:16 ` Hector Martin 2021-04-01 13:16 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 17/27] arm64: Kconfig: Introduce CONFIG_ARCH_APPLE Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-08 15:35 ` Marc Zyngier 2021-03-08 15:35 ` Marc Zyngier 2021-03-09 20:30 ` Hector Martin 2021-03-09 20:30 ` Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 18/27] tty: serial: samsung_tty: Separate S3C64XX ops structure Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:30 ` Krzysztof Kozlowski 2021-03-05 10:30 ` Krzysztof Kozlowski 2021-03-04 21:38 ` [RFT PATCH v3 19/27] tty: serial: samsung_tty: Add ucon_mask parameter Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:34 ` Krzysztof Kozlowski 2021-03-05 10:34 ` Krzysztof Kozlowski 2021-03-04 21:38 ` [RFT PATCH v3 20/27] tty: serial: samsung_tty: Add s3c24xx_port_type Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:49 ` Krzysztof Kozlowski 2021-03-05 10:49 ` Krzysztof Kozlowski 2021-03-04 21:38 ` [RFT PATCH v3 21/27] tty: serial: samsung_tty: IRQ rework Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:51 ` Krzysztof Kozlowski 2021-03-05 10:51 ` Krzysztof Kozlowski 2021-03-05 15:17 ` Andy Shevchenko 2021-03-05 15:17 ` Andy Shevchenko 2021-03-05 16:16 ` Hector Martin 2021-03-05 16:16 ` Hector Martin 2021-03-05 16:20 ` Andy Shevchenko 2021-03-05 16:20 ` Andy Shevchenko 2021-03-05 16:29 ` Hector Martin 2021-03-05 16:29 ` Hector Martin 2021-03-07 11:34 ` Krzysztof Kozlowski 2021-03-07 11:34 ` Krzysztof Kozlowski 2021-03-07 16:01 ` Arnd Bergmann 2021-03-07 16:01 ` Arnd Bergmann 2021-03-07 19:51 ` Krzysztof Kozlowski 2021-03-07 19:51 ` Krzysztof Kozlowski 2021-03-04 21:38 ` [RFT PATCH v3 22/27] tty: serial: samsung_tty: Use devm_ioremap_resource Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:54 ` Krzysztof Kozlowski 2021-03-05 10:54 ` Krzysztof Kozlowski 2021-03-05 15:19 ` Andy Shevchenko 2021-03-05 15:19 ` Andy Shevchenko 2021-03-04 21:38 ` [RFT PATCH v3 23/27] dt-bindings: serial: samsung: Add apple,s5l-uart compatible Hector Martin 2021-03-04 21:38 ` [RFT PATCH v3 23/27] dt-bindings: serial: samsung: Add apple, s5l-uart compatible Hector Martin 2021-03-08 21:17 ` [RFT PATCH v3 23/27] dt-bindings: serial: samsung: Add apple,s5l-uart compatible Rob Herring 2021-03-08 21:17 ` Rob Herring 2021-03-04 21:38 ` [RFT PATCH v3 24/27] tty: serial: samsung_tty: Add support for Apple UARTs Hector Martin 2021-03-04 21:38 ` Hector Martin 2021-03-05 10:58 ` Krzysztof Kozlowski 2021-03-05 10:58 ` Krzysztof Kozlowski 2021-03-05 15:28 ` Andy Shevchenko 2021-03-05 15:28 ` Andy Shevchenko 2021-03-05 17:04 ` Hector Martin 2021-03-05 17:04 ` Hector Martin 2021-03-07 11:40 ` Krzysztof Kozlowski 2021-03-07 11:40 ` Krzysztof Kozlowski 2021-03-04 21:39 ` [RFT PATCH v3 25/27] tty: serial: samsung_tty: Add earlycon " Hector Martin 2021-03-04 21:39 ` Hector Martin 2021-03-05 10:55 ` Krzysztof Kozlowski 2021-03-05 10:55 ` Krzysztof Kozlowski 2021-03-10 23:11 ` Linus Walleij 2021-03-10 23:11 ` Linus Walleij 2021-03-04 21:39 ` [RFT PATCH v3 26/27] dt-bindings: display: Add apple,simple-framebuffer Hector Martin 2021-03-04 21:39 ` [RFT PATCH v3 26/27] dt-bindings: display: Add apple, simple-framebuffer Hector Martin 2021-03-08 21:18 ` [RFT PATCH v3 26/27] dt-bindings: display: Add apple,simple-framebuffer Rob Herring 2021-03-08 21:18 ` Rob Herring 2021-03-09 16:37 ` Linus Walleij 2021-03-09 16:37 ` [RFT PATCH v3 26/27] dt-bindings: display: Add apple, simple-framebuffer Linus Walleij 2021-03-09 20:35 ` [RFT PATCH v3 26/27] dt-bindings: display: Add apple,simple-framebuffer Hector Martin 2021-03-09 20:35 ` Hector Martin 2021-03-04 21:39 ` [RFT PATCH v3 27/27] arm64: apple: Add initial Apple Mac mini (M1, 2020) devicetree Hector Martin 2021-03-04 21:39 ` Hector Martin 2021-03-05 11:03 ` Krzysztof Kozlowski 2021-03-05 11:03 ` Krzysztof Kozlowski 2021-03-05 11:14 ` Hector Martin 2021-03-05 11:14 ` Hector Martin 2021-03-05 11:45 ` Krzysztof Kozlowski 2021-03-05 11:45 ` Krzysztof Kozlowski 2021-03-05 15:59 ` Mark Kettenis 2021-03-05 15:59 ` Mark Kettenis 2021-03-05 16:50 ` Hector Martin 2021-03-05 16:50 ` Hector Martin 2021-03-13 20:22 ` Konrad Dybcio 2021-04-05 5:50 ` Hector Martin 2021-04-06 7:14 ` Arnd Bergmann 2021-03-05 10:11 ` [RFT PATCH v3 00/27] Apple M1 SoC platform bring-up Hector Martin 2021-03-05 10:11 ` Hector Martin
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