From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Colin Foster <colin.foster@in-advantage.com> Cc: linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, netdev <netdev@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, devicetree <devicetree@vger.kernel.org>, Terry Bowman <terry.bowman@amd.com>, Vladimir Oltean <vladimir.oltean@nxp.com>, Wolfram Sang <wsa@kernel.org>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, Lars Povlsen <lars.povlsen@microchip.com>, Linus Walleij <linus.walleij@linaro.org>, Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>, Eric Dumazet <edumazet@google.com>, "David S. Miller" <davem@davemloft.net>, Russell King <linux@armlinux.org.uk>, Heiner Kallweit <hkallweit1@gmail.com>, Andrew Lunn <andrew@lunn.ch>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Rob Herring <robh+dt@kernel.org>, Lee Jones <lee.jones@linaro.org>, katie.morris@in-advantage.com Subject: Re: [PATCH v15 mfd 2/9] net: mdio: mscc-miim: add ability to be used in a non-mmio configuration Date: Wed, 3 Aug 2022 13:31:35 +0200 [thread overview] Message-ID: <CAHp75Ve0i4T9vu0Y4BpOX=MWMyV=jognMgwow_Tk4inW=ZyvLQ@mail.gmail.com> (raw) In-Reply-To: <20220803054728.1541104-3-colin.foster@in-advantage.com> On Wed, Aug 3, 2022 at 7:47 AM Colin Foster <colin.foster@in-advantage.com> wrote: > > There are a few Ocelot chips that contain the logic for this bus, but are > controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In > the externally controlled configurations these registers are not > memory-mapped. > > Add support for these non-memory-mapped configurations. FWIW, Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> > Signed-off-by: Colin Foster <colin.foster@in-advantage.com> > Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> > Acked-by: Jakub Kicinski <kuba@kernel.org> > --- > > (No changes since v14) > > v14 > * Add Reviewed and Acked tags > > --- > drivers/net/mdio/mdio-mscc-miim.c | 42 +++++++++---------------------- > 1 file changed, 12 insertions(+), 30 deletions(-) > > diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio-mscc-miim.c > index 08541007b18a..51f68daac152 100644 > --- a/drivers/net/mdio/mdio-mscc-miim.c > +++ b/drivers/net/mdio/mdio-mscc-miim.c > @@ -12,6 +12,7 @@ > #include <linux/iopoll.h> > #include <linux/kernel.h> > #include <linux/mdio/mdio-mscc-miim.h> > +#include <linux/mfd/ocelot.h> > #include <linux/module.h> > #include <linux/of_mdio.h> > #include <linux/phy.h> > @@ -270,44 +271,25 @@ static int mscc_miim_clk_set(struct mii_bus *bus) > > static int mscc_miim_probe(struct platform_device *pdev) > { > - struct regmap *mii_regmap, *phy_regmap = NULL; > struct device_node *np = pdev->dev.of_node; > + struct regmap *mii_regmap, *phy_regmap; > struct device *dev = &pdev->dev; > - void __iomem *regs, *phy_regs; > struct mscc_miim_dev *miim; > - struct resource *res; > struct mii_bus *bus; > int ret; > > - regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); > - if (IS_ERR(regs)) { > - dev_err(dev, "Unable to map MIIM registers\n"); > - return PTR_ERR(regs); > - } > - > - mii_regmap = devm_regmap_init_mmio(dev, regs, &mscc_miim_regmap_config); > - > - if (IS_ERR(mii_regmap)) { > - dev_err(dev, "Unable to create MIIM regmap\n"); > - return PTR_ERR(mii_regmap); > - } > + mii_regmap = ocelot_regmap_from_resource(pdev, 0, > + &mscc_miim_regmap_config); > + if (IS_ERR(mii_regmap)) > + return dev_err_probe(dev, PTR_ERR(mii_regmap), > + "Unable to create MIIM regmap\n"); > > /* This resource is optional */ > - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); > - if (res) { > - phy_regs = devm_ioremap_resource(dev, res); > - if (IS_ERR(phy_regs)) { > - dev_err(dev, "Unable to map internal phy registers\n"); > - return PTR_ERR(phy_regs); > - } > - > - phy_regmap = devm_regmap_init_mmio(dev, phy_regs, > - &mscc_miim_phy_regmap_config); > - if (IS_ERR(phy_regmap)) { > - dev_err(dev, "Unable to create phy register regmap\n"); > - return PTR_ERR(phy_regmap); > - } > - } > + phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1, > + &mscc_miim_phy_regmap_config); > + if (IS_ERR(phy_regmap)) > + return dev_err_probe(dev, PTR_ERR(phy_regmap), > + "Unable to create phy register regmap\n"); > > ret = mscc_miim_setup(dev, &bus, "mscc_miim", mii_regmap, 0); > if (ret < 0) { > -- > 2.25.1 > -- With Best Regards, Andy Shevchenko
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Colin Foster <colin.foster@in-advantage.com> Cc: linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, netdev <netdev@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, devicetree <devicetree@vger.kernel.org>, Terry Bowman <terry.bowman@amd.com>, Vladimir Oltean <vladimir.oltean@nxp.com>, Wolfram Sang <wsa@kernel.org>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, Lars Povlsen <lars.povlsen@microchip.com>, Linus Walleij <linus.walleij@linaro.org>, Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>, Eric Dumazet <edumazet@google.com>, "David S. Miller" <davem@davemloft.net>, Russell King <linux@armlinux.org.uk>, Heiner Kallweit <hkallweit1@gmail.com>, Andrew Lunn <andrew@lunn.ch>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Rob Herring <robh+dt@kernel.org>, Lee Jones <lee.jones@linaro.org>, katie.morris@in-advantage.com Subject: Re: [PATCH v15 mfd 2/9] net: mdio: mscc-miim: add ability to be used in a non-mmio configuration Date: Wed, 3 Aug 2022 13:31:35 +0200 [thread overview] Message-ID: <CAHp75Ve0i4T9vu0Y4BpOX=MWMyV=jognMgwow_Tk4inW=ZyvLQ@mail.gmail.com> (raw) In-Reply-To: <20220803054728.1541104-3-colin.foster@in-advantage.com> On Wed, Aug 3, 2022 at 7:47 AM Colin Foster <colin.foster@in-advantage.com> wrote: > > There are a few Ocelot chips that contain the logic for this bus, but are > controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In > the externally controlled configurations these registers are not > memory-mapped. > > Add support for these non-memory-mapped configurations. FWIW, Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> > Signed-off-by: Colin Foster <colin.foster@in-advantage.com> > Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> > Acked-by: Jakub Kicinski <kuba@kernel.org> > --- > > (No changes since v14) > > v14 > * Add Reviewed and Acked tags > > --- > drivers/net/mdio/mdio-mscc-miim.c | 42 +++++++++---------------------- > 1 file changed, 12 insertions(+), 30 deletions(-) > > diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio-mscc-miim.c > index 08541007b18a..51f68daac152 100644 > --- a/drivers/net/mdio/mdio-mscc-miim.c > +++ b/drivers/net/mdio/mdio-mscc-miim.c > @@ -12,6 +12,7 @@ > #include <linux/iopoll.h> > #include <linux/kernel.h> > #include <linux/mdio/mdio-mscc-miim.h> > +#include <linux/mfd/ocelot.h> > #include <linux/module.h> > #include <linux/of_mdio.h> > #include <linux/phy.h> > @@ -270,44 +271,25 @@ static int mscc_miim_clk_set(struct mii_bus *bus) > > static int mscc_miim_probe(struct platform_device *pdev) > { > - struct regmap *mii_regmap, *phy_regmap = NULL; > struct device_node *np = pdev->dev.of_node; > + struct regmap *mii_regmap, *phy_regmap; > struct device *dev = &pdev->dev; > - void __iomem *regs, *phy_regs; > struct mscc_miim_dev *miim; > - struct resource *res; > struct mii_bus *bus; > int ret; > > - regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); > - if (IS_ERR(regs)) { > - dev_err(dev, "Unable to map MIIM registers\n"); > - return PTR_ERR(regs); > - } > - > - mii_regmap = devm_regmap_init_mmio(dev, regs, &mscc_miim_regmap_config); > - > - if (IS_ERR(mii_regmap)) { > - dev_err(dev, "Unable to create MIIM regmap\n"); > - return PTR_ERR(mii_regmap); > - } > + mii_regmap = ocelot_regmap_from_resource(pdev, 0, > + &mscc_miim_regmap_config); > + if (IS_ERR(mii_regmap)) > + return dev_err_probe(dev, PTR_ERR(mii_regmap), > + "Unable to create MIIM regmap\n"); > > /* This resource is optional */ > - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); > - if (res) { > - phy_regs = devm_ioremap_resource(dev, res); > - if (IS_ERR(phy_regs)) { > - dev_err(dev, "Unable to map internal phy registers\n"); > - return PTR_ERR(phy_regs); > - } > - > - phy_regmap = devm_regmap_init_mmio(dev, phy_regs, > - &mscc_miim_phy_regmap_config); > - if (IS_ERR(phy_regmap)) { > - dev_err(dev, "Unable to create phy register regmap\n"); > - return PTR_ERR(phy_regmap); > - } > - } > + phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1, > + &mscc_miim_phy_regmap_config); > + if (IS_ERR(phy_regmap)) > + return dev_err_probe(dev, PTR_ERR(phy_regmap), > + "Unable to create phy register regmap\n"); > > ret = mscc_miim_setup(dev, &bus, "mscc_miim", mii_regmap, 0); > if (ret < 0) { > -- > 2.25.1 > -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-08-03 11:32 UTC|newest] Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-03 5:47 [PATCH v15 mfd 0/9] add support for VSC7512 control over SPI Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 5:47 ` [PATCH v15 mfd 1/9] mfd: ocelot: add helper to get regmap from a resource Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:31 ` Andy Shevchenko 2022-08-03 11:31 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 2/9] net: mdio: mscc-miim: add ability to be used in a non-mmio configuration Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:31 ` Andy Shevchenko [this message] 2022-08-03 11:31 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 3/9] pinctrl: ocelot: allow pinctrl-ocelot to be loaded as a module Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 4/9] pinctrl: ocelot: add ability to be used in a non-mmio configuration Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 5/9] pinctrl: microchip-sgpio: allow sgpio driver to be used as a module Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 6/9] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 11:32 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 7/9] resource: add define macro for register address resources Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:33 ` Andy Shevchenko 2022-08-03 11:33 ` Andy Shevchenko 2022-08-03 5:47 ` [PATCH v15 mfd 8/9] dt-bindings: mfd: ocelot: add bindings for VSC7512 Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 5:47 ` [PATCH v15 mfd 9/9] mfd: ocelot: add support for the vsc7512 chip via spi Colin Foster 2022-08-03 5:47 ` Colin Foster 2022-08-03 11:45 ` Andy Shevchenko 2022-08-03 11:45 ` Andy Shevchenko 2022-08-03 15:56 ` Colin Foster 2022-08-03 15:56 ` Colin Foster 2022-08-03 17:10 ` Andy Shevchenko 2022-08-03 17:10 ` Andy Shevchenko 2022-08-03 17:31 ` Colin Foster 2022-08-03 17:31 ` Colin Foster 2022-08-05 17:44 ` Colin Foster 2022-08-05 17:44 ` Colin Foster 2022-08-05 17:58 ` Andy Shevchenko 2022-08-05 17:58 ` Andy Shevchenko 2022-08-05 18:07 ` Colin Foster 2022-08-05 18:07 ` Colin Foster 2022-08-05 18:14 ` Andy Shevchenko 2022-08-05 18:14 ` Andy Shevchenko
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