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From: Jintack Lim <jintack@cs.columbia.edu>
To: James Morse <james.morse@arm.com>
Cc: KVM General <kvm@vger.kernel.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	linux@armlinux.org.uk,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [RFC PATCH v2 19/31] KVM: arm64: Describe AT instruction emulation design
Date: Tue, 3 Oct 2017 17:11:34 -0400	[thread overview]
Message-ID: <CAHyh4xgWaPTYn5C-KZKp-wmkCpZ5A--2iemVV5rfG1Opjk1yJw@mail.gmail.com> (raw)
In-Reply-To: <59D3CAF2.2030704@arm.com>

Hi James,

On Tue, Oct 3, 2017 at 1:37 PM, James Morse <james.morse@arm.com> wrote:
> Hi Jintack,
>
> On 03/10/17 04:11, Jintack Lim wrote:
>> This design overview will help to digest the subsequent patches that
>> implement AT instruction emulation.
>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 8d04926..d8728cc 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -1621,6 +1621,72 @@ static bool access_id_aa64mmfr0_el1(struct kvm_vcpu *v,
>>       { SYS_DESC(SYS_SP_EL2), NULL, reset_special, SP_EL2, 0},
>>  };
>>
>> +/*
>> + * AT instruction emulation
>> + *
>> + * We emulate AT instructions executed in the virtual EL2.
>
>> + * Basic strategy for the stage-1 translation emulation is to load proper
>> + * context, which depends on the trapped instruction and the virtual HCR_EL2,
>> + * to the EL1 virtual memory control registers and execute S1E[01] instructions
>> + * in EL2. See below for more detail.
>
> What happens if the guest memory containing some stage1-page-table has been
> unmapped from stage2? (e.g. its swapped to disk).
>
> (there is some background to this: I tried to implement the kvm_translate
> ioctl() using this approach, running 'at s1e1*' from EL2. I ran into problems
> when parts of the guest's stage1 page tables had been unmapped from stage2.)
>
> From memory, I found that the AT instructions would fault-in those pages when
> run from EL1, but when executing the same instruction at EL2 they just failed
> without any hint of which IPA needed mapping in.

I think I haven't encountered this case yet, probably because I
usually don't set a swap partition.

In fact, I couldn't find pseudocode for AT instructions. If you
happened to have one, is that behavior you observed described in ARM
ARM?

Thanks,
Jintack

>
> I can try digging for any left over code if we want to setup a test case for this...
>
>
> Thanks,
>
> James
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
>

WARNING: multiple messages have this Message-ID (diff)
From: Jintack Lim <jintack@cs.columbia.edu>
To: James Morse <james.morse@arm.com>
Cc: KVM General <kvm@vger.kernel.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	linux@armlinux.org.uk,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvmarm@lists.cs.columbia.edu,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH v2 19/31] KVM: arm64: Describe AT instruction emulation design
Date: Tue, 3 Oct 2017 17:11:34 -0400	[thread overview]
Message-ID: <CAHyh4xgWaPTYn5C-KZKp-wmkCpZ5A--2iemVV5rfG1Opjk1yJw@mail.gmail.com> (raw)
In-Reply-To: <59D3CAF2.2030704@arm.com>

Hi James,

On Tue, Oct 3, 2017 at 1:37 PM, James Morse <james.morse@arm.com> wrote:
> Hi Jintack,
>
> On 03/10/17 04:11, Jintack Lim wrote:
>> This design overview will help to digest the subsequent patches that
>> implement AT instruction emulation.
>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 8d04926..d8728cc 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -1621,6 +1621,72 @@ static bool access_id_aa64mmfr0_el1(struct kvm_vcpu *v,
>>       { SYS_DESC(SYS_SP_EL2), NULL, reset_special, SP_EL2, 0},
>>  };
>>
>> +/*
>> + * AT instruction emulation
>> + *
>> + * We emulate AT instructions executed in the virtual EL2.
>
>> + * Basic strategy for the stage-1 translation emulation is to load proper
>> + * context, which depends on the trapped instruction and the virtual HCR_EL2,
>> + * to the EL1 virtual memory control registers and execute S1E[01] instructions
>> + * in EL2. See below for more detail.
>
> What happens if the guest memory containing some stage1-page-table has been
> unmapped from stage2? (e.g. its swapped to disk).
>
> (there is some background to this: I tried to implement the kvm_translate
> ioctl() using this approach, running 'at s1e1*' from EL2. I ran into problems
> when parts of the guest's stage1 page tables had been unmapped from stage2.)
>
> From memory, I found that the AT instructions would fault-in those pages when
> run from EL1, but when executing the same instruction at EL2 they just failed
> without any hint of which IPA needed mapping in.

I think I haven't encountered this case yet, probably because I
usually don't set a swap partition.

In fact, I couldn't find pseudocode for AT instructions. If you
happened to have one, is that behavior you observed described in ARM
ARM?

Thanks,
Jintack

>
> I can try digging for any left over code if we want to setup a test case for this...
>
>
> Thanks,
>
> James
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
>

WARNING: multiple messages have this Message-ID (diff)
From: jintack@cs.columbia.edu (Jintack Lim)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 19/31] KVM: arm64: Describe AT instruction emulation design
Date: Tue, 3 Oct 2017 17:11:34 -0400	[thread overview]
Message-ID: <CAHyh4xgWaPTYn5C-KZKp-wmkCpZ5A--2iemVV5rfG1Opjk1yJw@mail.gmail.com> (raw)
In-Reply-To: <59D3CAF2.2030704@arm.com>

Hi James,

On Tue, Oct 3, 2017 at 1:37 PM, James Morse <james.morse@arm.com> wrote:
> Hi Jintack,
>
> On 03/10/17 04:11, Jintack Lim wrote:
>> This design overview will help to digest the subsequent patches that
>> implement AT instruction emulation.
>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 8d04926..d8728cc 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -1621,6 +1621,72 @@ static bool access_id_aa64mmfr0_el1(struct kvm_vcpu *v,
>>       { SYS_DESC(SYS_SP_EL2), NULL, reset_special, SP_EL2, 0},
>>  };
>>
>> +/*
>> + * AT instruction emulation
>> + *
>> + * We emulate AT instructions executed in the virtual EL2.
>
>> + * Basic strategy for the stage-1 translation emulation is to load proper
>> + * context, which depends on the trapped instruction and the virtual HCR_EL2,
>> + * to the EL1 virtual memory control registers and execute S1E[01] instructions
>> + * in EL2. See below for more detail.
>
> What happens if the guest memory containing some stage1-page-table has been
> unmapped from stage2? (e.g. its swapped to disk).
>
> (there is some background to this: I tried to implement the kvm_translate
> ioctl() using this approach, running 'at s1e1*' from EL2. I ran into problems
> when parts of the guest's stage1 page tables had been unmapped from stage2.)
>
> From memory, I found that the AT instructions would fault-in those pages when
> run from EL1, but when executing the same instruction at EL2 they just failed
> without any hint of which IPA needed mapping in.

I think I haven't encountered this case yet, probably because I
usually don't set a swap partition.

In fact, I couldn't find pseudocode for AT instructions. If you
happened to have one, is that behavior you observed described in ARM
ARM?

Thanks,
Jintack

>
> I can try digging for any left over code if we want to setup a test case for this...
>
>
> Thanks,
>
> James
> _______________________________________________
> kvmarm mailing list
> kvmarm at lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
>

  reply	other threads:[~2017-10-03 21:11 UTC|newest]

Thread overview: 91+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-03  3:10 [RFC PATCH v2 03/31] KVM: arm/arm64: Remove unused params in mmu functions Jintack Lim
2017-10-03  3:10 ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 04/31] KVM: arm/arm64: Abstract stage-2 MMU state into a separate structure Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 05/31] KVM: arm/arm64: Support mmu for the virtual EL2 execution Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 06/31] KVM: arm64: Invalidate virtual EL2 TLB entries when needed Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 07/31] KVM: arm64: Setup vttbr_el2 on each VM entry Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 08/31] KVM: arm/arm64: Make mmu functions non-static Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 09/31] KVM: arm/arm64: Manage mmus for nested VMs Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 10/31] KVM: arm/arm64: Unmap/flush shadow stage 2 page tables Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 11/31] KVM: arm64: Implement nested Stage-2 page table walk logic Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 12/31] KVM: arm/arm64: Handle shadow stage 2 page faults Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 13/31] KVM: arm/arm64: Move kvm_is_write_fault to header file Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 14/31] KVM: arm/arm64: Forward the guest hypervisor's stage 2 permission faults Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 15/31] KVM: arm64: Move system register helper functions around Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 16/31] KVM: arm64: Introduce sys_reg_desc.forward_trap Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10 ` [RFC PATCH v2 17/31] KVM: arm64: Rework the system instruction emulation framework Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:10   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 18/31] KVM: arm64: Enumerate AT and TLBI instructions to emulate Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 19/31] KVM: arm64: Describe AT instruction emulation design Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03 17:37   ` James Morse
2017-10-03 17:37     ` James Morse
2017-10-03 21:11     ` Jintack Lim [this message]
2017-10-03 21:11       ` Jintack Lim
2017-10-03 21:11       ` Jintack Lim
2017-10-04  9:13       ` Marc Zyngier
2017-10-04  9:13         ` Marc Zyngier
2017-10-03  3:11 ` [RFC PATCH v2 20/31] KVM: arm64: Implement AT instruction handling Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 21/31] KVM: arm64: Emulate AT S1E[01] instructions Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 22/31] KVM: arm64: Emulate AT S1E2 instructions Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 23/31] KVM: arm64: Emulate AT S12E[01] instructions Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 24/31] KVM: arm64: Emulate TLBI ALLE2(IS) instruction Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 25/31] KVM: arm64: Emulate TLBI VAE2* instrutions Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 26/31] KVM: arm64: Emulate TLBI ALLE1(IS) Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 27/31] KVM: arm64: Emulate TLBI VMALLS12E1(IS) instruction Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 28/31] KVM: arm64: Emulate TLBI IPAS2E1* instructions Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 29/31] KVM: arm64: Respect the virtual HCR_EL2.AT and NV setting Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 30/31] KVM: arm64: Emulate TLBI instructions accesible from EL1 Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11 ` [RFC PATCH v2 31/31] KVM: arm64: Fixes to toggle_cache for nesting Jintack Lim
2017-10-03  3:11   ` Jintack Lim
2017-10-03  3:11   ` Jintack Lim

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