All of lore.kernel.org
 help / color / mirror / Atom feed
* [ath9k-devel] Transmitter Independent of Receiver
@ 2012-04-26  5:30 J. C. Jones
  2012-04-26  6:03 ` Mohammed Shafi
  2012-05-03 13:33 ` Daniel Smith
  0 siblings, 2 replies; 4+ messages in thread
From: J. C. Jones @ 2012-04-26  5:30 UTC (permalink / raw)
  To: ath9k-devel

Hi All,

I searched in vain for real data sheets (as you all know) for "typical"
Wi-Fi chips to determine which designs permit simultaneous, independent
transmission and reception. For example, the transmitter would be
transmitting at 1mbps on Channel 1, while receiver would be receiving at
11mbps on Channel 11. Does any Atheros architecture allow this? And other
vendors?

TIA,

-Wabbit-

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20120426/48eec9cc/attachment-0001.htm 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [ath9k-devel] Transmitter Independent of Receiver
  2012-04-26  5:30 [ath9k-devel] Transmitter Independent of Receiver J. C. Jones
@ 2012-04-26  6:03 ` Mohammed Shafi
  2012-04-26 21:29   ` Adrian Chadd
  2012-05-03 13:33 ` Daniel Smith
  1 sibling, 1 reply; 4+ messages in thread
From: Mohammed Shafi @ 2012-04-26  6:03 UTC (permalink / raw)
  To: ath9k-devel

On Thu, Apr 26, 2012 at 11:00 AM, J. C. Jones <jaibuduvin@gmail.com> wrote:
> Hi All,
>
> I searched in vain for real data sheets (as you all know) for ?typical?
> Wi-Fi chips to determine which designs permit simultaneous, independent
> transmission and reception. For example, the transmitter would be
> transmitting at 1mbps on Channel 1, while receiver would be receiving at
> 11mbps on Channel 11. Does any Atheros architecture allow this? And other
> vendors?

no. not sure if there is something. some time between tx and rx thats
what i heard

>
> TIA,
>
> -Wabbit-
>
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>



-- 
thanks,
shafi

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [ath9k-devel] Transmitter Independent of Receiver
  2012-04-26  6:03 ` Mohammed Shafi
@ 2012-04-26 21:29   ` Adrian Chadd
  0 siblings, 0 replies; 4+ messages in thread
From: Adrian Chadd @ 2012-04-26 21:29 UTC (permalink / raw)
  To: ath9k-devel

No, there's one radio and it's tuned for both TX and RX.



adrian

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [ath9k-devel] Transmitter Independent of Receiver
  2012-04-26  5:30 [ath9k-devel] Transmitter Independent of Receiver J. C. Jones
  2012-04-26  6:03 ` Mohammed Shafi
@ 2012-05-03 13:33 ` Daniel Smith
  1 sibling, 0 replies; 4+ messages in thread
From: Daniel Smith @ 2012-05-03 13:33 UTC (permalink / raw)
  To: ath9k-devel

On Thu, Apr 26, 2012 at 1:30 AM, J. C. Jones <jaibuduvin@gmail.com> wrote:
> Hi All,
>
> I searched in vain for real data sheets (as you all know) for ?typical?
> Wi-Fi chips to determine which designs permit simultaneous, independent
> transmission and reception. For example, the transmitter would be
> transmitting at 1mbps on Channel 1, while receiver would be receiving at
> 11mbps on Channel 11. Does any Atheros architecture allow this? And other
> vendors?

You may want to take a look at RedPine Signal's Maxi-Fi? BEAM450?
(http://redpinesignals.com/Products/Chipsets/beam450.html). Claims to
be a 3x3:3 dual band that you can split into a simultaneous 2x2:2 and
1x1:1.

v/r
Daniel Smith

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2012-05-03 13:33 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-04-26  5:30 [ath9k-devel] Transmitter Independent of Receiver J. C. Jones
2012-04-26  6:03 ` Mohammed Shafi
2012-04-26 21:29   ` Adrian Chadd
2012-05-03 13:33 ` Daniel Smith

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.