From: Guo Ren <guoren@kernel.org> To: Arnd Bergmann <arnd@arndb.de> Cc: Waiman Long <longman@redhat.com>, Palmer Dabbelt <palmer@rivosinc.com>, Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>, Boqun Feng <boqun.feng@gmail.com>, linux-riscv <linux-riscv@lists.infradead.org>, linux-arch <linux-arch@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Guo Ren <guoren@linux.alibaba.com>, Peter Zijlstra <peterz@infradead.org> Subject: Re: [PATCH V7 4/5] asm-generic: spinlock: Add combo spinlock (ticket & queued) Date: Fri, 1 Jul 2022 20:18:26 +0800 [thread overview] Message-ID: <CAJF2gTQLqN2QnHYyPMx91vraR3cOhf2DOnnC3=5C18ACU32Qaw@mail.gmail.com> (raw) In-Reply-To: <CAK8P3a3GiMgEJdBg5QQHHD0bDnpR0XwPkAw7=zT7ETzf6-sCmg@mail.gmail.com> On Wed, Jun 29, 2022 at 4:30 PM Arnd Bergmann <arnd@arndb.de> wrote: > > On Wed, Jun 29, 2022 at 10:24 AM Guo Ren <guoren@kernel.org> wrote: > > On Wed, Jun 29, 2022 at 3:09 PM Arnd Bergmann <arnd@arndb.de> wrote: > > > On Wed, Jun 29, 2022 at 3:34 AM Waiman Long <longman@redhat.com> wrote: > > > > > > From looking at the header file dependencies on arm64, I know that > > > putting jump labels into core infrastructure like the arch_spin_lock() > > > makes a big mess of indirect includes and measurably slows down > > > the kernel build. > > arm64 needn't combo spinlock, it could use pure qspinlock with keeping > > current header files included. > > arm64 has a different problem: there are two separate sets of atomic > instructions, and the decision between those is similarly done using > jump labels. I definitely like the ability to choose between qspinlock > and ticket spinlock on arm64 as well. This can be done as a > compile-time choice, but both of them still depend on jump labels. 1. xchg use ALTERNATIVE, but cmpxchg to jump labels. 2. arm64 is still using qspinlock when ll/sc, and I think they give strong enough fwd guarantee with "prfm pstl1strm". But another question is if ll/sc could give enough strong fwd guarantee, why arm64 introduce LSE, for code size reduction? Why instructions fusion technology is not enough? > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
WARNING: multiple messages have this Message-ID (diff)
From: Guo Ren <guoren@kernel.org> To: Arnd Bergmann <arnd@arndb.de> Cc: Waiman Long <longman@redhat.com>, Palmer Dabbelt <palmer@rivosinc.com>, Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>, Boqun Feng <boqun.feng@gmail.com>, linux-riscv <linux-riscv@lists.infradead.org>, linux-arch <linux-arch@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Guo Ren <guoren@linux.alibaba.com>, Peter Zijlstra <peterz@infradead.org> Subject: Re: [PATCH V7 4/5] asm-generic: spinlock: Add combo spinlock (ticket & queued) Date: Fri, 1 Jul 2022 20:18:26 +0800 [thread overview] Message-ID: <CAJF2gTQLqN2QnHYyPMx91vraR3cOhf2DOnnC3=5C18ACU32Qaw@mail.gmail.com> (raw) In-Reply-To: <CAK8P3a3GiMgEJdBg5QQHHD0bDnpR0XwPkAw7=zT7ETzf6-sCmg@mail.gmail.com> On Wed, Jun 29, 2022 at 4:30 PM Arnd Bergmann <arnd@arndb.de> wrote: > > On Wed, Jun 29, 2022 at 10:24 AM Guo Ren <guoren@kernel.org> wrote: > > On Wed, Jun 29, 2022 at 3:09 PM Arnd Bergmann <arnd@arndb.de> wrote: > > > On Wed, Jun 29, 2022 at 3:34 AM Waiman Long <longman@redhat.com> wrote: > > > > > > From looking at the header file dependencies on arm64, I know that > > > putting jump labels into core infrastructure like the arch_spin_lock() > > > makes a big mess of indirect includes and measurably slows down > > > the kernel build. > > arm64 needn't combo spinlock, it could use pure qspinlock with keeping > > current header files included. > > arm64 has a different problem: there are two separate sets of atomic > instructions, and the decision between those is similarly done using > jump labels. I definitely like the ability to choose between qspinlock > and ticket spinlock on arm64 as well. This can be done as a > compile-time choice, but both of them still depend on jump labels. 1. xchg use ALTERNATIVE, but cmpxchg to jump labels. 2. arm64 is still using qspinlock when ll/sc, and I think they give strong enough fwd guarantee with "prfm pstl1strm". But another question is if ll/sc could give enough strong fwd guarantee, why arm64 introduce LSE, for code size reduction? Why instructions fusion technology is not enough? > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-07-01 12:18 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-28 8:17 [PATCH V7 0/5] riscv: Add qspinlock support with combo style guoren 2022-06-28 8:17 ` guoren 2022-06-28 8:17 ` [PATCH V7 1/5] asm-generic: ticket-lock: Remove unnecessary atomic_read guoren 2022-06-28 8:17 ` guoren 2022-06-28 18:05 ` Waiman Long 2022-06-28 18:05 ` Waiman Long 2022-06-29 2:12 ` Guo Ren 2022-06-29 2:12 ` Guo Ren 2022-06-29 8:27 ` David Laight 2022-06-29 8:27 ` David Laight 2022-07-01 15:18 ` Guo Ren 2022-07-01 15:18 ` Guo Ren 2022-07-04 9:52 ` Peter Zijlstra 2022-07-04 9:52 ` Peter Zijlstra 2022-07-04 11:10 ` Guo Ren 2022-07-04 11:10 ` Guo Ren 2022-06-28 8:17 ` [PATCH V7 2/5] asm-generic: ticket-lock: Use the same struct definitions with qspinlock guoren 2022-06-28 8:17 ` guoren 2022-06-28 8:17 ` [PATCH V7 3/5] asm-generic: ticket-lock: Move into ticket_spinlock.h guoren 2022-06-28 8:17 ` guoren 2022-06-28 8:17 ` [PATCH V7 4/5] asm-generic: spinlock: Add combo spinlock (ticket & queued) guoren 2022-06-28 8:17 ` guoren 2022-06-28 18:13 ` Waiman Long 2022-06-28 18:13 ` Waiman Long 2022-06-29 1:17 ` Guo Ren 2022-06-29 1:17 ` Guo Ren 2022-06-29 1:34 ` Waiman Long 2022-06-29 1:34 ` Waiman Long 2022-06-29 2:29 ` Guo Ren 2022-06-29 2:29 ` Guo Ren 2022-06-29 7:08 ` Arnd Bergmann 2022-06-29 7:08 ` Arnd Bergmann 2022-06-29 8:24 ` Guo Ren 2022-06-29 8:24 ` Guo Ren 2022-06-29 8:29 ` Arnd Bergmann 2022-06-29 8:29 ` Arnd Bergmann 2022-07-01 12:18 ` Guo Ren [this message] 2022-07-01 12:18 ` Guo Ren 2022-06-29 12:53 ` Waiman Long 2022-06-29 12:53 ` Waiman Long 2022-07-04 9:57 ` Peter Zijlstra 2022-07-04 9:57 ` Peter Zijlstra 2022-07-04 13:13 ` Guo Ren 2022-07-04 13:13 ` Guo Ren 2022-07-04 13:45 ` Peter Zijlstra 2022-07-04 13:45 ` Peter Zijlstra 2022-06-28 8:17 ` [PATCH V7 5/5] riscv: Add qspinlock support guoren 2022-06-28 8:17 ` guoren
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