From: Guo Ren <guoren@kernel.org>
To: Greentime Hu <greentime.hu@sifive.com>
Cc: Guo Ren <guoren@linux.alibaba.com>,
Vincent Chen <vincent.chen@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Oleg Nesterov <oleg@redhat.com>
Subject: Re: [RFC PATCH v4 05/13] riscv: Add new csr defines related to vector extension
Date: Mon, 1 Jun 2020 16:59:47 +0800 [thread overview]
Message-ID: <CAJF2gTRk3hUmqOb4dhCWhLZq6tznwVLWGe5M4jY4D+DS+P6vNQ@mail.gmail.com> (raw)
In-Reply-To: <CAHCEeh+d+ya6+Xrh8hdWVSGo2kk_rZ8PV2eMM-2LLaOojAaBtQ@mail.gmail.com>
On Mon, Jun 1, 2020 at 4:15 PM Greentime Hu <greentime.hu@sifive.com> wrote:
>
> Guo Ren <guoren@kernel.org> 於 2020年5月31日 週日 上午9:56寫道：
> >
> > Hi Greentime,
> >
> > Why remove vxrm and xstat ?
> >
> > > Appendix B: Calling Convention
> > > In the RISC-V psABI, the vector registers v0-v31 are all caller-saved. The vstart, vl, and vtype CSRs are also caller-saved.
> > > The vxrm and vxsat fields have thread storage duration.
> >
> Hi Guo,
>
> https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#vector-control-and-status-register-vcsr
> "The vxrm and vxsat separate CSRs can also be accessed via fields in
> the vector control and status CSR, vcsr."
>
> Since vcsr will save all these information, I think it should be ok to
> save vcsr only.
Got it, it's similar with fcsr & frm & fflags.
Acked-by: Guo Ren <guoren@kernel.org>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
WARNING: multiple messages have this Message-ID (diff)
From: Guo Ren <guoren@kernel.org>
To: Greentime Hu <greentime.hu@sifive.com>
Cc: Guo Ren <guoren@linux.alibaba.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Oleg Nesterov <oleg@redhat.com>,
Vincent Chen <vincent.chen@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-riscv <linux-riscv@lists.infradead.org>
Subject: Re: [RFC PATCH v4 05/13] riscv: Add new csr defines related to vector extension
Date: Mon, 1 Jun 2020 16:59:47 +0800 [thread overview]
Message-ID: <CAJF2gTRk3hUmqOb4dhCWhLZq6tznwVLWGe5M4jY4D+DS+P6vNQ@mail.gmail.com> (raw)
In-Reply-To: <CAHCEeh+d+ya6+Xrh8hdWVSGo2kk_rZ8PV2eMM-2LLaOojAaBtQ@mail.gmail.com>
On Mon, Jun 1, 2020 at 4:15 PM Greentime Hu <greentime.hu@sifive.com> wrote:
>
> Guo Ren <guoren@kernel.org> 於 2020年5月31日 週日 上午9:56寫道：
> >
> > Hi Greentime,
> >
> > Why remove vxrm and xstat ?
> >
> > > Appendix B: Calling Convention
> > > In the RISC-V psABI, the vector registers v0-v31 are all caller-saved. The vstart, vl, and vtype CSRs are also caller-saved.
> > > The vxrm and vxsat fields have thread storage duration.
> >
> Hi Guo,
>
> https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#vector-control-and-status-register-vcsr
> "The vxrm and vxsat separate CSRs can also be accessed via fields in
> the vector control and status CSR, vcsr."
>
> Since vcsr will save all these information, I think it should be ok to
> save vcsr only.
Got it, it's similar with fcsr & frm & fflags.
Acked-by: Guo Ren <guoren@kernel.org>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
next prev parent reply other threads:[~2020-06-01 9:00 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 7:02 [RFC PATCH v4 00/13] riscv: Add vector ISA support Greentime Hu
2020-05-26 7:02 ` [RFC PATCH v4 01/13] ptrace: Use regset_size() for dynamic regset size Greentime Hu
2020-05-26 14:00 ` Oleg Nesterov
2020-05-26 14:00 ` Oleg Nesterov
2020-05-27 6:34 ` Greentime Hu
2020-05-27 6:34 ` Greentime Hu
2020-05-27 11:31 ` Oleg Nesterov
2020-05-27 11:31 ` Oleg Nesterov
2020-05-26 7:02 ` [RFC PATCH v4 02/13] riscv: Separate patch for cflags and aflags Greentime Hu
2020-05-26 7:02 ` [RFC PATCH v4 03/13] riscv: Rename __switch_to_aux -> fpu Greentime Hu
2020-05-26 7:02 ` [RFC PATCH v4 04/13] riscv: Extending cpufeature.c to detect V-extension Greentime Hu
2020-05-26 7:02 ` [RFC PATCH v4 05/13] riscv: Add new csr defines related to vector extension Greentime Hu
2020-05-31 1:56 ` Guo Ren
2020-05-31 1:56 ` Guo Ren
2020-06-01 8:15 ` Greentime Hu
2020-06-01 8:15 ` Greentime Hu
2020-06-01 8:59 ` Guo Ren [this message]
2020-06-01 8:59 ` Guo Ren
2020-06-01 9:03 ` Guo Ren
2020-06-01 9:03 ` Guo Ren
2020-05-26 7:02 ` [RFC PATCH v4 06/13] riscv: Add vector feature to compile Greentime Hu
2020-05-26 7:02 ` [RFC PATCH v4 07/13] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu
2020-05-31 0:58 ` Guo Ren
2020-05-31 0:58 ` Guo Ren
2020-06-01 8:07 ` Greentime Hu
2020-06-01 8:07 ` Greentime Hu
2020-06-01 9:13 ` Guo Ren
2020-06-01 9:13 ` Guo Ren
2020-05-26 7:02 ` [RFC PATCH v4 08/13] riscv: Reset vector register Greentime Hu
2020-05-26 7:02 ` [RFC PATCH v4 09/13] riscv: Add vector struct and assembler definitions Greentime Hu
2020-06-01 9:12 ` Guo Ren
2020-06-01 9:12 ` Guo Ren
2020-05-26 7:02 ` [RFC PATCH v4 10/13] riscv: Add task switch support for vector Greentime Hu
2020-05-31 15:29 ` Guo Ren
2020-05-31 15:29 ` Guo Ren
2020-05-31 16:08 ` Guo Ren
2020-05-31 16:08 ` Guo Ren
2020-06-01 9:12 ` Guo Ren
2020-06-01 9:12 ` Guo Ren
2020-05-26 7:02 ` [RFC PATCH v4 11/13] riscv: Add ptrace vector support Greentime Hu
2020-06-01 9:14 ` Guo Ren
2020-06-01 9:14 ` Guo Ren
2020-05-26 7:02 ` [RFC PATCH v4 12/13] riscv: Add sigcontext save/restore for vector Greentime Hu
2020-05-31 15:28 ` Guo Ren
2020-05-31 15:28 ` Guo Ren
2020-06-01 9:13 ` Guo Ren
2020-06-01 9:13 ` Guo Ren
2020-05-26 7:02 ` [RFC PATCH v4 13/13] riscv: signal: Report signal frame size to userspace via auxv Greentime Hu
2020-05-31 15:52 ` [RFC PATCH v4 00/13] riscv: Add vector ISA support Guo Ren
2020-05-31 15:52 ` Guo Ren
2020-06-02 2:21 ` Greentime Hu
2020-06-02 2:21 ` Greentime Hu
2020-06-02 3:08 ` Guo Ren
2020-06-02 3:08 ` Guo Ren
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAJF2gTRk3hUmqOb4dhCWhLZq6tznwVLWGe5M4jY4D+DS+P6vNQ@mail.gmail.com \
--to=guoren@kernel.org \
--cc=greentime.hu@sifive.com \
--cc=guoren@linux.alibaba.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=oleg@redhat.com \
--cc=palmerdabbelt@google.com \
--cc=paul.walmsley@sifive.com \
--cc=vincent.chen@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.