From: "Clément Péron" <peron.clem@gmail.com> To: kbuild test robot <lkp@intel.com> Cc: kbuild-all@lists.01.org, "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Rob Herring" <robh+dt@kernel.org>, "Mark Rutland" <mark.rutland@arm.com>, "Maxime Ripard" <mripard@kernel.org>, "Chen-Yu Tsai" <wens@csie.org>, linux-pwm@vger.kernel.org, devicetree <devicetree@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org>, "Jernej Skrabec" <jernej.skrabec@siol.net> Subject: Re: [PATCH v2 4/7] pwm: sun4i: Add support to output source clock directly Date: Sun, 3 Nov 2019 23:41:29 +0100 [thread overview] Message-ID: <CAJiuCcd-uBAuCNk36iRKNP9F7162tZScWX2aPDVxyYiHMuo1Fw@mail.gmail.com> (raw) In-Reply-To: <201911040602.AEBKHjBk%lkp@intel.com> Hi, On Sun, 3 Nov 2019 at 23:30, kbuild test robot <lkp@intel.com> wrote: > > Hi "Clément, > > I love your patch! Yet something to improve: > > [auto build test ERROR on sunxi/sunxi/for-next] > [also build test ERROR on v5.4-rc5 next-20191031] > [if your patch is applied to the wrong git tree, please drop us a note to help > improve the system. BTW, we also suggest to use '--base' option to specify the > base tree in git format-patch, please see https://stackoverflow.com/a/37406982] > > url: https://github.com/0day-ci/linux/commits/Cl-ment-P-ron/Add-support-for-H6-PWM/20191104-043621 > base: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git sunxi/for-next > config: riscv-allmodconfig (attached as .config) > compiler: riscv64-linux-gcc (GCC) 7.4.0 > reproduce: > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > GCC_VERSION=7.4.0 make.cross ARCH=riscv > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot <lkp@intel.com> > > All errors (new ones prefixed by >>): > > drivers//pwm/pwm-sun4i.c: In function 'sun4i_pwm_get_state': > >> drivers//pwm/pwm-sun4i.c:132:6: error: 'data' undeclared (first use in this function) > data->has_direct_mod_clk_output) { > ^~~~ Arg, bad last minute indent fix : This should be "sun4i_pwm->data->has_direct_mod_clk_output" Sorry for that, Clément > drivers//pwm/pwm-sun4i.c:132:6: note: each undeclared identifier is reported only once for each function it appears in > > vim +/data +132 drivers//pwm/pwm-sun4i.c > > 112 > 113 static void sun4i_pwm_get_state(struct pwm_chip *chip, > 114 struct pwm_device *pwm, > 115 struct pwm_state *state) > 116 { > 117 struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip); > 118 u64 clk_rate, tmp; > 119 u32 val; > 120 unsigned int prescaler; > 121 > 122 clk_rate = clk_get_rate(sun4i_pwm->clk); > 123 > 124 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); > 125 > 126 /* > 127 * PWM chapter in H6 manual has a diagram which explains that if bypass > 128 * bit is set, no other setting has any meaning. Even more, experiment > 129 * proved that also enable bit is ignored in this case. > 130 */ > 131 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) && > > 132 data->has_direct_mod_clk_output) { > 133 state->period = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, clk_rate); > 134 state->duty_cycle = state->period / 2; > 135 state->polarity = PWM_POLARITY_NORMAL; > 136 state->enabled = true; > 137 return; > 138 } > 139 > 140 if ((PWM_REG_PRESCAL(val, pwm->hwpwm) == PWM_PRESCAL_MASK) && > 141 sun4i_pwm->data->has_prescaler_bypass) > 142 prescaler = 1; > 143 else > 144 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)]; > 145 > 146 if (prescaler == 0) > 147 return; > 148 > 149 if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm)) > 150 state->polarity = PWM_POLARITY_NORMAL; > 151 else > 152 state->polarity = PWM_POLARITY_INVERSED; > 153 > 154 if ((val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) == > 155 BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) > 156 state->enabled = true; > 157 else > 158 state->enabled = false; > 159 > 160 val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm)); > 161 > 162 tmp = prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); > 163 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); > 164 > 165 tmp = prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); > 166 state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); > 167 } > 168 > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Péron" <peron.clem@gmail.com> To: kbuild test robot <lkp@intel.com> Cc: "Mark Rutland" <mark.rutland@arm.com>, linux-pwm@vger.kernel.org, "Jernej Skrabec" <jernej.skrabec@siol.net>, kbuild-all@lists.01.org, devicetree <devicetree@vger.kernel.org>, linux-kernel <linux-kernel@vger.kernel.org>, "Maxime Ripard" <mripard@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Chen-Yu Tsai" <wens@csie.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v2 4/7] pwm: sun4i: Add support to output source clock directly Date: Sun, 3 Nov 2019 23:41:29 +0100 [thread overview] Message-ID: <CAJiuCcd-uBAuCNk36iRKNP9F7162tZScWX2aPDVxyYiHMuo1Fw@mail.gmail.com> (raw) In-Reply-To: <201911040602.AEBKHjBk%lkp@intel.com> Hi, On Sun, 3 Nov 2019 at 23:30, kbuild test robot <lkp@intel.com> wrote: > > Hi "Clément, > > I love your patch! Yet something to improve: > > [auto build test ERROR on sunxi/sunxi/for-next] > [also build test ERROR on v5.4-rc5 next-20191031] > [if your patch is applied to the wrong git tree, please drop us a note to help > improve the system. BTW, we also suggest to use '--base' option to specify the > base tree in git format-patch, please see https://stackoverflow.com/a/37406982] > > url: https://github.com/0day-ci/linux/commits/Cl-ment-P-ron/Add-support-for-H6-PWM/20191104-043621 > base: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git sunxi/for-next > config: riscv-allmodconfig (attached as .config) > compiler: riscv64-linux-gcc (GCC) 7.4.0 > reproduce: > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > GCC_VERSION=7.4.0 make.cross ARCH=riscv > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot <lkp@intel.com> > > All errors (new ones prefixed by >>): > > drivers//pwm/pwm-sun4i.c: In function 'sun4i_pwm_get_state': > >> drivers//pwm/pwm-sun4i.c:132:6: error: 'data' undeclared (first use in this function) > data->has_direct_mod_clk_output) { > ^~~~ Arg, bad last minute indent fix : This should be "sun4i_pwm->data->has_direct_mod_clk_output" Sorry for that, Clément > drivers//pwm/pwm-sun4i.c:132:6: note: each undeclared identifier is reported only once for each function it appears in > > vim +/data +132 drivers//pwm/pwm-sun4i.c > > 112 > 113 static void sun4i_pwm_get_state(struct pwm_chip *chip, > 114 struct pwm_device *pwm, > 115 struct pwm_state *state) > 116 { > 117 struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip); > 118 u64 clk_rate, tmp; > 119 u32 val; > 120 unsigned int prescaler; > 121 > 122 clk_rate = clk_get_rate(sun4i_pwm->clk); > 123 > 124 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); > 125 > 126 /* > 127 * PWM chapter in H6 manual has a diagram which explains that if bypass > 128 * bit is set, no other setting has any meaning. Even more, experiment > 129 * proved that also enable bit is ignored in this case. > 130 */ > 131 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) && > > 132 data->has_direct_mod_clk_output) { > 133 state->period = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, clk_rate); > 134 state->duty_cycle = state->period / 2; > 135 state->polarity = PWM_POLARITY_NORMAL; > 136 state->enabled = true; > 137 return; > 138 } > 139 > 140 if ((PWM_REG_PRESCAL(val, pwm->hwpwm) == PWM_PRESCAL_MASK) && > 141 sun4i_pwm->data->has_prescaler_bypass) > 142 prescaler = 1; > 143 else > 144 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)]; > 145 > 146 if (prescaler == 0) > 147 return; > 148 > 149 if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm)) > 150 state->polarity = PWM_POLARITY_NORMAL; > 151 else > 152 state->polarity = PWM_POLARITY_INVERSED; > 153 > 154 if ((val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) == > 155 BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) > 156 state->enabled = true; > 157 else > 158 state->enabled = false; > 159 > 160 val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm)); > 161 > 162 tmp = prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); > 163 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); > 164 > 165 tmp = prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); > 166 state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); > 167 } > 168 > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-11-03 22:41 UTC|newest] Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-03 20:33 [PATCH v2 0/7] Add support for H6 PWM Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-03 20:33 ` [PATCH v2 1/7] dt-bindings: pwm: allwinner: Add H6 PWM description Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-04 8:03 ` Uwe Kleine-König 2019-11-04 8:03 ` Uwe Kleine-König 2019-11-04 17:49 ` Clément Péron 2019-11-04 17:49 ` Clément Péron 2019-11-05 11:11 ` Maxime Ripard 2019-11-05 11:11 ` Maxime Ripard 2019-11-05 12:34 ` Clément Péron 2019-11-05 12:34 ` Clément Péron 2019-11-05 17:32 ` Maxime Ripard 2019-11-05 17:32 ` Maxime Ripard 2019-11-06 9:25 ` Clément Péron 2019-11-06 9:25 ` Clément Péron 2019-11-03 20:33 ` [PATCH v2 2/7] pwm: sun4i: Add an optional probe for reset line Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-04 8:11 ` Uwe Kleine-König 2019-11-04 8:11 ` Uwe Kleine-König 2019-11-04 17:50 ` Clément Péron 2019-11-04 17:50 ` Clément Péron 2019-11-05 7:01 ` Philipp Zabel 2019-11-05 7:01 ` Philipp Zabel 2019-11-05 13:03 ` Clément Péron 2019-11-05 13:03 ` Clément Péron 2019-11-03 20:33 ` [PATCH v2 3/7] pwm: sun4i: Add an optional probe for bus clock Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-04 8:24 ` Uwe Kleine-König 2019-11-04 8:24 ` Uwe Kleine-König 2019-11-04 18:07 ` Clément Péron 2019-11-04 18:07 ` Clément Péron 2019-11-04 20:10 ` Uwe Kleine-König 2019-11-04 20:10 ` Uwe Kleine-König 2019-11-04 20:10 ` Uwe Kleine-König 2019-11-04 20:19 ` Jernej Škrabec 2019-11-04 20:19 ` Jernej Škrabec 2019-11-04 20:27 ` Clément Péron 2019-11-04 20:27 ` Clément Péron 2019-11-04 20:38 ` Jernej Škrabec 2019-11-04 20:38 ` Jernej Škrabec 2019-11-03 20:33 ` [PATCH v2 4/7] pwm: sun4i: Add support to output source clock directly Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-03 22:30 ` kbuild test robot 2019-11-03 22:30 ` kbuild test robot 2019-11-03 22:30 ` kbuild test robot 2019-11-03 22:30 ` kbuild test robot 2019-11-03 22:41 ` Clément Péron [this message] 2019-11-03 22:41 ` Clément Péron 2019-11-03 22:58 ` kbuild test robot 2019-11-03 22:58 ` kbuild test robot 2019-11-03 22:58 ` kbuild test robot 2019-11-03 22:58 ` kbuild test robot 2019-11-04 8:38 ` Uwe Kleine-König 2019-11-04 8:38 ` Uwe Kleine-König 2019-11-04 21:28 ` Clément Péron 2019-11-04 21:28 ` Clément Péron 2019-11-05 7:29 ` Uwe Kleine-König 2019-11-05 7:29 ` Uwe Kleine-König 2019-11-05 12:58 ` Clément Péron 2019-11-05 12:58 ` Clément Péron 2019-11-05 13:12 ` Uwe Kleine-König 2019-11-05 13:12 ` Uwe Kleine-König 2019-11-05 13:12 ` Clément Péron 2019-11-05 13:12 ` Clément Péron 2019-11-03 20:33 ` [PATCH v2 5/7] pwm: sun4i: Add support for H6 PWM Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-03 20:33 ` [PATCH v2 6/7] arm64: dts: allwinner: h6: Add PWM node Clément Péron 2019-11-03 20:33 ` Clément Péron 2019-11-03 20:33 ` [PATCH v2 7/7] [DO NOT MERGE] arm64: allwinner: h6: enable Beelink GS1 PWM Clément Péron 2019-11-03 20:33 ` Clément Péron
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