From: Arnd Bergmann <arnd@kernel.org> To: Mohamed Mediouni <mohamed.mediouni@caramail.com> Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>, Mark Rutland <mark.rutland@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Hector Martin <marcan@marcan.st>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>, Stan Skowronek <stan@corellium.com> Subject: Re: [RFC PATCH 7/7] irqchip/apple-aic: add SMP support to the Apple AIC driver. Date: Thu, 21 Jan 2021 13:44:17 +0100 [thread overview] Message-ID: <CAK8P3a1qeVxTxZXpfMe70zpPCSBrTOz23ZTR=PHgw0PP9GUvbw@mail.gmail.com> (raw) In-Reply-To: <20210120132717.395873-8-mohamed.mediouni@caramail.com> On Wed, Jan 20, 2021 at 2:27 PM Mohamed Mediouni <mohamed.mediouni@caramail.com> wrote: > +#ifdef CONFIG_SMP > +static void apple_aic_ipi_send_mask(struct irq_data *d, > + const struct cpumask *mask) Not sure we care about the #ifdef here, given that arch/arm64 does not allow building a kernel without CONFIG_SMP. > + /* > + * Ensure that stores to Normal memory are visible to the > + * other CPUs before issuing the IPI. > + */ > + wmb(); > + > + for_each_cpu (cpu, mask) { > + smp_mb__before_atomic(); > + atomic_or(1u << irqnr, per_cpu_ptr(&aic_ipi_mask, cpu)); > + smp_mb__after_atomic(); > + lcpu = get_cpu(); > + if (aic.fast_ipi) { > + if ((lcpu >> 2) == (cpu >> 2)) > + write_sysreg(cpu & 3, SR_APPLE_IPI_LOCAL); > + else > + write_sysreg((cpu & 3) | ((cpu >> 2) << 16), > + SR_APPLE_IPI_REMOTE); > + } else > + writel(lcpu == cpu ? REG_IPI_FLAG_SELF : > + (REG_IPI_FLAG_OTHER << cpu), > + aic.base + REG_IPI_SET); > + put_cpu(); > + } > + > + /* Force the above writes to be executed */ > + if (aic.fast_ipi) > + isb(); > +} Since this just loops over all CPUs, I'd probably just turn it into an ipi_send_single() callback and have the caller do the loop for simplicity. I also have the feeling that splitting one hardware IPI into multiple logical interrupts, which are then all registered by the same irq handler adds a little more complexity than necessary. Changing this would of course require modifications to arch/arm64/kernel/smp.c, which is hardwired to use CONFIG_GENERIC_IRQ_IPI in smp_cross_call(), and allowing a different code path there may be worse than emulating an irqchip. > @@ -186,8 +325,11 @@ static int __init apple_aic_init(struct device_node *node, > if (WARN(!aic.base, "unable to map aic registers\n")) > return -EINVAL; > > + aic.fast_ipi = of_property_read_bool(node, "fast-ipi"); Where is this property documented, and what decides which one to use? Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org> To: Mohamed Mediouni <mohamed.mediouni@caramail.com> Cc: Mark Rutland <mark.rutland@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Hector Martin <marcan@marcan.st>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>, Linux ARM <linux-arm-kernel@lists.infradead.org>, Stan Skowronek <stan@corellium.com> Subject: Re: [RFC PATCH 7/7] irqchip/apple-aic: add SMP support to the Apple AIC driver. Date: Thu, 21 Jan 2021 13:44:17 +0100 [thread overview] Message-ID: <CAK8P3a1qeVxTxZXpfMe70zpPCSBrTOz23ZTR=PHgw0PP9GUvbw@mail.gmail.com> (raw) In-Reply-To: <20210120132717.395873-8-mohamed.mediouni@caramail.com> On Wed, Jan 20, 2021 at 2:27 PM Mohamed Mediouni <mohamed.mediouni@caramail.com> wrote: > +#ifdef CONFIG_SMP > +static void apple_aic_ipi_send_mask(struct irq_data *d, > + const struct cpumask *mask) Not sure we care about the #ifdef here, given that arch/arm64 does not allow building a kernel without CONFIG_SMP. > + /* > + * Ensure that stores to Normal memory are visible to the > + * other CPUs before issuing the IPI. > + */ > + wmb(); > + > + for_each_cpu (cpu, mask) { > + smp_mb__before_atomic(); > + atomic_or(1u << irqnr, per_cpu_ptr(&aic_ipi_mask, cpu)); > + smp_mb__after_atomic(); > + lcpu = get_cpu(); > + if (aic.fast_ipi) { > + if ((lcpu >> 2) == (cpu >> 2)) > + write_sysreg(cpu & 3, SR_APPLE_IPI_LOCAL); > + else > + write_sysreg((cpu & 3) | ((cpu >> 2) << 16), > + SR_APPLE_IPI_REMOTE); > + } else > + writel(lcpu == cpu ? REG_IPI_FLAG_SELF : > + (REG_IPI_FLAG_OTHER << cpu), > + aic.base + REG_IPI_SET); > + put_cpu(); > + } > + > + /* Force the above writes to be executed */ > + if (aic.fast_ipi) > + isb(); > +} Since this just loops over all CPUs, I'd probably just turn it into an ipi_send_single() callback and have the caller do the loop for simplicity. I also have the feeling that splitting one hardware IPI into multiple logical interrupts, which are then all registered by the same irq handler adds a little more complexity than necessary. Changing this would of course require modifications to arch/arm64/kernel/smp.c, which is hardwired to use CONFIG_GENERIC_IRQ_IPI in smp_cross_call(), and allowing a different code path there may be worse than emulating an irqchip. > @@ -186,8 +325,11 @@ static int __init apple_aic_init(struct device_node *node, > if (WARN(!aic.base, "unable to map aic registers\n")) > return -EINVAL; > > + aic.fast_ipi = of_property_read_bool(node, "fast-ipi"); Where is this property documented, and what decides which one to use? Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-21 12:47 UTC|newest] Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-20 13:27 [RFC PATCH 0/7] Linux on Apple Silicon Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-20 13:27 ` [RFC PATCH 1/7] arm64: kernel: FIQ support Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-20 13:27 ` [RFC PATCH 2/7] arm64: kernel: Add a WFI hook Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-20 16:46 ` Alexander Graf 2021-01-20 16:46 ` Alexander Graf [not found] ` <94C20F55-D3B8-4349-B26F-9EA8AAEBF639@caramail.com> 2021-01-21 12:33 ` Hector Martin 'marcan' 2021-01-21 12:33 ` Hector Martin 'marcan' 2021-01-21 10:52 ` Arnd Bergmann 2021-01-21 10:52 ` Arnd Bergmann 2021-01-21 11:01 ` Mohamed Mediouni 2021-01-21 11:01 ` Mohamed Mediouni 2021-01-21 11:36 ` Arnd Bergmann 2021-01-21 11:36 ` Arnd Bergmann 2021-01-20 13:27 ` [RFC PATCH 3/7] arm64: mm: use nGnRnE instead of nGnRE on Apple processors Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-20 16:47 ` Alexander Graf 2021-01-20 16:47 ` Alexander Graf 2021-01-20 18:06 ` Mohamed Mediouni 2021-01-20 18:06 ` Mohamed Mediouni 2021-01-20 18:10 ` Alexander Graf 2021-01-20 18:10 ` Alexander Graf 2021-01-21 11:27 ` Will Deacon 2021-01-21 11:27 ` Will Deacon 2021-01-21 11:38 ` Arnd Bergmann 2021-01-21 11:38 ` Arnd Bergmann 2021-01-21 11:44 ` Marc Zyngier 2021-01-21 11:44 ` Marc Zyngier 2021-01-21 12:47 ` Will Deacon 2021-01-21 12:47 ` Will Deacon 2021-01-21 15:12 ` Mohamed Mediouni 2021-01-21 15:12 ` Mohamed Mediouni 2021-01-21 16:25 ` Marc Zyngier 2021-01-21 16:25 ` Marc Zyngier 2021-01-21 17:55 ` Will Deacon 2021-01-21 17:55 ` Will Deacon 2021-01-21 18:15 ` Marc Zyngier 2021-01-21 18:15 ` Marc Zyngier 2021-01-21 18:22 ` Mohamed Mediouni 2021-01-21 18:22 ` Mohamed Mediouni 2021-01-21 18:22 ` Will Deacon 2021-01-21 18:22 ` Will Deacon 2021-01-20 13:27 ` [RFC PATCH 4/7] irqchip/apple-aic: Add support for Apple AIC Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-20 17:11 ` Alexander Graf 2021-01-20 17:11 ` Alexander Graf 2021-01-20 18:04 ` Mohamed Mediouni 2021-01-20 18:04 ` Mohamed Mediouni 2021-01-20 20:16 ` Andrew Lunn 2021-01-20 20:16 ` Andrew Lunn 2021-01-20 21:18 ` Stan Skowronek 2021-01-20 21:18 ` Stan Skowronek 2021-01-21 9:48 ` Linus Walleij 2021-01-21 9:48 ` Linus Walleij 2021-01-21 10:37 ` Arnd Bergmann 2021-01-21 10:37 ` Arnd Bergmann 2021-01-21 15:29 ` Hector Martin 'marcan' 2021-01-21 15:29 ` Hector Martin 'marcan' 2021-01-21 17:09 ` Rob Herring 2021-01-21 17:09 ` Rob Herring 2021-01-21 17:45 ` Rob Herring 2021-01-21 17:45 ` Rob Herring 2021-01-21 16:44 ` Rob Herring 2021-01-21 16:44 ` Rob Herring 2021-01-21 16:53 ` Hector Martin 'marcan' 2021-01-21 16:53 ` Hector Martin 'marcan' 2021-01-20 13:27 ` [RFC PATCH 5/7] arm64/Kconfig: Add Apple Silicon SoC platform Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-20 13:27 ` [RFC PATCH 6/7] arm64: kernel: Apple CPU start driver Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-21 11:14 ` Arnd Bergmann 2021-01-21 11:14 ` Arnd Bergmann 2021-01-20 13:27 ` [RFC PATCH 7/7] irqchip/apple-aic: add SMP support to the Apple AIC driver Mohamed Mediouni 2021-01-20 13:27 ` Mohamed Mediouni 2021-01-21 12:44 ` Arnd Bergmann [this message] 2021-01-21 12:44 ` Arnd Bergmann 2021-01-21 12:50 ` Mohamed Mediouni 2021-01-21 12:50 ` Mohamed Mediouni 2021-01-21 13:00 ` Arnd Bergmann 2021-01-21 13:00 ` Arnd Bergmann 2021-01-21 13:01 ` Hector Martin 'marcan' 2021-01-21 13:01 ` Hector Martin 'marcan' 2021-01-21 13:22 ` Marc Zyngier 2021-01-21 13:22 ` Marc Zyngier 2021-01-21 13:32 ` Mark Rutland 2021-01-21 13:32 ` Mark Rutland 2021-01-21 14:05 ` Marc Zyngier 2021-01-21 14:05 ` Marc Zyngier 2021-01-21 13:34 ` Mohamed Mediouni 2021-01-21 13:34 ` Mohamed Mediouni 2021-01-21 14:10 ` Marc Zyngier 2021-01-21 14:10 ` Marc Zyngier 2021-01-21 15:09 ` Arnd Bergmann 2021-01-21 15:09 ` Arnd Bergmann 2021-01-21 15:18 ` Mohamed Mediouni 2021-01-21 15:18 ` Mohamed Mediouni 2021-01-21 16:40 ` Rob Herring 2021-01-21 16:40 ` Rob Herring 2021-01-21 16:43 ` Mohamed Mediouni 2021-01-21 16:43 ` Mohamed Mediouni 2021-01-21 17:37 ` Rob Herring 2021-01-21 17:37 ` Rob Herring 2021-01-21 18:08 ` Mohamed Mediouni 2021-01-21 18:08 ` Mohamed Mediouni 2021-01-21 18:57 ` Rob Herring 2021-01-21 18:57 ` Rob Herring 2021-02-02 19:15 ` Linus Walleij 2021-02-02 19:15 ` Linus Walleij
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