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From: Arnd Bergmann <arnd@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: SoC Team <soc@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Olof Johansson <olof@lixom.net>, Willy Tarreau <w@1wt.eu>
Subject: Re: [RFC PATCH 1/2] ARM: mstar: Add header with macros for RIU register access
Date: Fri, 23 Apr 2021 21:52:25 +0200	[thread overview]
Message-ID: <CAK8P3a3fxvH_DrxtrCDOwjzx1zvw09E4K7eFC697FH0je9=tmw@mail.gmail.com> (raw)
In-Reply-To: <CAFr9PX=QeON1C_25tyNK1rWGm3A_Kc2Ad5qLUCfunmdHQUsv_g@mail.gmail.com>

On Fri, Apr 23, 2021 at 4:03 PM Daniel Palmer <daniel@0x0f.com> wrote:
> On Fri, 23 Apr 2021 at 22:48, Arnd Bergmann <arnd@kernel.org> wrote:
> >
> > The __iomem token comes after the type, so this should be 'void __iomem *'.
> >
>
> Bit of copy/paste fail. Fixed.
>
> > > +       return readw_relaxed(reg + 4) << 16 | readw_relaxed(reg);
> >
> > This should probably be using 'readw' instead of 'readw_relaxed'. If you
> > absolutely need to use one of the relaxed accessors somewhere,
> > better add both sets and make sure drivers use the non-relaxed version
> > by default.
>
> I'll add a relaxed/non-relaxed version of each.
> Because of the heavy memory barrier to access one 32 bit register
> we'll hit the barrier twice in the non-relaxed version.
> And we don't need to hit the barrier at all because it doesn't
> actually matter for IO. Is there something better I can do there?

I think you can do the heavy barrier only once in this case. For writel,
the barrier comes first, so you can do writel();write_relaxed(), and the
reverse for the read side, doing readl_relaxed(); readl();.

> > Maybe both types of accessors can be in a single header.
>
> That makes sense. I'll merge them. Would this header be something that
> could go in alone without anything that uses them in mainline right
> now?

I don't care much, I can provide an Acked-by for merging it along with
whatever driver change first needs it, or I can merge it after
5.13-rc1 through the soc tree.

          Arnd

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org>
To: Daniel Palmer <daniel@0x0f.com>
Cc: SoC Team <soc@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Olof Johansson <olof@lixom.net>, Willy Tarreau <w@1wt.eu>
Subject: Re: [RFC PATCH 1/2] ARM: mstar: Add header with macros for RIU register access
Date: Fri, 23 Apr 2021 21:52:25 +0200	[thread overview]
Message-ID: <CAK8P3a3fxvH_DrxtrCDOwjzx1zvw09E4K7eFC697FH0je9=tmw@mail.gmail.com> (raw)
Message-ID: <20210423195225.GSwYMutJGPtLzYgjCAcdyh1lwleAB8xj2sQYpv5lfNs@z> (raw)
In-Reply-To: <CAFr9PX=QeON1C_25tyNK1rWGm3A_Kc2Ad5qLUCfunmdHQUsv_g@mail.gmail.com>

On Fri, Apr 23, 2021 at 4:03 PM Daniel Palmer <daniel@0x0f.com> wrote:
> On Fri, 23 Apr 2021 at 22:48, Arnd Bergmann <arnd@kernel.org> wrote:
> >
> > The __iomem token comes after the type, so this should be 'void __iomem *'.
> >
>
> Bit of copy/paste fail. Fixed.
>
> > > +       return readw_relaxed(reg + 4) << 16 | readw_relaxed(reg);
> >
> > This should probably be using 'readw' instead of 'readw_relaxed'. If you
> > absolutely need to use one of the relaxed accessors somewhere,
> > better add both sets and make sure drivers use the non-relaxed version
> > by default.
>
> I'll add a relaxed/non-relaxed version of each.
> Because of the heavy memory barrier to access one 32 bit register
> we'll hit the barrier twice in the non-relaxed version.
> And we don't need to hit the barrier at all because it doesn't
> actually matter for IO. Is there something better I can do there?

I think you can do the heavy barrier only once in this case. For writel,
the barrier comes first, so you can do writel();write_relaxed(), and the
reverse for the read side, doing readl_relaxed(); readl();.

> > Maybe both types of accessors can be in a single header.
>
> That makes sense. I'll merge them. Would this header be something that
> could go in alone without anything that uses them in mainline right
> now?

I don't care much, I can provide an Acked-by for merging it along with
whatever driver change first needs it, or I can merge it after
5.13-rc1 through the soc tree.

          Arnd

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  reply	other threads:[~2021-04-23 19:52 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-22 14:09 [RFC PATCH 0/2] ARM: mstar: Internal bus madness Daniel Palmer
2021-04-22 14:09 ` Daniel Palmer
2021-04-22 14:09 ` [RFC PATCH 1/2] ARM: mstar: Add header with macros for RIU register access Daniel Palmer
2021-04-22 14:09   ` Daniel Palmer
2021-04-23 13:47   ` Arnd Bergmann
2021-04-23 13:47     ` Arnd Bergmann
2021-04-23 14:02     ` Daniel Palmer
2021-04-23 14:02       ` Daniel Palmer
2021-04-23 14:02       ` Daniel Palmer
2021-04-23 19:52       ` Arnd Bergmann [this message]
2021-04-23 19:52         ` Arnd Bergmann
2021-04-22 14:09 ` [RFC PATCH 2/2] ARM: mstar: Add header with macros for XIU " Daniel Palmer
2021-04-22 14:09   ` Daniel Palmer

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