From: Brad Larson <brad@pensando.io> To: Serge Semin <fancer.lancer@gmail.com> Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>, Arnd Bergmann <arnd@arndb.de>, Linus Walleij <linus.walleij@linaro.org>, Bartosz Golaszewski <bgolaszewski@baylibre.com>, Mark Brown <broonie@kernel.org>, Adrian Hunter <adrian.hunter@intel.com>, Ulf Hansson <ulf.hansson@linaro.org>, Olof Johansson <olof@lixom.net>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, linux-spi <linux-spi@vger.kernel.org>, linux-mmc <linux-mmc@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, linux-kernel@vger.kernel.org Subject: Re: [PATCH 7/8] arm64: dts: Add Pensando Elba SoC support Date: Sun, 28 Mar 2021 18:07:50 -0700 [thread overview] Message-ID: <CAK9rFnwwo6Ww_r4rxcs+QHev4DtqZ-46BTyr3TkePZuoc=fUbw@mail.gmail.com> (raw) In-Reply-To: <20210304080355.cc37g7jagswro3dg@mobilestation> On Thu, Mar 4, 2021 at 12:03 AM Serge Semin <fancer.lancer@gmail.com> wrote: > > On Wed, Mar 03, 2021 at 07:41:40PM -0800, Brad Larson wrote: > > Add Pensando common and Elba SoC specific device nodes > > and corresponding binding documentation. > > This also needs to be split up into sub-patches seeing these are > unrelated changes like device bindings update, new platform DT file. In patchset v2 this is split into sub-patches. > What about converting this file to DT-schema and adding new HW > bindings in there? Converted existing file devicetree/bindings/spi/cadence-quadspi.txt to YAML schema. > > +&spi0 { > > + num-cs = <4>; > > > + cs-gpios = <&spics 0 0>, <&spics 1 0>, <&porta 1 0>, <&porta 7 0>; > > Oh, you've got four peripheral SPI devices connected with only two native CS > available. Hmm, then I don't really know a better way, but just to forget about > the native DW APB CS functionality and activate the direct driving of > all the CS-pins at the moment of the DW APB SPI controller probe > procedure. Then indeed you'll need a custom CS function defined in the DW APB > SPI driver to handle that. Yes, with an Elba SoC specific gpio driver. > So that GPIO-controller is just a single register which provides a way > to toggle the DW APB SPI CS-mode together with their output value. > If so and seeing there are a few more tiny spaces of config > registers added to eMMC, PCI, etc DT node, I suppose all of them > belong to some bigger config space of the SoC. Thus I'd suggest to at > least implement them as part of a System Controller DT node. Then use > that device service to switch on/off corresponding functionality. > See [2] and the rest of added to the kernel DTS files with > syscon-nodes for example. > > [2] Documentation/devicetree/bindings/mfd/syscon.yaml To us it was more understandable to implement a standard gpio driver for the spi chip-selects.
WARNING: multiple messages have this Message-ID (diff)
From: Brad Larson <brad@pensando.io> To: Serge Semin <fancer.lancer@gmail.com> Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>, Arnd Bergmann <arnd@arndb.de>, Linus Walleij <linus.walleij@linaro.org>, Bartosz Golaszewski <bgolaszewski@baylibre.com>, Mark Brown <broonie@kernel.org>, Adrian Hunter <adrian.hunter@intel.com>, Ulf Hansson <ulf.hansson@linaro.org>, Olof Johansson <olof@lixom.net>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, linux-spi <linux-spi@vger.kernel.org>, linux-mmc <linux-mmc@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, linux-kernel@vger.kernel.org Subject: Re: [PATCH 7/8] arm64: dts: Add Pensando Elba SoC support Date: Sun, 28 Mar 2021 18:07:50 -0700 [thread overview] Message-ID: <CAK9rFnwwo6Ww_r4rxcs+QHev4DtqZ-46BTyr3TkePZuoc=fUbw@mail.gmail.com> (raw) In-Reply-To: <20210304080355.cc37g7jagswro3dg@mobilestation> On Thu, Mar 4, 2021 at 12:03 AM Serge Semin <fancer.lancer@gmail.com> wrote: > > On Wed, Mar 03, 2021 at 07:41:40PM -0800, Brad Larson wrote: > > Add Pensando common and Elba SoC specific device nodes > > and corresponding binding documentation. > > This also needs to be split up into sub-patches seeing these are > unrelated changes like device bindings update, new platform DT file. In patchset v2 this is split into sub-patches. > What about converting this file to DT-schema and adding new HW > bindings in there? Converted existing file devicetree/bindings/spi/cadence-quadspi.txt to YAML schema. > > +&spi0 { > > + num-cs = <4>; > > > + cs-gpios = <&spics 0 0>, <&spics 1 0>, <&porta 1 0>, <&porta 7 0>; > > Oh, you've got four peripheral SPI devices connected with only two native CS > available. Hmm, then I don't really know a better way, but just to forget about > the native DW APB CS functionality and activate the direct driving of > all the CS-pins at the moment of the DW APB SPI controller probe > procedure. Then indeed you'll need a custom CS function defined in the DW APB > SPI driver to handle that. Yes, with an Elba SoC specific gpio driver. > So that GPIO-controller is just a single register which provides a way > to toggle the DW APB SPI CS-mode together with their output value. > If so and seeing there are a few more tiny spaces of config > registers added to eMMC, PCI, etc DT node, I suppose all of them > belong to some bigger config space of the SoC. Thus I'd suggest to at > least implement them as part of a System Controller DT node. Then use > that device service to switch on/off corresponding functionality. > See [2] and the rest of added to the kernel DTS files with > syscon-nodes for example. > > [2] Documentation/devicetree/bindings/mfd/syscon.yaml To us it was more understandable to implement a standard gpio driver for the spi chip-selects. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-29 1:08 UTC|newest] Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-04 3:41 [PATCH 0/8] Support Pensando Elba SoC Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 3:41 ` [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 8:29 ` Linus Walleij 2021-03-04 8:29 ` Linus Walleij 2021-03-04 9:10 ` Serge Semin 2021-03-04 9:10 ` Serge Semin 2021-03-04 13:38 ` Linus Walleij 2021-03-04 13:38 ` Linus Walleij 2021-08-23 1:05 ` Brad Larson 2021-08-23 1:05 ` Brad Larson 2021-08-29 21:09 ` Linus Walleij 2021-08-29 21:09 ` Linus Walleij 2021-10-04 16:46 ` Brad Larson 2021-10-04 16:46 ` Brad Larson 2021-10-12 23:51 ` Linus Walleij 2021-10-12 23:51 ` Linus Walleij 2021-10-14 20:06 ` Brad Larson 2021-10-14 20:06 ` Brad Larson 2021-03-30 2:44 ` Brad Larson 2021-03-30 2:44 ` Brad Larson 2021-08-23 1:05 ` Brad Larson 2021-08-23 1:05 ` Brad Larson 2021-03-04 20:43 ` Elliott, Robert (Servers) 2021-03-04 20:43 ` Elliott, Robert (Servers) 2021-08-23 1:06 ` Brad Larson 2021-08-23 1:06 ` Brad Larson 2021-03-05 11:25 ` Krzysztof Kozlowski 2021-03-05 11:25 ` Krzysztof Kozlowski 2021-08-23 1:07 ` Brad Larson 2021-08-23 1:07 ` Brad Larson 2021-03-05 13:57 ` Geert Uytterhoeven 2021-03-05 13:57 ` Geert Uytterhoeven 2021-08-23 1:08 ` Brad Larson 2021-08-23 1:08 ` Brad Larson 2021-03-07 19:21 ` Andy Shevchenko 2021-03-07 19:21 ` Andy Shevchenko 2021-03-29 1:19 ` Brad Larson 2021-03-29 1:19 ` Brad Larson 2021-03-29 10:39 ` Andy Shevchenko 2021-03-29 10:39 ` Andy Shevchenko 2021-08-23 1:13 ` Brad Larson 2021-08-23 1:13 ` Brad Larson 2021-08-23 7:50 ` Geert Uytterhoeven 2021-08-23 7:50 ` Geert Uytterhoeven 2021-08-23 16:30 ` Brad Larson 2021-08-23 16:30 ` Brad Larson 2021-08-23 20:11 ` Geert Uytterhoeven 2021-08-23 20:11 ` Geert Uytterhoeven 2021-10-04 17:14 ` Brad Larson 2021-10-04 17:14 ` Brad Larson 2021-10-04 17:16 ` Geert Uytterhoeven 2021-10-04 17:16 ` Geert Uytterhoeven 2021-08-23 1:10 ` Brad Larson 2021-08-23 1:10 ` Brad Larson 2021-03-04 3:41 ` [PATCH 2/8] spi: cadence-quadspi: Add QSPI support for Pensando Elba SoC Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:29 ` Arnd Bergmann 2021-03-04 9:29 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 3/8] spi: dw: Add support for Pensando Elba SoC SPI Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 6:44 ` Serge Semin 2021-03-04 6:44 ` Serge Semin 2021-08-23 1:17 ` Brad Larson 2021-08-23 1:17 ` Brad Larson 2021-03-04 8:48 ` Linus Walleij 2021-03-04 8:48 ` Linus Walleij 2021-03-10 3:52 ` Brad Larson 2021-03-10 3:52 ` Brad Larson 2021-03-04 3:41 ` [PATCH 4/8] spidev: Add Pensando CPLD compatible Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:33 ` Arnd Bergmann 2021-03-04 9:33 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 5/8] mmc: sdhci-cadence: Add Pensando Elba SoC support Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:41 ` Arnd Bergmann 2021-03-04 9:41 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 6/8] arm64: Add config for Pensando SoC platforms Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:42 ` Arnd Bergmann 2021-03-04 9:42 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 7/8] arm64: dts: Add Pensando Elba SoC support Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 8:03 ` Serge Semin 2021-03-04 8:03 ` Serge Semin 2021-03-29 1:07 ` Brad Larson [this message] 2021-03-29 1:07 ` Brad Larson 2021-08-23 0:54 ` Brad Larson 2021-08-23 0:54 ` Brad Larson 2021-03-04 8:51 ` Linus Walleij 2021-03-04 8:51 ` Linus Walleij 2021-03-29 0:54 ` Brad Larson 2021-03-29 0:54 ` Brad Larson 2021-03-04 9:06 ` Arnd Bergmann 2021-03-04 9:06 ` Arnd Bergmann 2021-03-04 20:47 ` Rob Herring 2021-03-04 20:47 ` Rob Herring 2021-03-05 11:22 ` Krzysztof Kozlowski 2021-03-05 11:22 ` Krzysztof Kozlowski 2021-03-04 3:41 ` [PATCH 8/8] MAINTAINERS: Add entry for PENSANDO Brad Larson 2021-03-04 3:41 ` Brad Larson
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to='CAK9rFnwwo6Ww_r4rxcs+QHev4DtqZ-46BTyr3TkePZuoc=fUbw@mail.gmail.com' \ --to=brad@pensando.io \ --cc=adrian.hunter@intel.com \ --cc=arnd@arndb.de \ --cc=bgolaszewski@baylibre.com \ --cc=broonie@kernel.org \ --cc=devicetree@vger.kernel.org \ --cc=fancer.lancer@gmail.com \ --cc=linus.walleij@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mmc@vger.kernel.org \ --cc=linux-spi@vger.kernel.org \ --cc=olof@lixom.net \ --cc=ulf.hansson@linaro.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.