From: Brad Larson <brad@pensando.io> To: Linus Walleij <linus.walleij@linaro.org> Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>, Arnd Bergmann <arnd@arndb.de>, Bartosz Golaszewski <bgolaszewski@baylibre.com>, Mark Brown <broonie@kernel.org>, Serge Semin <fancer.lancer@gmail.com>, Adrian Hunter <adrian.hunter@intel.com>, Ulf Hansson <ulf.hansson@linaro.org>, Olof Johansson <olof@lixom.net>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, linux-spi <linux-spi@vger.kernel.org>, linux-mmc <linux-mmc@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org> Subject: Re: [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control Date: Mon, 29 Mar 2021 19:44:48 -0700 [thread overview] Message-ID: <CAK9rFnzD98U_abHWUFkzghBkU5GX5d6Z1hOmQn7aXS=M7t_c8w@mail.gmail.com> (raw) In-Reply-To: <CACRpkdbQD6p7fbGtuu1c92uXfSFDCTwqjqsXHpgnD5Lg4v0Okw@mail.gmail.com> On Thu, Mar 4, 2021 at 12:29 AM Linus Walleij <linus.walleij@linaro.org> wrote: > > Hi Brad, > > thanks for your patch! > > On Thu, Mar 4, 2021 at 4:42 AM Brad Larson <brad@pensando.io> wrote: > > > This GPIO driver is for the Pensando Elba SoC which > > provides control of four chip selects on two SPI busses. > > > > Signed-off-by: Brad Larson <brad@pensando.io> > (...) > > > +#include <linux/gpio.h> > > Use this in new drivers: > #include <linux/gpio/driver.h> > > > + * pin: 3 2 | 1 0 > > + * bit: 7------6------5------4----|---3------2------1------0 > > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr > > + * ssi1 | ssi0 > > + */ > > +#define SPICS_PIN_SHIFT(pin) (2 * (pin)) > > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin)) > > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin)) > > So 2 bits per GPIO line in one register? (Nice doc!) > > > +struct elba_spics_priv { > > + void __iomem *base; > > + spinlock_t lock; > > + struct gpio_chip chip; > > +}; > > + > > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > +} > > Write a comment that the chip only supports output mode, > because it repurposes SPI CS pins as generic GPIO out, > maybe at the top of the file? > I'll add a comment regarding gpio pin mode. Yes output only mode as SPI chip-selects. > I suppose these systems also actually (ab)use the SPI cs > for things that are not really SPI CS? Because otherwise > this could just be part of the SPI driver (native chip select). > > > +static const struct of_device_id ebla_spics_of_match[] = { > > + { .compatible = "pensando,elba-spics" }, > > Have you documented this? Yes in Documentation/devicetree/bindings, I'll double check the content for completeness. The SPI CS isn't used for something else, the integrated DesignWare IP doesn't support 4 chip-selects on two spi busses. > > Other than that this is a nice and complete driver. > > Yours, > Linus Walleij Thanks for the review!
WARNING: multiple messages have this Message-ID (diff)
From: Brad Larson <brad@pensando.io> To: Linus Walleij <linus.walleij@linaro.org> Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>, Arnd Bergmann <arnd@arndb.de>, Bartosz Golaszewski <bgolaszewski@baylibre.com>, Mark Brown <broonie@kernel.org>, Serge Semin <fancer.lancer@gmail.com>, Adrian Hunter <adrian.hunter@intel.com>, Ulf Hansson <ulf.hansson@linaro.org>, Olof Johansson <olof@lixom.net>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, linux-spi <linux-spi@vger.kernel.org>, linux-mmc <linux-mmc@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org> Subject: Re: [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control Date: Mon, 29 Mar 2021 19:44:48 -0700 [thread overview] Message-ID: <CAK9rFnzD98U_abHWUFkzghBkU5GX5d6Z1hOmQn7aXS=M7t_c8w@mail.gmail.com> (raw) In-Reply-To: <CACRpkdbQD6p7fbGtuu1c92uXfSFDCTwqjqsXHpgnD5Lg4v0Okw@mail.gmail.com> On Thu, Mar 4, 2021 at 12:29 AM Linus Walleij <linus.walleij@linaro.org> wrote: > > Hi Brad, > > thanks for your patch! > > On Thu, Mar 4, 2021 at 4:42 AM Brad Larson <brad@pensando.io> wrote: > > > This GPIO driver is for the Pensando Elba SoC which > > provides control of four chip selects on two SPI busses. > > > > Signed-off-by: Brad Larson <brad@pensando.io> > (...) > > > +#include <linux/gpio.h> > > Use this in new drivers: > #include <linux/gpio/driver.h> > > > + * pin: 3 2 | 1 0 > > + * bit: 7------6------5------4----|---3------2------1------0 > > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr > > + * ssi1 | ssi0 > > + */ > > +#define SPICS_PIN_SHIFT(pin) (2 * (pin)) > > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin)) > > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin)) > > So 2 bits per GPIO line in one register? (Nice doc!) > > > +struct elba_spics_priv { > > + void __iomem *base; > > + spinlock_t lock; > > + struct gpio_chip chip; > > +}; > > + > > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin) > > +{ > > + return -ENXIO; > > +} > > Write a comment that the chip only supports output mode, > because it repurposes SPI CS pins as generic GPIO out, > maybe at the top of the file? > I'll add a comment regarding gpio pin mode. Yes output only mode as SPI chip-selects. > I suppose these systems also actually (ab)use the SPI cs > for things that are not really SPI CS? Because otherwise > this could just be part of the SPI driver (native chip select). > > > +static const struct of_device_id ebla_spics_of_match[] = { > > + { .compatible = "pensando,elba-spics" }, > > Have you documented this? Yes in Documentation/devicetree/bindings, I'll double check the content for completeness. The SPI CS isn't used for something else, the integrated DesignWare IP doesn't support 4 chip-selects on two spi busses. > > Other than that this is a nice and complete driver. > > Yours, > Linus Walleij Thanks for the review! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-30 2:46 UTC|newest] Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-04 3:41 [PATCH 0/8] Support Pensando Elba SoC Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 3:41 ` [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 8:29 ` Linus Walleij 2021-03-04 8:29 ` Linus Walleij 2021-03-04 9:10 ` Serge Semin 2021-03-04 9:10 ` Serge Semin 2021-03-04 13:38 ` Linus Walleij 2021-03-04 13:38 ` Linus Walleij 2021-08-23 1:05 ` Brad Larson 2021-08-23 1:05 ` Brad Larson 2021-08-29 21:09 ` Linus Walleij 2021-08-29 21:09 ` Linus Walleij 2021-10-04 16:46 ` Brad Larson 2021-10-04 16:46 ` Brad Larson 2021-10-12 23:51 ` Linus Walleij 2021-10-12 23:51 ` Linus Walleij 2021-10-14 20:06 ` Brad Larson 2021-10-14 20:06 ` Brad Larson 2021-03-30 2:44 ` Brad Larson [this message] 2021-03-30 2:44 ` Brad Larson 2021-08-23 1:05 ` Brad Larson 2021-08-23 1:05 ` Brad Larson 2021-03-04 20:43 ` Elliott, Robert (Servers) 2021-03-04 20:43 ` Elliott, Robert (Servers) 2021-08-23 1:06 ` Brad Larson 2021-08-23 1:06 ` Brad Larson 2021-03-05 11:25 ` Krzysztof Kozlowski 2021-03-05 11:25 ` Krzysztof Kozlowski 2021-08-23 1:07 ` Brad Larson 2021-08-23 1:07 ` Brad Larson 2021-03-05 13:57 ` Geert Uytterhoeven 2021-03-05 13:57 ` Geert Uytterhoeven 2021-08-23 1:08 ` Brad Larson 2021-08-23 1:08 ` Brad Larson 2021-03-07 19:21 ` Andy Shevchenko 2021-03-07 19:21 ` Andy Shevchenko 2021-03-29 1:19 ` Brad Larson 2021-03-29 1:19 ` Brad Larson 2021-03-29 10:39 ` Andy Shevchenko 2021-03-29 10:39 ` Andy Shevchenko 2021-08-23 1:13 ` Brad Larson 2021-08-23 1:13 ` Brad Larson 2021-08-23 7:50 ` Geert Uytterhoeven 2021-08-23 7:50 ` Geert Uytterhoeven 2021-08-23 16:30 ` Brad Larson 2021-08-23 16:30 ` Brad Larson 2021-08-23 20:11 ` Geert Uytterhoeven 2021-08-23 20:11 ` Geert Uytterhoeven 2021-10-04 17:14 ` Brad Larson 2021-10-04 17:14 ` Brad Larson 2021-10-04 17:16 ` Geert Uytterhoeven 2021-10-04 17:16 ` Geert Uytterhoeven 2021-08-23 1:10 ` Brad Larson 2021-08-23 1:10 ` Brad Larson 2021-03-04 3:41 ` [PATCH 2/8] spi: cadence-quadspi: Add QSPI support for Pensando Elba SoC Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:29 ` Arnd Bergmann 2021-03-04 9:29 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 3/8] spi: dw: Add support for Pensando Elba SoC SPI Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 6:44 ` Serge Semin 2021-03-04 6:44 ` Serge Semin 2021-08-23 1:17 ` Brad Larson 2021-08-23 1:17 ` Brad Larson 2021-03-04 8:48 ` Linus Walleij 2021-03-04 8:48 ` Linus Walleij 2021-03-10 3:52 ` Brad Larson 2021-03-10 3:52 ` Brad Larson 2021-03-04 3:41 ` [PATCH 4/8] spidev: Add Pensando CPLD compatible Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:33 ` Arnd Bergmann 2021-03-04 9:33 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 5/8] mmc: sdhci-cadence: Add Pensando Elba SoC support Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:41 ` Arnd Bergmann 2021-03-04 9:41 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 6/8] arm64: Add config for Pensando SoC platforms Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 9:42 ` Arnd Bergmann 2021-03-04 9:42 ` Arnd Bergmann 2021-03-04 3:41 ` [PATCH 7/8] arm64: dts: Add Pensando Elba SoC support Brad Larson 2021-03-04 3:41 ` Brad Larson 2021-03-04 8:03 ` Serge Semin 2021-03-04 8:03 ` Serge Semin 2021-03-29 1:07 ` Brad Larson 2021-03-29 1:07 ` Brad Larson 2021-08-23 0:54 ` Brad Larson 2021-08-23 0:54 ` Brad Larson 2021-03-04 8:51 ` Linus Walleij 2021-03-04 8:51 ` Linus Walleij 2021-03-29 0:54 ` Brad Larson 2021-03-29 0:54 ` Brad Larson 2021-03-04 9:06 ` Arnd Bergmann 2021-03-04 9:06 ` Arnd Bergmann 2021-03-04 20:47 ` Rob Herring 2021-03-04 20:47 ` Rob Herring 2021-03-05 11:22 ` Krzysztof Kozlowski 2021-03-05 11:22 ` Krzysztof Kozlowski 2021-03-04 3:41 ` [PATCH 8/8] MAINTAINERS: Add entry for PENSANDO Brad Larson 2021-03-04 3:41 ` Brad Larson
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