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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Matthew Auld <matthew.william.auld@gmail.com>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
	"DRI Development" <dri-devel@lists.freedesktop.org>,
	"Daniel Vetter" <daniel.vetter@intel.com>
Subject: Re: [Intel-gfx] [PATCH 5/7] drm/i915: Always wait for the exclusive fence
Date: Tue, 6 Jul 2021 14:58:50 +0200	[thread overview]
Message-ID: <CAKMK7uFJBvu-N1W+LbhSGtqkKfOEb7CkgfxtAp2XaHZM93BMiw@mail.gmail.com> (raw)
In-Reply-To: <CAM0jSHPqCQ58hnCkShZVq93k3y6J6cNJsyfagXdu5Y1zEN7NtA@mail.gmail.com>

On Tue, Jul 6, 2021 at 2:47 PM Matthew Auld
<matthew.william.auld@gmail.com> wrote:
>
> On Tue, 6 Jul 2021 at 11:12, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> >
> > We're lifting, or well, clarifying that the restriction that shared
> > fences have to be strictly after the exclusive one doesn't apply
> > anymore.
> >
> > So adjust the code to always also wait for the exclusive fence.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
> > Cc: Jason Ekstrand <jason@jlekstrand.net>
> > ---
> >  drivers/gpu/drm/i915/i915_sw_fence.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c b/drivers/gpu/drm/i915/i915_sw_fence.c
> > index 91711a46b1c7..271d321cea83 100644
> > --- a/drivers/gpu/drm/i915/i915_sw_fence.c
> > +++ b/drivers/gpu/drm/i915/i915_sw_fence.c
> > @@ -601,10 +601,10 @@ int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,
> >                 for (i = 0; i < count; i++)
> >                         dma_fence_put(shared[i]);
> >                 kfree(shared);
> > -       } else {
> > -               excl = dma_resv_get_excl_unlocked(resv);
> >         }
> >
> > +       excl = dma_resv_get_excl_unlocked(resv);
> > +
>
> The dma_resv_get_fences() call looks like it already fishes out the
> exclusive fence. Does this not leak the extra ref now?

Oh right I overlooked this, we already pick up the exclusive fence
unconditionally. Control flow here was a bit too clever for my parser.
I'll drop this patch in the next round.
-Daniel

>
> >         if (ret >= 0 && excl) {
> >                 pending = i915_sw_fence_await_dma_fence(fence,
> >                                                         excl,
> > --
> > 2.32.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Matthew Auld <matthew.william.auld@gmail.com>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
	"DRI Development" <dri-devel@lists.freedesktop.org>,
	"Daniel Vetter" <daniel.vetter@intel.com>
Subject: Re: [Intel-gfx] [PATCH 5/7] drm/i915: Always wait for the exclusive fence
Date: Tue, 6 Jul 2021 14:58:50 +0200	[thread overview]
Message-ID: <CAKMK7uFJBvu-N1W+LbhSGtqkKfOEb7CkgfxtAp2XaHZM93BMiw@mail.gmail.com> (raw)
In-Reply-To: <CAM0jSHPqCQ58hnCkShZVq93k3y6J6cNJsyfagXdu5Y1zEN7NtA@mail.gmail.com>

On Tue, Jul 6, 2021 at 2:47 PM Matthew Auld
<matthew.william.auld@gmail.com> wrote:
>
> On Tue, 6 Jul 2021 at 11:12, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> >
> > We're lifting, or well, clarifying that the restriction that shared
> > fences have to be strictly after the exclusive one doesn't apply
> > anymore.
> >
> > So adjust the code to always also wait for the exclusive fence.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
> > Cc: Jason Ekstrand <jason@jlekstrand.net>
> > ---
> >  drivers/gpu/drm/i915/i915_sw_fence.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c b/drivers/gpu/drm/i915/i915_sw_fence.c
> > index 91711a46b1c7..271d321cea83 100644
> > --- a/drivers/gpu/drm/i915/i915_sw_fence.c
> > +++ b/drivers/gpu/drm/i915/i915_sw_fence.c
> > @@ -601,10 +601,10 @@ int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,
> >                 for (i = 0; i < count; i++)
> >                         dma_fence_put(shared[i]);
> >                 kfree(shared);
> > -       } else {
> > -               excl = dma_resv_get_excl_unlocked(resv);
> >         }
> >
> > +       excl = dma_resv_get_excl_unlocked(resv);
> > +
>
> The dma_resv_get_fences() call looks like it already fishes out the
> exclusive fence. Does this not leak the extra ref now?

Oh right I overlooked this, we already pick up the exclusive fence
unconditionally. Control flow here was a bit too clever for my parser.
I'll drop this patch in the next round.
-Daniel

>
> >         if (ret >= 0 && excl) {
> >                 pending = i915_sw_fence_await_dma_fence(fence,
> >                                                         excl,
> > --
> > 2.32.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-07-06 12:59 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-06 10:12 [PATCH 0/7] dma-resv fence DAG fixes Daniel Vetter
2021-07-06 10:12 ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12 ` [PATCH 1/7] drm/msm: Don't break exclusive fence ordering Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12   ` Daniel Vetter
2021-07-06 10:12 ` [PATCH 2/7] drm/msm: always wait for the exclusive fence Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12   ` Daniel Vetter
2021-07-06 10:12 ` [PATCH 3/7] drm/etnaviv: Don't break exclusive fence ordering Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-07  8:54   ` Lucas Stach
2021-07-07  8:54     ` [Intel-gfx] " Lucas Stach
2021-07-07 11:37     ` Daniel Vetter
2021-07-07 11:37       ` [Intel-gfx] " Daniel Vetter
2021-07-07 12:31       ` Lucas Stach
2021-07-07 12:31         ` [Intel-gfx] " Lucas Stach
2021-07-07 12:59         ` Daniel Vetter
2021-07-07 12:59           ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12 ` [PATCH 4/7] drm/i915: delete exclude argument from i915_sw_fence_await_reservation Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12 ` [PATCH 5/7] drm/i915: Always wait for the exclusive fence Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-06 12:47   ` Matthew Auld
2021-07-06 12:47     ` Matthew Auld
2021-07-06 12:58     ` Daniel Vetter [this message]
2021-07-06 12:58       ` Daniel Vetter
2021-07-06 10:12 ` [PATCH 6/7] drm/i915: Don't break exclusive fence ordering Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12 ` [PATCH 7/7] dma-resv: Give the docs a do-over Daniel Vetter
2021-07-06 10:12   ` [Intel-gfx] " Daniel Vetter
2021-07-06 10:12   ` Daniel Vetter
2021-07-06 12:34   ` [Intel-gfx] " Matthew Auld
2021-07-06 12:34     ` Matthew Auld
2021-07-06 12:34     ` Matthew Auld
2021-07-06 23:47   ` Jason Ekstrand
2021-07-06 23:47     ` [Intel-gfx] " Jason Ekstrand
2021-07-06 23:47     ` Jason Ekstrand
2021-07-07  8:06   ` [Linaro-mm-sig] " Christian König
2021-07-07  8:06     ` [Intel-gfx] " Christian König
2021-07-07  8:06     ` Christian König
2021-07-07  9:13     ` Daniel Vetter
2021-07-07  9:13       ` [Intel-gfx] " Daniel Vetter
2021-07-07  9:13       ` Daniel Vetter
2021-07-06 10:35 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for dma-resv fence DAG fixes Patchwork

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