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From: Mirela Simonovic <mirela.simonovic@aggios.com>
To: Julien Grall <julien.grall@arm.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>,
	Xen Devel <xen-devel@lists.xen.org>,
	Davorin Mista <dm@aggios.com>,
	Saeed Nowshadi <saeed.nowshadi@xilinx.com>,
	xen-devel <xen-devel@lists.xenproject.org>,
	Stefano Stabellini <stefano.stabellini@xilinx.com>
Subject: Re: [PATCH 10/18] xen/arm: Implement GIC suspend/resume functions (gicv2 only)
Date: Wed, 14 Nov 2018 12:57:21 +0100	[thread overview]
Message-ID: <CAKPH-NgOJ3xXWxLoX36zBDOA5VUg8J5C3XM96zJHKBPOBjX_jg@mail.gmail.com> (raw)
In-Reply-To: <42c2bded-957a-c2db-ab82-e628278efa83@arm.com>

On Wed, Nov 14, 2018 at 10:13 AM Julien Grall <julien.grall@arm.com> wrote:
>
> Hi Stefano,
>
> On 11/13/18 11:41 PM, Stefano Stabellini wrote:
> > On Mon, 12 Nov 2018, Mirela Simonovic wrote:
> >> System suspend may lead to a state where GIC would be powered down.
> >> Therefore, Xen should save/restore the context of GIC on suspend/resume.
> >> Note that the context consists of states of registers which are
> >> controlled by the hypervisor. Other GIC registers which are accessible
> >> by guests are saved/restored on context switch.
> >> Tested on Xilinx Ultrascale+ MPSoC with (and without) powering down
> >> the GIC.
> >>
> >> Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
> >> Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
> >> ---
> >>   xen/arch/arm/gic-v2.c     | 147 ++++++++++++++++++++++++++++++++++++++++++++++
> >>   xen/arch/arm/gic.c        |  27 +++++++++
> >>   xen/include/asm-arm/gic.h |   8 +++
> >>   3 files changed, 182 insertions(+)
> >>
> >> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> >> index e7eb01f30a..bb52b64ecb 100644
> >> --- a/xen/arch/arm/gic-v2.c
> >> +++ b/xen/arch/arm/gic-v2.c
> >> @@ -123,6 +123,25 @@ static DEFINE_PER_CPU(u8, gic_cpu_id);
> >>   /* Maximum cpu interface per GIC */
> >>   #define NR_GIC_CPU_IF 8
> >>
> >> +/* GICv2 registers to be saved/restored on system suspend/resume */
> >> +struct gicv2_context {
> >> +    /* GICC context */
> >> +    uint32_t gicc_ctlr;
> >> +    uint32_t gicc_pmr;
> >> +    uint32_t gicc_bpr;
> >> +    /* GICD context */
> >> +    uint32_t gicd_ctlr;
> >> +    uint32_t *gicd_isenabler;
> >> +    uint32_t *gicd_isactiver;
> >> +    uint32_t *gicd_ipriorityr;
> >> +    uint32_t *gicd_itargetsr;
> >> +    uint32_t *gicd_icfgr;
> >> +};
> >> +
> >> +static struct gicv2_context gicv2_context;
> >> +
> >> +static void gicv2_alloc_context(struct gicv2_context *gc);
> >> +
> >>   static inline void writeb_gicd(uint8_t val, unsigned int offset)
> >>   {
> >>       writeb_relaxed(val, gicv2.map_dbase + offset);
> >> @@ -1310,6 +1329,9 @@ static int __init gicv2_init(void)
> >>
> >>       spin_unlock(&gicv2.lock);
> >>
> >> +    /* Allocate memory to be used for saving GIC context during the suspend */
> >> +    gicv2_alloc_context(&gicv2_context);
> >
> > Please check for the return of gicv2_alloc_context and return error
> > accordingly.
>
> Suspend/resume is not a critical feature in common case. So I would
> prefer if we disable it when we can't alloc memory.
>
> I would also be tempt to #ifdef all related suspend/resume code to allow
> the integrator disabling the feature when they don't want it.
>
> >
> >
> >>       return 0;
> >>   }
> >>
> >> @@ -1319,6 +1341,129 @@ static void gicv2_do_LPI(unsigned int lpi)
> >>       BUG();
> >>   }
> >>
> >> +static void gicv2_alloc_context(struct gicv2_context *gc)
> >> +{
> >> +    uint32_t n = gicv2_info.nr_lines;
> >> +
> >> +    gc->gicd_isenabler = xzalloc_array(uint32_t, DIV_ROUND_UP(n, 32));
> >> +    if ( !gc->gicd_isenabler )
> >> +        return;
> >
> > I would return error and return error also below for all the other
> > similar cases.
> >
> >
> >> +    gc->gicd_isactiver = xzalloc_array(uint32_t, DIV_ROUND_UP(n, 32));
> >> +    if ( !gc->gicd_isactiver )
> >> +        goto free_gicd_isenabler;
> >> +
> >> +    gc->gicd_itargetsr = xzalloc_array(uint32_t, DIV_ROUND_UP(n, 4));
> >> +    if ( !gc->gicd_itargetsr )
> >> +        goto free_gicd_isactiver;
> >> +
> >> +    gc->gicd_ipriorityr = xzalloc_array(uint32_t, DIV_ROUND_UP(n, 4));
> >> +    if ( !gc->gicd_ipriorityr )
> >> +        goto free_gicd_itargetsr;
> >> +
> >> +    gc->gicd_icfgr = xzalloc_array(uint32_t, DIV_ROUND_UP(n, 16));
> >> +    if ( gc->gicd_icfgr )
> >> +        return;
> >> +
> >> +    xfree(gc->gicd_ipriorityr);
> >> +
> >> +free_gicd_itargetsr:
> >
> > You can have just one label that frees everything, as you can rely on
> > xfree working fine (doing nothing) for NULL pointers.
> >
> >
> >> +    xfree(gc->gicd_itargetsr);
> >> +
> >> +free_gicd_isactiver:
> >> +    xfree(gc->gicd_isactiver);
> >> +
> >> +free_gicd_isenabler:
> >> +    xfree(gc->gicd_isenabler);
> >> +    gc->gicd_isenabler = NULL;
> >> +}
> >> +
> >> +static int gicv2_suspend(void)
> >> +{
> >> +    int i;
> >> +
> >> +    /* Save GICC configuration */
> >> +    gicv2_context.gicc_ctlr = readl_gicc(GICC_CTLR);
> >> +    gicv2_context.gicc_pmr = readl_gicc(GICC_PMR);
> >> +    gicv2_context.gicc_bpr = readl_gicc(GICC_BPR);
> >> +
> >> +    /* If gicv2_alloc_context() hasn't allocated memory, return */
> >> +    if ( !gicv2_context.gicd_isenabler )
> >> +        return -ENOMEM;
> >
> > If you are going to check for this, then please check for all the others
> > as well (gicd_isactiver, gicd_ipriorityr, etc.) But if you follow my
> > other suggestion to return error if we fail the memory allocation at
> > init, then this can become an ASSERT. Also, ASSERTS or checks should be
> > at the very beginning of this function.
> >
> >
> >> +    /* Save GICD configuration */
> >> +    gicv2_context.gicd_ctlr = readl_gicd(GICD_CTLR);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 32); i++ )
> >> +        gicv2_context.gicd_isenabler[i] = readl_gicd(GICD_ISENABLER + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 32); i++ )
> >> +        gicv2_context.gicd_isactiver[i] = readl_gicd(GICD_ISACTIVER + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 4); i++ )
> >> +        gicv2_context.gicd_ipriorityr[i] = readl_gicd(GICD_IPRIORITYR + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 4); i++ )
> >> +        gicv2_context.gicd_itargetsr[i] = readl_gicd(GICD_ITARGETSR + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 16); i++ )
> >> +        gicv2_context.gicd_icfgr[i] = readl_gicd(GICD_ICFGR + i * 4);
> >
> > Technically, GICD_ICFGR doesn't need to be saved because it could be
> > entirely reconstructed from the informations we have, but I imagine it
> > could be difficult to call the right set of route_irq_to_guest/xen calls
> > at resume time, so I think it is OK.
> >
> >
> >> +    return 0;
> >> +}
> >> +
> >> +static void gicv2_resume(void)
> >> +{
> >> +    int i;
> >> +
> >> +    ASSERT(gicv2_context.gicd_isenabler);
> >> +    ASSERT(gicv2_context.gicd_isactiver);
> >> +    ASSERT(gicv2_context.gicd_ipriorityr);
> >> +    ASSERT(gicv2_context.gicd_itargetsr);
> >> +    ASSERT(gicv2_context.gicd_icfgr);
> >> +
> >> +    /* Disable CPU interface and distributor */
> >> +    writel_gicc(0, GICC_CTLR);
> >> +    writel_gicd(0, GICD_CTLR);
> >> +    isb();
> >> +
> >> +    /* Restore GICD configuration */
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 32); i++ )
> >> +        writel_gicd(0xffffffff, GICD_ICENABLER + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 32); i++ )
> >> +        writel_gicd(gicv2_context.gicd_isenabler[i], GICD_ISENABLER + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 32); i++ )
> >> +        writel_gicd(0xffffffff, GICD_ICACTIVER + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 32); i++ )
> >> +        writel_gicd(gicv2_context.gicd_isactiver[i], GICD_ISACTIVER + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 4); i++ )
> >> +        writel_gicd(gicv2_context.gicd_ipriorityr[i], GICD_IPRIORITYR + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 4); i++ )
> >> +        writel_gicd(gicv2_context.gicd_itargetsr[i], GICD_ITARGETSR + i * 4);
> >> +
> >> +    for ( i = 0; i < DIV_ROUND_UP(gicv2_info.nr_lines, 16); i++ )
> >> +        writel_gicd(gicv2_context.gicd_icfgr[i], GICD_ICFGR + i * 4);
> >> +
> >> +    /* Make sure all registers are restored and enable distributor */
> >> +    isb();
> >> +    writel_gicd(gicv2_context.gicd_ctlr | GICD_CTL_ENABLE, GICD_CTLR);
> >> +
> >> +    /* Restore GIC CPU interface configuration */
> >> +    writel_gicc(gicv2_context.gicc_pmr, GICC_PMR);
> >> +    writel_gicc(gicv2_context.gicc_bpr, GICC_BPR);
> >> +    isb();
> >
> > I don't think we need all these isb()'s in this function. Maybe only one
> > at the end, but probably not even that. Julien, what do you think?
>
> I don't think any of the isb() in the code are necessary. What are we
> trying to prevent with them?
>

I also think it's not needed - anywhere

> Cheers,
>
> --
> Julien Grall

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  reply	other threads:[~2018-11-14 11:57 UTC|newest]

Thread overview: 153+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-12 11:30 [PATCH 00/18] xen/arm64: Suspend to RAM support for Xen Mirela Simonovic
2018-11-12 11:30 ` [PATCH 01/18] xen/arm: Move code that initializes VCPU context into a separate function Mirela Simonovic
2018-11-12 11:41   ` Jan Beulich
2018-11-12 11:43   ` Wei Liu
2018-11-12 13:15   ` Julien Grall
2018-11-14 11:45     ` Mirela Simonovic
2018-11-12 11:30 ` [PATCH 02/18] xen/arm: Implement PSCI system suspend call (virtual interface) Mirela Simonovic
2018-11-12 11:42   ` Jan Beulich
2018-11-12 11:50     ` Mirela Simonovic
2018-11-12 12:45       ` Jan Beulich
2018-11-12 15:27   ` Julien Grall
2018-11-12 16:35     ` Mirela Simonovic
2018-11-12 16:41       ` Andrew Cooper
2018-11-12 19:56         ` Julien Grall
2018-11-13  8:32           ` Andrew Cooper
2018-11-14 12:08             ` Mirela Simonovic
2018-11-14 12:49               ` Julien Grall
2018-11-15  0:47                 ` Andrew Cooper
2018-11-15 10:13                   ` Julien Grall
2018-11-15 10:26                     ` Andrew Cooper
2018-11-15 10:33                       ` Mirela Simonovic
2018-11-15 10:59                         ` Julien Grall
2018-11-15 11:10                           ` Mirela Simonovic
2018-11-15 11:38                             ` Julien Grall
2018-11-15 11:42                               ` Mirela Simonovic
2018-11-15 19:30                                 ` Stefano Stabellini
2018-11-15 20:25                                 ` Julien Grall
2018-11-16 22:10                               ` Dario Faggioli
2018-11-15 10:36                       ` Julien Grall
2018-11-15 10:36                       ` Julien Grall
2018-11-15 10:50                         ` Andrew Cooper
2018-11-13  1:53         ` Stefano Stabellini
2018-11-13  9:41           ` Julien Grall
2018-11-13 20:39             ` Stefano Stabellini
2018-11-14 13:10               ` Julien Grall
2018-11-14 23:08                 ` Stefano Stabellini
2018-11-12 20:29       ` Julien Grall
2018-11-13 20:39         ` Stefano Stabellini
2018-11-14 10:45           ` Julien Grall
2018-11-14 12:35             ` Mirela Simonovic
2018-11-14 13:05               ` Julien Grall
2018-11-14 14:48                 ` Julien Grall
2018-11-14 15:36                   ` Mirela Simonovic
2018-11-14 15:37                     ` Mirela Simonovic
2018-11-14 15:51                     ` Julien Grall
2018-11-13 10:23   ` Julien Grall
2018-11-13 15:09     ` Julien Grall
2018-11-14 12:44       ` Mirela Simonovic
2018-11-12 11:30 ` [PATCH 03/18] xen/arm: Save GIC and virtual timer context when the domain suspends Mirela Simonovic
2018-11-12 15:36   ` Julien Grall
2018-11-12 16:52     ` Mirela Simonovic
2018-11-12 17:00       ` Julien Grall
2018-11-12 17:42         ` Mirela Simonovic
2018-11-12 19:20           ` Julien Grall
2018-11-13 20:44             ` Stefano Stabellini
2018-11-14 10:48               ` Julien Grall
2018-11-14 22:45                 ` Stefano Stabellini
2018-11-14 23:39                   ` Julien Grall
2018-11-15  0:05                     ` Julien Grall
2018-11-15  0:35                     ` Stefano Stabellini
2018-11-15 20:29                       ` Julien Grall
2018-11-12 11:30 ` [PATCH 04/18] xen/arm: While a domain is suspended put its watchdogs on pause Mirela Simonovic
2018-11-12 11:47   ` Jan Beulich
2018-11-12 15:17     ` Mirela Simonovic
2018-11-12 15:23       ` Jan Beulich
2018-11-12 15:31         ` Mirela Simonovic
2018-11-12 15:33           ` Andrew Cooper
2018-11-16 22:40             ` Dario Faggioli
2018-11-12 11:30 ` [PATCH 05/18] xen/arm: Trigger Xen suspend when Dom0 completes suspend Mirela Simonovic
2018-11-12 15:45   ` Julien Grall
2018-11-12 23:46     ` Stefano Stabellini
2018-11-13  9:43       ` Julien Grall
2018-11-13 11:26         ` Mirela Simonovic
2018-11-13 11:42           ` Julien Grall
2018-11-14 15:07   ` Julien Grall
2018-11-14 15:40     ` Mirela Simonovic
2018-11-14 17:10       ` Julien Grall
2018-11-14 17:35         ` Mirela Simonovic
2018-11-14 18:48           ` Julien Grall
2018-11-15 12:37             ` Mirela Simonovic
2018-11-15 18:23   ` Julien Grall
2018-11-15 19:17     ` Mirela Simonovic
2018-11-15 20:47       ` Julien Grall
2018-11-12 11:30 ` [PATCH 06/18] xen/x86: Move freeze/thaw_domains into common files Mirela Simonovic
2018-11-13 22:37   ` Stefano Stabellini
2018-11-12 11:30 ` [PATCH 07/18] xen/arm: Freeze domains on suspend and thaw them on resume Mirela Simonovic
2018-11-12 11:30 ` [PATCH 08/18] xen/arm: Disable/enable non-boot physical CPUs on suspend/resume Mirela Simonovic
2018-11-13 22:35   ` Stefano Stabellini
2018-11-14 12:07     ` Julien Grall
2018-11-14 10:52   ` Julien Grall
2018-11-14 13:00     ` Mirela Simonovic
2018-11-14 13:18       ` Julien Grall
2018-11-14 23:04         ` Stefano Stabellini
2018-11-14 23:45           ` Julien Grall
2018-11-15 18:57             ` Stefano Stabellini
2018-11-15 21:09               ` Julien Grall
2018-11-12 11:30 ` [PATCH 09/18] xen/arm: Add rcu_barrier() before enabling non-boot CPUs on resume Mirela Simonovic
2018-11-13 22:42   ` Stefano Stabellini
2018-11-14 12:11   ` Julien Grall
2018-11-14 22:29     ` Stefano Stabellini
2018-11-12 11:30 ` [PATCH 10/18] xen/arm: Implement GIC suspend/resume functions (gicv2 only) Mirela Simonovic
2018-11-13 23:41   ` Stefano Stabellini
2018-11-14  9:13     ` Julien Grall
2018-11-14 11:57       ` Mirela Simonovic [this message]
2018-11-14 12:41   ` Julien Grall
2018-11-14 12:52     ` Mirela Simonovic
2018-11-14 13:24       ` Julien Grall
2018-11-14 22:18         ` Stefano Stabellini
2018-11-14 23:50           ` Julien Grall
2018-11-15 18:26             ` Stefano Stabellini
2018-11-12 11:30 ` [PATCH 11/18] xen/arm: Suspend/resume GIC on system suspend/resume Mirela Simonovic
2018-11-12 11:30 ` [PATCH 12/18] xen/arm: Suspend/resume timer interrupt generation Mirela Simonovic
2018-11-12 11:30 ` [PATCH 13/18] xen/arm: Implement PSCI SYSTEM_SUSPEND call (physical interface) Mirela Simonovic
2018-11-14  0:14   ` Stefano Stabellini
2018-11-14 12:03     ` Mirela Simonovic
2018-11-15 21:20   ` Julien Grall
2018-11-12 11:30 ` [PATCH 14/18] xen/arm: Convert setting MMU page tables code into a routine Mirela Simonovic
2018-11-12 11:30 ` [PATCH 15/18] xen/arm: Resume memory management on Xen resume Mirela Simonovic
2018-11-12 16:17   ` Julien Grall
2018-11-13  1:36     ` Stefano Stabellini
2018-11-13  9:59       ` Julien Grall
2018-11-13 21:35         ` Stefano Stabellini
2018-11-13 22:24           ` Julien Grall
2018-11-12 11:30 ` [PATCH 16/18] xen/arm: Save/restore context on suspend/resume Mirela Simonovic
2018-11-12 11:30 ` [PATCH 17/18] xen/arm: Resume Dom0 after Xen resumes Mirela Simonovic
2018-11-15 20:31   ` Julien Grall
2018-11-16 10:33     ` Mirela Simonovic
2018-11-16 11:29       ` Mirela Simonovic
2018-11-16 11:44         ` Julien Grall
2018-11-16 12:34           ` Mirela Simonovic
2018-11-16 13:24             ` Julien Grall
2018-11-16 19:03               ` Stefano Stabellini
2018-11-16 19:09                 ` Stefano Stabellini
2018-11-16 21:41                   ` Mirela Simonovic
2018-11-16 21:58                     ` Julien Grall
2018-11-16 23:01                       ` Dario Faggioli
2018-11-16 23:06                         ` Stefano Stabellini
2018-11-17 16:01                           ` Mirela Simonovic
2018-11-17 16:02                             ` Mirela Simonovic
2018-11-17 16:19                               ` Mirela Simonovic
2018-11-27 18:36                             ` Julien Grall
2018-11-29 14:02                               ` Mirela Simonovic
2018-12-04 18:15                                 ` Julien Grall
2018-11-12 11:30 ` [PATCH 18/18] xen/arm: Suspend/resume console on Xen suspend/resume Mirela Simonovic
2018-11-27 18:46   ` Julien Grall
2018-11-12 11:37 ` [PATCH 00/18] xen/arm64: Suspend to RAM support for Xen Mirela Simonovic
2018-11-12 11:49 ` Julien Grall
2018-11-12 12:01   ` Mirela Simonovic
2018-11-12 12:08     ` Julien Grall
2018-11-12 12:35       ` Mirela Simonovic
2018-11-13  2:22   ` Stefano Stabellini
2018-11-13 10:02     ` Julien Grall
2018-11-13 18:06       ` Stefano Stabellini

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