Re: [PATCH v9 1/7] dt-bindings: add documentation of xilinx clocking wizard

[Shubhrajyoti Datta <shubhrajyoti.datta@gmail.com>]

On Fri, Feb 19, 2021 at 6:54 AM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Miquel Raynal (2021-02-18 00:28:04)
> > Hi Shubhrajyoti,
> >
> > Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> wrote on Thu, 18 Feb
> > 2021 10:19:45 +0530:
> >
> > > Add the devicetree binding for the xilinx clocking wizard.
> > >
> > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > > ---
> > > v6:
> > > Fix a yaml warning
> > > v7:
> > > Add vendor prefix speed-grade
> > > v8:
> > > Fix the warnings
> > > v9:
> > > Fix the warnings
> > >
> > >  .../bindings/clock/xlnx,clocking-wizard.yaml       | 65 ++++++++++++++++++++++
> > >  1 file changed, 65 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> > > new file mode 100644
> > > index 0000000..d209140
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
> > > @@ -0,0 +1,65 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: "http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#"
> > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > > +
> > > +title: Xilinx clocking wizard
> > > +
> > > +maintainers:
> > > +  - Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > > +
> > > +description:
> > > +  The clocking wizard is a soft ip clocking block of Xilinx versal. It
> > > +  reads required input clock frequencies from the devicetree and acts as clock
> > > +  clock output.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: xlnx,clocking-wizard
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  "#clock-cells":
> > > +    const: 1
> > > +
> > > +  clocks:
> > > +    items:
> > > +      - description: clock input
> > > +      - description: axi clock
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: clk_in1
> > > +      - const: s_axi_aclk
> > > +
> > > +  clock-output-names: true
> > > +
> > > +  xlnx,speed-grade:
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    enum: [1, 2, 3]
> > > +    description:
> > > +      Speed grade of the device.
> >
> > A bit of explanation of what this describes would be welcome.
> >
> > Don't forget that binding are not tied to any driver implementation,
> > these are supposed to be hardware description properties.
>
> Would opp tables work for this?
This is the parameter is for speed of the fabric.