* [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
@ 2019-02-09 19:50 Prathap Kumar Valsan
2019-02-09 19:55 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Prathap Kumar Valsan @ 2019-02-09 19:50 UTC (permalink / raw)
To: igt-dev
From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
This patch adds mocs table for icelake with expected L3 and eDRAM
control values.
Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
---
tests/i915/gem_mocs_settings.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 5b3b6bc1..bae245ef 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -73,6 +73,18 @@ struct mocs_table {
};
/* The first entries in the MOCS tables are defined by uABI */
+static const struct mocs_entry icelake_mocs_table[] = {
+ { 0x00000005, 0x0010 },
+ { 0x00000004, 0x0030 },
+ { 0x00000037, 0x0030 },
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[] = {
+ { 0x0007FFFF, 0x003F },
+ { 0x0007FFFF, 0x003F },
+ { 0x0007FFFF, 0x003F },
+};
+
static const struct mocs_entry skylake_mocs_table[] = {
{ 0x00000009, 0x0010 },
{ 0x00000038, 0x0030 },
@@ -127,6 +139,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
table->table = broxton_mocs_table;
}
result = true;
+ } else if (IS_ICELAKE(devid)) {
+ if (dirty) {
+ table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
+ table->table = dirty_icelake_mocs_table;
+ } else {
+ table->size = ARRAY_SIZE(icelake_mocs_table);
+ table->table = icelake_mocs_table;
+ }
+ result = true;
}
return result;
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_mocs_settings: Add mocs table for icelake
2019-02-09 19:50 [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake Prathap Kumar Valsan
@ 2019-02-09 19:55 ` Patchwork
2019-02-09 21:25 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-02-09 19:55 UTC (permalink / raw)
To: Prathap Kumar Valsan; +Cc: igt-dev
== Series Details ==
Series: i915/gem_mocs_settings: Add mocs table for icelake
URL : https://patchwork.freedesktop.org/series/56459/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5575 -> IGTPW_2369
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/56459/revisions/1/mbox/
Known issues
------------
Here are the changes found in IGTPW_2369 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@pm_rpm@module-reload:
- fi-skl-6770hq: PASS -> FAIL [fdo#108511]
#### Possible fixes ####
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109527]: https://bugs.freedesktop.org/show_bug.cgi?id=109527
[fdo#109567]: https://bugs.freedesktop.org/show_bug.cgi?id=109567
Participating hosts (46 -> 41)
------------------------------
Additional (1): fi-hsw-4770r
Missing (6): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-skl-6700hq fi-bdw-samus
Build changes
-------------
* IGT: IGT_4815 -> IGTPW_2369
CI_DRM_5575: f54ddb76353b218c6731d453cca7dc95b53d5f50 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2369: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2369/
IGT_4815: 947301563259726b65ce47d3a3fe37931ed42efe @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2369/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for i915/gem_mocs_settings: Add mocs table for icelake
2019-02-09 19:50 [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake Prathap Kumar Valsan
2019-02-09 19:55 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
@ 2019-02-09 21:25 ` Patchwork
2019-02-11 18:39 ` [igt-dev] [PATCH i-g-t] " Lucas De Marchi
2019-02-14 15:46 ` [igt-dev] [PATCH i-g-t v2] " Prathap Kumar Valsan via igt-dev
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-02-09 21:25 UTC (permalink / raw)
To: Prathap Kumar Valsan; +Cc: igt-dev
== Series Details ==
Series: i915/gem_mocs_settings: Add mocs table for icelake
URL : https://patchwork.freedesktop.org/series/56459/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5575_full -> IGTPW_2369_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/56459/revisions/1/mbox/
Known issues
------------
Here are the changes found in IGTPW_2369_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_flush@basic-uc-pro-default:
- shard-snb: PASS -> INCOMPLETE [fdo#105411]
* igt@gem_softpin@noreloc-s3:
- shard-kbl: PASS -> DMESG-WARN [fdo#108566]
* igt@gem_threaded_access_tiled:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-render-c:
- shard-kbl: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145] +1
* igt@kms_color@pipe-a-degamma:
- shard-apl: PASS -> FAIL [fdo#104782] / [fdo#108145]
- shard-kbl: PASS -> FAIL [fdo#104782] / [fdo#108145]
* igt@kms_color@pipe-b-legacy-gamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_cursor_crc@cursor-128x128-sliding:
- shard-kbl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-kbl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-hsw: PASS -> FAIL [fdo#105767]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-apl: PASS -> FAIL [fdo#103167] +3
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
- shard-kbl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-glk: PASS -> FAIL [fdo#103167] +8
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166] +4
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
- shard-kbl: PASS -> FAIL [fdo#99912]
#### Possible fixes ####
* igt@kms_color@pipe-a-legacy-gamma:
- shard-apl: FAIL [fdo#104782] / [fdo#108145] -> PASS
* igt@kms_cursor_crc@cursor-256x256-sliding:
- shard-glk: FAIL [fdo#103232] -> PASS +6
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: FAIL [fdo#103232] -> PASS +7
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-kbl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-alpha-opaque:
- shard-apl: FAIL [fdo#109350] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-glk: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-farfromfence:
- shard-snb: INCOMPLETE [fdo#105411] -> PASS
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-glk: FAIL [fdo#108948] -> PASS
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-kbl: FAIL [fdo#108145] -> PASS
- shard-apl: FAIL [fdo#108145] -> PASS
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk: FAIL [fdo#108145] -> PASS +2
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-glk: FAIL [fdo#103166] -> PASS
- shard-kbl: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-apl: FAIL [fdo#103166] -> PASS +5
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: DMESG-FAIL [fdo#105763] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
------------------------------
Missing (2): shard-skl shard-iclb
Build changes
-------------
* IGT: IGT_4815 -> IGTPW_2369
* Piglit: piglit_4509 -> None
CI_DRM_5575: f54ddb76353b218c6731d453cca7dc95b53d5f50 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2369: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2369/
IGT_4815: 947301563259726b65ce47d3a3fe37931ed42efe @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2369/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
2019-02-09 19:50 [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake Prathap Kumar Valsan
2019-02-09 19:55 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2019-02-09 21:25 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
@ 2019-02-11 18:39 ` Lucas De Marchi
2019-02-14 15:46 ` [igt-dev] [PATCH i-g-t v2] " Prathap Kumar Valsan via igt-dev
3 siblings, 0 replies; 11+ messages in thread
From: Lucas De Marchi @ 2019-02-11 18:39 UTC (permalink / raw)
To: Prathap Kumar Valsan; +Cc: igt-dev
On Sat, Feb 9, 2019 at 11:37 AM Prathap Kumar Valsan
<prathap.kumar.valsan@intel.com> wrote:
>
> From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
>
> This patch adds mocs table for icelake with expected L3 and eDRAM
> control values.
>
> Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
> ---
> tests/i915/gem_mocs_settings.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
> index 5b3b6bc1..bae245ef 100644
> --- a/tests/i915/gem_mocs_settings.c
> +++ b/tests/i915/gem_mocs_settings.c
> @@ -73,6 +73,18 @@ struct mocs_table {
> };
>
> /* The first entries in the MOCS tables are defined by uABI */
> +static const struct mocs_entry icelake_mocs_table[] = {
> + { 0x00000005, 0x0010 },
> + { 0x00000004, 0x0030 },
> + { 0x00000037, 0x0030 },
the table contains 62 entries that we should be checking. What about
the other ones?
We will need to update the other tables as well, as it was changed
from Uncached to PTE. Could you take care of that as well?
thanks
Lucas De Marchi
> +};
> +
> +static const struct mocs_entry dirty_icelake_mocs_table[] = {
> + { 0x0007FFFF, 0x003F },
> + { 0x0007FFFF, 0x003F },
> + { 0x0007FFFF, 0x003F },
> +};
> +
> static const struct mocs_entry skylake_mocs_table[] = {
> { 0x00000009, 0x0010 },
> { 0x00000038, 0x0030 },
> @@ -127,6 +139,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
> table->table = broxton_mocs_table;
> }
> result = true;
> + } else if (IS_ICELAKE(devid)) {
> + if (dirty) {
> + table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
> + table->table = dirty_icelake_mocs_table;
> + } else {
> + table->size = ARRAY_SIZE(icelake_mocs_table);
> + table->table = icelake_mocs_table;
> + }
> + result = true;
> }
>
> return result;
> --
> 2.20.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
--
Lucas De Marchi
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t v2] i915/gem_mocs_settings: Add mocs table for icelake
2019-02-09 19:50 [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake Prathap Kumar Valsan
` (2 preceding siblings ...)
2019-02-11 18:39 ` [igt-dev] [PATCH i-g-t] " Lucas De Marchi
@ 2019-02-14 15:46 ` Prathap Kumar Valsan via igt-dev
3 siblings, 0 replies; 11+ messages in thread
From: Prathap Kumar Valsan via igt-dev @ 2019-02-14 15:46 UTC (permalink / raw)
To: igt-dev
From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
This patch adds mocs table for icelake with expected L3 and eDRAM
control values.
Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
---
Changes in v2:
- Updated GEN9 mocs table with 62 entries
- Updated GEN11 mocs table with 64 entries
- Set ununsed mocs entries to PTE
tests/i915/gem_mocs_settings.c | 148 +++++++++++++++++++++++++++------
1 file changed, 124 insertions(+), 24 deletions(-)
diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 5b3b6bc1..1ab0d674 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -33,6 +33,10 @@
#include "igt_sysfs.h"
#define MAX_NUMBER_MOCS_REGISTERS (64)
+#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but configured. */
+#define MOCS_PTE_INDEX (0x1)
+
enum {
NONE,
RESET,
@@ -65,6 +69,7 @@ static const char * const test_modes[] = {
struct mocs_entry {
uint32_t control_value;
uint16_t l3cc_value;
+ uint8_t used;
};
struct mocs_table {
@@ -73,37 +78,113 @@ struct mocs_table {
};
/* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
- { 0x00000009, 0x0010 },
- { 0x00000038, 0x0030 },
- { 0x0000003b, 0x0030 },
+static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+ [0] = { 0x00000005, 0x0010, 0x1 },
+ [1] = { 0x00000004, 0x0030, 0x1 },
+ [2] = { 0x00000037, 0x0030, 0x1 },
+ [3] = { 0x00000005, 0x0010, 0x1 },
+ [4] = { 0x00000005, 0x0030, 0x1 },
+ [5] = { 0x00000037, 0x0010, 0x1 },
+ [6] = { 0x00000017, 0x0010, 0x1 },
+ [7] = { 0x00000017, 0x0030, 0x1 },
+ [8] = { 0x00000027, 0x0010, 0x1 },
+ [9] = { 0x00000027, 0x0030, 0x1 },
+ [10] = { 0x00000077, 0x0010, 0x1 },
+ [11] = { 0x00000077, 0x0030, 0x1 },
+ [12] = { 0x00000057, 0x0010, 0x1 },
+ [13] = { 0x00000057, 0x0030, 0x1 },
+ [14] = { 0x00000067, 0x0010, 0x1 },
+ [15] = { 0x00000067, 0x0030, 0x1 },
+ [18] = { 0x00060037, 0x0030, 0x1 },
+ [19] = { 0x00000737, 0x0030, 0x1 },
+ [20] = { 0x00000337, 0x0030, 0x1 },
+ [21] = { 0x00000137, 0x0030, 0x1 },
+ [22] = { 0x000003b7, 0x0030, 0x1 },
+ [23] = { 0x000007b7, 0x0030, 0x1 },
+ [62] = { 0x00000037, 0x0010, 0x1 },
+ [63] = { 0x00000037, 0x0010, 0x1 },
+};
+
+static struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+ [0] = { 0x0007FFFF, 0x003F },
+ [1] = { 0x0007FFFF, 0x003F },
+ [2] = { 0x0007FFFF, 0x003F },
+ [3] = { 0x0007FFFF, 0x003F },
+ [4] = { 0x0007FFFF, 0x003F },
+ [5] = { 0x0007FFFF, 0x003F },
+ [6] = { 0x0007FFFF, 0x003F },
+ [7] = { 0x0007FFFF, 0x003F },
+ [8] = { 0x0007FFFF, 0x003F },
+ [9] = { 0x0007FFFF, 0x003F },
+ [10] = { 0x0007FFFF, 0x003F },
+ [11] = { 0x0007FFFF, 0x003F },
+ [12] = { 0x0007FFFF, 0x003F },
+ [13] = { 0x0007FFFF, 0x003F },
+ [14] = { 0x0007FFFF, 0x003F },
+ [15] = { 0x0007FFFF, 0x003F },
+ [18] = { 0x0007FFFF, 0x003F },
+ [19] = { 0x0007FFFF, 0x003F },
+ [21] = { 0x0007FFFF, 0x003F },
+ [22] = { 0x0007FFFF, 0x003F },
+ [23] = { 0x0007FFFF, 0x003F },
+ [62] = { 0x0007FFFF, 0x003F },
+ [63] = { 0x0007FFFF, 0x003F },
};
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
- { 0x00003FFF, 0x003F }, /* no snoop bit */
- { 0x00003FFF, 0x003F },
- { 0x00003FFF, 0x003F },
+static struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00000009, 0x0010, 0x1 },
+ { 0x00000038, 0x0030, 0x1 },
+ { 0x0000003b, 0x0030, 0x1 },
};
-static const struct mocs_entry broxton_mocs_table[] = {
- { 0x00000009, 0x0010 },
- { 0x00000038, 0x0030 },
- { 0x00000039, 0x0030 },
+static struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00003FFF, 0x003F, 0x1 }, /* no snoop bit */
+ { 0x00003FFF, 0x003F, 0x1 },
+ { 0x00003FFF, 0x003F, 0x1 },
};
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
- { 0x00007FFF, 0x003F },
- { 0x00007FFF, 0x003F },
- { 0x00007FFF, 0x003F },
+static struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00000009, 0x0010, 0x1 },
+ { 0x00000038, 0x0030, 0x1 },
+ { 0x00000039, 0x0030, 0x1 },
};
-static const uint32_t write_values[] = {
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF
+static struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00007FFF, 0x003F, 0x1 },
+ { 0x00007FFF, 0x003F, 0x1 },
+ { 0x00007FFF, 0x003F, 0x1 },
};
+static uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS];
+
+static void set_mocs_settings(void)
+{
+ uint8_t index;
+ /* Set un-used entries to PTE */
+ for (index = 0; index < MAX_NUMBER_MOCS_REGISTERS; index++) {
+ if (index < GEN9_NUM_MOCS_ENTRIES) {
+ if (!skylake_mocs_table[index].used) {
+ skylake_mocs_table[index] = skylake_mocs_table[MOCS_PTE_INDEX];
+ dirty_skylake_mocs_table[index] = dirty_skylake_mocs_table[MOCS_PTE_INDEX];
+ }
+ if (!broxton_mocs_table[index].used) {
+ broxton_mocs_table[index] = broxton_mocs_table[MOCS_PTE_INDEX];
+ dirty_broxton_mocs_table[index] = dirty_broxton_mocs_table[MOCS_PTE_INDEX];
+ }
+ if (!icelake_mocs_table[index].used) {
+ icelake_mocs_table[index] = icelake_mocs_table[MOCS_PTE_INDEX];
+ dirty_icelake_mocs_table[index] = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
+ }
+ } else { /*icelake has 64 entries */
+ if (!icelake_mocs_table[index].used) {
+ icelake_mocs_table[index] = icelake_mocs_table[MOCS_PTE_INDEX];
+ dirty_icelake_mocs_table[index] = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
+ }
+ }
+ }
+ memset((char *)write_values, 0xFF, MAX_NUMBER_MOCS_REGISTERS * sizeof(uint32_t));
+}
+
static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
{
uint32_t devid = intel_get_drm_devid(fd);
@@ -127,6 +208,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
table->table = broxton_mocs_table;
}
result = true;
+ } else if (IS_ICELAKE(devid)) {
+ if (dirty) {
+ table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
+ table->table = dirty_icelake_mocs_table;
+ } else {
+ table->size = ARRAY_SIZE(icelake_mocs_table);
+ table->table = icelake_mocs_table;
+ }
+ result = true;
}
return result;
@@ -283,9 +373,10 @@ static void check_control_registers(int fd,
read_regs = gem_mmap__cpu(fd, dst_handle, 0, 4096, PROT_READ);
gem_set_domain(fd, dst_handle, I915_GEM_DOMAIN_CPU, 0);
- for (int index = 0; index < table.size; index++)
+ for (int index = 0; index < table.size; index++) {
igt_assert_eq_u32(read_regs[index],
table.table[index].control_value);
+ }
munmap(read_regs, 4096);
gem_close(fd, dst_handle);
@@ -374,13 +465,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
{
+ uint32_t devid = intel_get_drm_devid(fd);
+ int num_of_mocs_entries;
+
+ if (IS_ICELAKE(devid))
+ num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+ else
+ num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
write_registers(fd, ctx_id, get_engine_base(engine),
- write_values, ARRAY_SIZE(write_values),
+ write_values, num_of_mocs_entries,
engine);
if (engine == I915_EXEC_RENDER)
write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
- write_values, ARRAY_SIZE(write_values),
+ write_values, num_of_mocs_entries,
engine);
}
@@ -440,6 +539,7 @@ igt_main
fd = drm_open_driver_master(DRIVER_INTEL); /* for SECURE */
igt_require_gem(fd);
gem_require_mocs_registers(fd);
+ set_mocs_settings();
igt_require(get_mocs_settings(fd, &table, false));
}
--
2.20.1
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
2019-02-21 23:42 ` Chris Wilson
@ 2019-02-22 17:49 ` Lucas De Marchi
0 siblings, 0 replies; 11+ messages in thread
From: Lucas De Marchi @ 2019-02-22 17:49 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
On Thu, Feb 21, 2019 at 11:42:02PM +0000, Chris Wilson wrote:
>Quoting Lucas De Marchi (2019-02-21 22:48:45)
>> static const struct mocs_entry icelake_mocs_pte = { 0x00000004, 0x0030, 0x1 };
>> static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
>> [0] = { 0x00000005, 0x0010, 0x1 },
>> [1] = icelake_mocs_pte,
>> [2] = { 0x00000037, 0x0030, 0x1 },
>> ...
>> [20] = icelake_mocs_pte,
>> ...
>>
>> So... you basically define all entries and don't need to overwrite the
>> values like you are doing.
>
>/* All unspecified entries default to following PTE */
>[0 ... GEN11_NUM_MOCS_ENTRIES-1] = icelake_mocs_pte,
>
>[0] = ...,
>[2] = ...,
>
>If I remember my syntax correctly,
yep, but just remember there are holes of unspecified entries, so you
need to do this in the middle of the array by supplying the correct
index, not the number of entries.
Lucas De Marchi
>-Chris
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
2019-02-21 22:48 ` Lucas De Marchi
@ 2019-02-21 23:42 ` Chris Wilson
2019-02-22 17:49 ` Lucas De Marchi
0 siblings, 1 reply; 11+ messages in thread
From: Chris Wilson @ 2019-02-21 23:42 UTC (permalink / raw)
To: Lucas De Marchi, Prathap Kumar Valsan; +Cc: igt-dev, Lucas De Marchi
Quoting Lucas De Marchi (2019-02-21 22:48:45)
> static const struct mocs_entry icelake_mocs_pte = { 0x00000004, 0x0030, 0x1 };
> static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> [0] = { 0x00000005, 0x0010, 0x1 },
> [1] = icelake_mocs_pte,
> [2] = { 0x00000037, 0x0030, 0x1 },
> ...
> [20] = icelake_mocs_pte,
> ...
>
> So... you basically define all entries and don't need to overwrite the
> values like you are doing.
/* All unspecified entries default to following PTE */
[0 ... GEN11_NUM_MOCS_ENTRIES-1] = icelake_mocs_pte,
[0] = ...,
[2] = ...,
If I remember my syntax correctly,
-Chris
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
2019-02-15 21:46 Prathap Kumar Valsan via igt-dev
2019-02-20 8:33 ` Szwichtenberg, Radoslaw
@ 2019-02-21 22:48 ` Lucas De Marchi
2019-02-21 23:42 ` Chris Wilson
1 sibling, 1 reply; 11+ messages in thread
From: Lucas De Marchi @ 2019-02-21 22:48 UTC (permalink / raw)
To: Prathap Kumar Valsan; +Cc: Lucas De Marchi, igt-dev
On Fri, Feb 15, 2019 at 1:32 PM Prathap Kumar Valsan
<prathap.kumar.valsan@intel.com> wrote:
>
> From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
>
> This patch adds mocs table for icelake with expected L3 and eDRAM
> control values.
>
> Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
> ---
> tests/i915/gem_mocs_settings.c | 145 +++++++++++++++++++++++++++------
> 1 file changed, 122 insertions(+), 23 deletions(-)
>
> diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
> index 5b3b6bc1..b84273a0 100644
> --- a/tests/i915/gem_mocs_settings.c
> +++ b/tests/i915/gem_mocs_settings.c
> @@ -33,6 +33,10 @@
> #include "igt_sysfs.h"
>
> #define MAX_NUMBER_MOCS_REGISTERS (64)
> +#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are reserved. */
> +#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but configured. */
> +#define MOCS_PTE_INDEX (0x1)
> +
> enum {
> NONE,
> RESET,
> @@ -65,6 +69,7 @@ static const char * const test_modes[] = {
> struct mocs_entry {
> uint32_t control_value;
> uint16_t l3cc_value;
> + uint8_t used;
> };
>
> struct mocs_table {
> @@ -73,37 +78,113 @@ struct mocs_table {
> };
>
> /* The first entries in the MOCS tables are defined by uABI */
> -static const struct mocs_entry skylake_mocs_table[] = {
> - { 0x00000009, 0x0010 },
> - { 0x00000038, 0x0030 },
> - { 0x0000003b, 0x0030 },
> +static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> + [0] = { 0x00000005, 0x0010, 0x1 },
> + [1] = { 0x00000004, 0x0030, 0x1 },
> + [2] = { 0x00000037, 0x0030, 0x1 },
> + [3] = { 0x00000005, 0x0010, 0x1 },
> + [4] = { 0x00000005, 0x0030, 0x1 },
> + [5] = { 0x00000037, 0x0010, 0x1 },
> + [6] = { 0x00000017, 0x0010, 0x1 },
> + [7] = { 0x00000017, 0x0030, 0x1 },
> + [8] = { 0x00000027, 0x0010, 0x1 },
> + [9] = { 0x00000027, 0x0030, 0x1 },
> + [10] = { 0x00000077, 0x0010, 0x1 },
> + [11] = { 0x00000077, 0x0030, 0x1 },
> + [12] = { 0x00000057, 0x0010, 0x1 },
> + [13] = { 0x00000057, 0x0030, 0x1 },
> + [14] = { 0x00000067, 0x0010, 0x1 },
> + [15] = { 0x00000067, 0x0030, 0x1 },
> + [18] = { 0x00060037, 0x0030, 0x1 },
> + [19] = { 0x00000737, 0x0030, 0x1 },
> + [20] = { 0x00000337, 0x0030, 0x1 },
> + [21] = { 0x00000137, 0x0030, 0x1 },
> + [22] = { 0x000003b7, 0x0030, 0x1 },
> + [23] = { 0x000007b7, 0x0030, 0x1 },
> + [62] = { 0x00000037, 0x0010, 0x1 },
> + [63] = { 0x00000037, 0x0010, 0x1 },
> +};
> +
> +static struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> + [0] = { 0x0007FFFF, 0x003F },
> + [1] = { 0x0007FFFF, 0x003F },
> + [2] = { 0x0007FFFF, 0x003F },
> + [3] = { 0x0007FFFF, 0x003F },
> + [4] = { 0x0007FFFF, 0x003F },
> + [5] = { 0x0007FFFF, 0x003F },
> + [6] = { 0x0007FFFF, 0x003F },
> + [7] = { 0x0007FFFF, 0x003F },
> + [8] = { 0x0007FFFF, 0x003F },
> + [9] = { 0x0007FFFF, 0x003F },
> + [10] = { 0x0007FFFF, 0x003F },
> + [11] = { 0x0007FFFF, 0x003F },
> + [12] = { 0x0007FFFF, 0x003F },
> + [13] = { 0x0007FFFF, 0x003F },
> + [14] = { 0x0007FFFF, 0x003F },
> + [15] = { 0x0007FFFF, 0x003F },
> + [18] = { 0x0007FFFF, 0x003F },
> + [19] = { 0x0007FFFF, 0x003F },
> + [21] = { 0x0007FFFF, 0x003F },
> + [22] = { 0x0007FFFF, 0x003F },
> + [23] = { 0x0007FFFF, 0x003F },
> + [62] = { 0x0007FFFF, 0x003F },
> + [63] = { 0x0007FFFF, 0x003F },
> };
>
> -static const struct mocs_entry dirty_skylake_mocs_table[] = {
> - { 0x00003FFF, 0x003F }, /* no snoop bit */
> - { 0x00003FFF, 0x003F },
> - { 0x00003FFF, 0x003F },
> +static struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00000009, 0x0010, 0x1 },
> + { 0x00000038, 0x0030, 0x1 },
> + { 0x0000003b, 0x0030, 0x1 },
> };
>
> -static const struct mocs_entry broxton_mocs_table[] = {
> - { 0x00000009, 0x0010 },
> - { 0x00000038, 0x0030 },
> - { 0x00000039, 0x0030 },
> +static struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00003FFF, 0x003F, 0x1 }, /* no snoop bit */
> + { 0x00003FFF, 0x003F, 0x1 },
> + { 0x00003FFF, 0x003F, 0x1 },
> };
>
> -static const struct mocs_entry dirty_broxton_mocs_table[] = {
> - { 0x00007FFF, 0x003F },
> - { 0x00007FFF, 0x003F },
> - { 0x00007FFF, 0x003F },
> +static struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00000009, 0x0010, 0x1 },
> + { 0x00000038, 0x0030, 0x1 },
> + { 0x00000039, 0x0030, 0x1 },
> };
>
> -static const uint32_t write_values[] = {
> - 0xFFFFFFFF,
> - 0xFFFFFFFF,
> - 0xFFFFFFFF,
> - 0xFFFFFFFF
> +static struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00007FFF, 0x003F, 0x1 },
> + { 0x00007FFF, 0x003F, 0x1 },
> + { 0x00007FFF, 0x003F, 0x1 },
These are all the same, why bother defining the array?
> };
>
> +static uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS];
> +
> +static void set_mocs_settings(void)
> +{
> + uint8_t index;
> + /* Set un-used entries to PTE */
> + for (index = 0; index < MAX_NUMBER_MOCS_REGISTERS; index++) {
I think this is too verbose to fix the issue. IMO we should
a) continue with *const* tables
b) not have this function to modify the values
for that I think it's reasonable to have something like:
static const struct mocs_entry icelake_mocs_pte = { 0x00000004, 0x0030, 0x1 };
static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
[0] = { 0x00000005, 0x0010, 0x1 },
[1] = icelake_mocs_pte,
[2] = { 0x00000037, 0x0030, 0x1 },
...
[20] = icelake_mocs_pte,
...
So... you basically define all entries and don't need to overwrite the
values like you are doing.
Lucas De Marchi
> + if (index < GEN9_NUM_MOCS_ENTRIES) {
> + if (!skylake_mocs_table[index].used) {
> + skylake_mocs_table[index] = skylake_mocs_table[MOCS_PTE_INDEX];
> + dirty_skylake_mocs_table[index] = dirty_skylake_mocs_table[MOCS_PTE_INDEX];
> + }
> + if (!broxton_mocs_table[index].used) {
> + broxton_mocs_table[index] = broxton_mocs_table[MOCS_PTE_INDEX];
> + dirty_broxton_mocs_table[index] = dirty_broxton_mocs_table[MOCS_PTE_INDEX];
> + }
> + if (!icelake_mocs_table[index].used) {
> + icelake_mocs_table[index] = icelake_mocs_table[MOCS_PTE_INDEX];
> + dirty_icelake_mocs_table[index] = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
> + }
> + } else { /*icelake has 64 entries */
> + if (!icelake_mocs_table[index].used) {
> + icelake_mocs_table[index] = icelake_mocs_table[MOCS_PTE_INDEX];
> + dirty_icelake_mocs_table[index] = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
> + }
> + }
> + }
> + memset((char *)write_values, 0xFF, MAX_NUMBER_MOCS_REGISTERS * sizeof(uint32_t));
> +}
> +
> static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
> {
> uint32_t devid = intel_get_drm_devid(fd);
> @@ -127,6 +208,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
> table->table = broxton_mocs_table;
> }
> result = true;
> + } else if (IS_ICELAKE(devid)) {
> + if (dirty) {
> + table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
> + table->table = dirty_icelake_mocs_table;
> + } else {
> + table->size = ARRAY_SIZE(icelake_mocs_table);
> + table->table = icelake_mocs_table;
> + }
> + result = true;
> }
>
> return result;
> @@ -374,13 +464,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
>
> static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
> {
> + uint32_t devid = intel_get_drm_devid(fd);
> + int num_of_mocs_entries;
> +
> + if (IS_ICELAKE(devid))
> + num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
> + else
> + num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
> +
> write_registers(fd, ctx_id, get_engine_base(engine),
> - write_values, ARRAY_SIZE(write_values),
> + write_values, num_of_mocs_entries,
> engine);
>
> if (engine == I915_EXEC_RENDER)
> write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
> - write_values, ARRAY_SIZE(write_values),
> + write_values, num_of_mocs_entries/2,
> engine);
> }
>
> @@ -440,6 +538,7 @@ igt_main
> fd = drm_open_driver_master(DRIVER_INTEL); /* for SECURE */
> igt_require_gem(fd);
> gem_require_mocs_registers(fd);
> + set_mocs_settings();
> igt_require(get_mocs_settings(fd, &table, false));
> }
>
> --
> 2.20.1
>
--
Lucas De Marchi
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
2019-02-15 21:46 Prathap Kumar Valsan via igt-dev
@ 2019-02-20 8:33 ` Szwichtenberg, Radoslaw
2019-02-21 22:48 ` Lucas De Marchi
1 sibling, 0 replies; 11+ messages in thread
From: Szwichtenberg, Radoslaw @ 2019-02-20 8:33 UTC (permalink / raw)
To: igt-dev, Kumar Valsan, Prathap
Fixing the CC.
Radek
On Fri, 2019-02-15 at 16:46 -0500, Prathap Kumar Valsan via igt-dev wrote:
> From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
>
> This patch adds mocs table for icelake with expected L3 and eDRAM
> control values.
>
> Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
> ---
> tests/i915/gem_mocs_settings.c | 145 +++++++++++++++++++++++++++------
> 1 file changed, 122 insertions(+), 23 deletions(-)
>
> diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
> index 5b3b6bc1..b84273a0 100644
> --- a/tests/i915/gem_mocs_settings.c
> +++ b/tests/i915/gem_mocs_settings.c
> @@ -33,6 +33,10 @@
> #include "igt_sysfs.h"
>
> #define MAX_NUMBER_MOCS_REGISTERS (64)
> +#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are reserved.
> */
> +#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but configured. */
> +#define MOCS_PTE_INDEX (0x1)
> +
> enum {
> NONE,
> RESET,
> @@ -65,6 +69,7 @@ static const char * const test_modes[] = {
> struct mocs_entry {
> uint32_t control_value;
> uint16_t l3cc_value;
> + uint8_t used;
> };
>
> struct mocs_table {
> @@ -73,37 +78,113 @@ struct mocs_table {
> };
>
> /* The first entries in the MOCS tables are defined by uABI */
> -static const struct mocs_entry skylake_mocs_table[] = {
> - { 0x00000009, 0x0010 },
> - { 0x00000038, 0x0030 },
> - { 0x0000003b, 0x0030 },
> +static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> + [0] = { 0x00000005, 0x0010, 0x1 },
> + [1] = { 0x00000004, 0x0030, 0x1 },
> + [2] = { 0x00000037, 0x0030, 0x1 },
> + [3] = { 0x00000005, 0x0010, 0x1 },
> + [4] = { 0x00000005, 0x0030, 0x1 },
> + [5] = { 0x00000037, 0x0010, 0x1 },
> + [6] = { 0x00000017, 0x0010, 0x1 },
> + [7] = { 0x00000017, 0x0030, 0x1 },
> + [8] = { 0x00000027, 0x0010, 0x1 },
> + [9] = { 0x00000027, 0x0030, 0x1 },
> + [10] = { 0x00000077, 0x0010, 0x1 },
> + [11] = { 0x00000077, 0x0030, 0x1 },
> + [12] = { 0x00000057, 0x0010, 0x1 },
> + [13] = { 0x00000057, 0x0030, 0x1 },
> + [14] = { 0x00000067, 0x0010, 0x1 },
> + [15] = { 0x00000067, 0x0030, 0x1 },
> + [18] = { 0x00060037, 0x0030, 0x1 },
> + [19] = { 0x00000737, 0x0030, 0x1 },
> + [20] = { 0x00000337, 0x0030, 0x1 },
> + [21] = { 0x00000137, 0x0030, 0x1 },
> + [22] = { 0x000003b7, 0x0030, 0x1 },
> + [23] = { 0x000007b7, 0x0030, 0x1 },
> + [62] = { 0x00000037, 0x0010, 0x1 },
> + [63] = { 0x00000037, 0x0010, 0x1 },
> +};
> +
> +static struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> + [0] = { 0x0007FFFF, 0x003F },
> + [1] = { 0x0007FFFF, 0x003F },
> + [2] = { 0x0007FFFF, 0x003F },
> + [3] = { 0x0007FFFF, 0x003F },
> + [4] = { 0x0007FFFF, 0x003F },
> + [5] = { 0x0007FFFF, 0x003F },
> + [6] = { 0x0007FFFF, 0x003F },
> + [7] = { 0x0007FFFF, 0x003F },
> + [8] = { 0x0007FFFF, 0x003F },
> + [9] = { 0x0007FFFF, 0x003F },
> + [10] = { 0x0007FFFF, 0x003F },
> + [11] = { 0x0007FFFF, 0x003F },
> + [12] = { 0x0007FFFF, 0x003F },
> + [13] = { 0x0007FFFF, 0x003F },
> + [14] = { 0x0007FFFF, 0x003F },
> + [15] = { 0x0007FFFF, 0x003F },
> + [18] = { 0x0007FFFF, 0x003F },
> + [19] = { 0x0007FFFF, 0x003F },
> + [21] = { 0x0007FFFF, 0x003F },
> + [22] = { 0x0007FFFF, 0x003F },
> + [23] = { 0x0007FFFF, 0x003F },
> + [62] = { 0x0007FFFF, 0x003F },
> + [63] = { 0x0007FFFF, 0x003F },
> };
>
> -static const struct mocs_entry dirty_skylake_mocs_table[] = {
> - { 0x00003FFF, 0x003F }, /* no snoop bit */
> - { 0x00003FFF, 0x003F },
> - { 0x00003FFF, 0x003F },
> +static struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00000009, 0x0010, 0x1 },
> + { 0x00000038, 0x0030, 0x1 },
> + { 0x0000003b, 0x0030, 0x1 },
> };
>
> -static const struct mocs_entry broxton_mocs_table[] = {
> - { 0x00000009, 0x0010 },
> - { 0x00000038, 0x0030 },
> - { 0x00000039, 0x0030 },
> +static struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00003FFF, 0x003F, 0x1 }, /* no snoop bit */
> + { 0x00003FFF, 0x003F, 0x1 },
> + { 0x00003FFF, 0x003F, 0x1 },
> };
>
> -static const struct mocs_entry dirty_broxton_mocs_table[] = {
> - { 0x00007FFF, 0x003F },
> - { 0x00007FFF, 0x003F },
> - { 0x00007FFF, 0x003F },
> +static struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00000009, 0x0010, 0x1 },
> + { 0x00000038, 0x0030, 0x1 },
> + { 0x00000039, 0x0030, 0x1 },
> };
>
> -static const uint32_t write_values[] = {
> - 0xFFFFFFFF,
> - 0xFFFFFFFF,
> - 0xFFFFFFFF,
> - 0xFFFFFFFF
> +static struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
> + { 0x00007FFF, 0x003F, 0x1 },
> + { 0x00007FFF, 0x003F, 0x1 },
> + { 0x00007FFF, 0x003F, 0x1 },
> };
>
> +static uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS];
> +
> +static void set_mocs_settings(void)
> +{
> + uint8_t index;
> + /* Set un-used entries to PTE */
> + for (index = 0; index < MAX_NUMBER_MOCS_REGISTERS; index++) {
> + if (index < GEN9_NUM_MOCS_ENTRIES) {
> + if (!skylake_mocs_table[index].used) {
> + skylake_mocs_table[index]
> = skylake_mocs_table[MOCS_PTE_INDEX];
> + dirty_skylake_mocs_table[index]
> = dirty_skylake_mocs_table[MOCS_PTE_INDEX];
> + }
> + if (!broxton_mocs_table[index].used) {
> + broxton_mocs_table[index]
> = broxton_mocs_table[MOCS_PTE_INDEX];
> + dirty_broxton_mocs_table[index]
> = dirty_broxton_mocs_table[MOCS_PTE_INDEX];
> + }
> + if (!icelake_mocs_table[index].used) {
> + icelake_mocs_table[index]
> = icelake_mocs_table[MOCS_PTE_INDEX];
> + dirty_icelake_mocs_table[index]
> = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
> + }
> + } else { /*icelake has 64 entries */
> + if (!icelake_mocs_table[index].used) {
> + icelake_mocs_table[index]
> = icelake_mocs_table[MOCS_PTE_INDEX];
> + dirty_icelake_mocs_table[index]
> = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
> + }
> + }
> + }
> + memset((char *)write_values, 0xFF, MAX_NUMBER_MOCS_REGISTERS *
> sizeof(uint32_t));
> +}
> +
> static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
> {
> uint32_t devid = intel_get_drm_devid(fd);
> @@ -127,6 +208,15 @@ static bool get_mocs_settings(int fd, struct mocs_table
> *table, bool dirty)
> table->table = broxton_mocs_table;
> }
> result = true;
> + } else if (IS_ICELAKE(devid)) {
> + if (dirty) {
> + table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
> + table->table = dirty_icelake_mocs_table;
> + } else {
> + table->size = ARRAY_SIZE(icelake_mocs_table);
> + table->table = icelake_mocs_table;
> + }
> + result = true;
> }
>
> return result;
> @@ -374,13 +464,21 @@ static void check_mocs_values(int fd, unsigned engine,
> uint32_t ctx_id, bool dir
>
> static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
> {
> + uint32_t devid = intel_get_drm_devid(fd);
> + int num_of_mocs_entries;
> +
> + if (IS_ICELAKE(devid))
> + num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
> + else
> + num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
> +
> write_registers(fd, ctx_id, get_engine_base(engine),
> - write_values, ARRAY_SIZE(write_values),
> + write_values, num_of_mocs_entries,
> engine);
>
> if (engine == I915_EXEC_RENDER)
> write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
> - write_values, ARRAY_SIZE(write_values),
> + write_values, num_of_mocs_entries/2,
> engine);
> }
>
> @@ -440,6 +538,7 @@ igt_main
> fd = drm_open_driver_master(DRIVER_INTEL); /* for SECURE */
> igt_require_gem(fd);
> gem_require_mocs_registers(fd);
> + set_mocs_settings();
> igt_require(get_mocs_settings(fd, &table, false));
> }
>
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^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
@ 2019-02-15 21:46 Prathap Kumar Valsan via igt-dev
2019-02-20 8:33 ` Szwichtenberg, Radoslaw
2019-02-21 22:48 ` Lucas De Marchi
0 siblings, 2 replies; 11+ messages in thread
From: Prathap Kumar Valsan via igt-dev @ 2019-02-15 21:46 UTC (permalink / raw)
To: igt-dev; +Cc: Kalamarz
From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
This patch adds mocs table for icelake with expected L3 and eDRAM
control values.
Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
---
tests/i915/gem_mocs_settings.c | 145 +++++++++++++++++++++++++++------
1 file changed, 122 insertions(+), 23 deletions(-)
diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 5b3b6bc1..b84273a0 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -33,6 +33,10 @@
#include "igt_sysfs.h"
#define MAX_NUMBER_MOCS_REGISTERS (64)
+#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but configured. */
+#define MOCS_PTE_INDEX (0x1)
+
enum {
NONE,
RESET,
@@ -65,6 +69,7 @@ static const char * const test_modes[] = {
struct mocs_entry {
uint32_t control_value;
uint16_t l3cc_value;
+ uint8_t used;
};
struct mocs_table {
@@ -73,37 +78,113 @@ struct mocs_table {
};
/* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
- { 0x00000009, 0x0010 },
- { 0x00000038, 0x0030 },
- { 0x0000003b, 0x0030 },
+static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+ [0] = { 0x00000005, 0x0010, 0x1 },
+ [1] = { 0x00000004, 0x0030, 0x1 },
+ [2] = { 0x00000037, 0x0030, 0x1 },
+ [3] = { 0x00000005, 0x0010, 0x1 },
+ [4] = { 0x00000005, 0x0030, 0x1 },
+ [5] = { 0x00000037, 0x0010, 0x1 },
+ [6] = { 0x00000017, 0x0010, 0x1 },
+ [7] = { 0x00000017, 0x0030, 0x1 },
+ [8] = { 0x00000027, 0x0010, 0x1 },
+ [9] = { 0x00000027, 0x0030, 0x1 },
+ [10] = { 0x00000077, 0x0010, 0x1 },
+ [11] = { 0x00000077, 0x0030, 0x1 },
+ [12] = { 0x00000057, 0x0010, 0x1 },
+ [13] = { 0x00000057, 0x0030, 0x1 },
+ [14] = { 0x00000067, 0x0010, 0x1 },
+ [15] = { 0x00000067, 0x0030, 0x1 },
+ [18] = { 0x00060037, 0x0030, 0x1 },
+ [19] = { 0x00000737, 0x0030, 0x1 },
+ [20] = { 0x00000337, 0x0030, 0x1 },
+ [21] = { 0x00000137, 0x0030, 0x1 },
+ [22] = { 0x000003b7, 0x0030, 0x1 },
+ [23] = { 0x000007b7, 0x0030, 0x1 },
+ [62] = { 0x00000037, 0x0010, 0x1 },
+ [63] = { 0x00000037, 0x0010, 0x1 },
+};
+
+static struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+ [0] = { 0x0007FFFF, 0x003F },
+ [1] = { 0x0007FFFF, 0x003F },
+ [2] = { 0x0007FFFF, 0x003F },
+ [3] = { 0x0007FFFF, 0x003F },
+ [4] = { 0x0007FFFF, 0x003F },
+ [5] = { 0x0007FFFF, 0x003F },
+ [6] = { 0x0007FFFF, 0x003F },
+ [7] = { 0x0007FFFF, 0x003F },
+ [8] = { 0x0007FFFF, 0x003F },
+ [9] = { 0x0007FFFF, 0x003F },
+ [10] = { 0x0007FFFF, 0x003F },
+ [11] = { 0x0007FFFF, 0x003F },
+ [12] = { 0x0007FFFF, 0x003F },
+ [13] = { 0x0007FFFF, 0x003F },
+ [14] = { 0x0007FFFF, 0x003F },
+ [15] = { 0x0007FFFF, 0x003F },
+ [18] = { 0x0007FFFF, 0x003F },
+ [19] = { 0x0007FFFF, 0x003F },
+ [21] = { 0x0007FFFF, 0x003F },
+ [22] = { 0x0007FFFF, 0x003F },
+ [23] = { 0x0007FFFF, 0x003F },
+ [62] = { 0x0007FFFF, 0x003F },
+ [63] = { 0x0007FFFF, 0x003F },
};
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
- { 0x00003FFF, 0x003F }, /* no snoop bit */
- { 0x00003FFF, 0x003F },
- { 0x00003FFF, 0x003F },
+static struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00000009, 0x0010, 0x1 },
+ { 0x00000038, 0x0030, 0x1 },
+ { 0x0000003b, 0x0030, 0x1 },
};
-static const struct mocs_entry broxton_mocs_table[] = {
- { 0x00000009, 0x0010 },
- { 0x00000038, 0x0030 },
- { 0x00000039, 0x0030 },
+static struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00003FFF, 0x003F, 0x1 }, /* no snoop bit */
+ { 0x00003FFF, 0x003F, 0x1 },
+ { 0x00003FFF, 0x003F, 0x1 },
};
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
- { 0x00007FFF, 0x003F },
- { 0x00007FFF, 0x003F },
- { 0x00007FFF, 0x003F },
+static struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00000009, 0x0010, 0x1 },
+ { 0x00000038, 0x0030, 0x1 },
+ { 0x00000039, 0x0030, 0x1 },
};
-static const uint32_t write_values[] = {
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF
+static struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+ { 0x00007FFF, 0x003F, 0x1 },
+ { 0x00007FFF, 0x003F, 0x1 },
+ { 0x00007FFF, 0x003F, 0x1 },
};
+static uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS];
+
+static void set_mocs_settings(void)
+{
+ uint8_t index;
+ /* Set un-used entries to PTE */
+ for (index = 0; index < MAX_NUMBER_MOCS_REGISTERS; index++) {
+ if (index < GEN9_NUM_MOCS_ENTRIES) {
+ if (!skylake_mocs_table[index].used) {
+ skylake_mocs_table[index] = skylake_mocs_table[MOCS_PTE_INDEX];
+ dirty_skylake_mocs_table[index] = dirty_skylake_mocs_table[MOCS_PTE_INDEX];
+ }
+ if (!broxton_mocs_table[index].used) {
+ broxton_mocs_table[index] = broxton_mocs_table[MOCS_PTE_INDEX];
+ dirty_broxton_mocs_table[index] = dirty_broxton_mocs_table[MOCS_PTE_INDEX];
+ }
+ if (!icelake_mocs_table[index].used) {
+ icelake_mocs_table[index] = icelake_mocs_table[MOCS_PTE_INDEX];
+ dirty_icelake_mocs_table[index] = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
+ }
+ } else { /*icelake has 64 entries */
+ if (!icelake_mocs_table[index].used) {
+ icelake_mocs_table[index] = icelake_mocs_table[MOCS_PTE_INDEX];
+ dirty_icelake_mocs_table[index] = dirty_icelake_mocs_table[MOCS_PTE_INDEX];
+ }
+ }
+ }
+ memset((char *)write_values, 0xFF, MAX_NUMBER_MOCS_REGISTERS * sizeof(uint32_t));
+}
+
static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
{
uint32_t devid = intel_get_drm_devid(fd);
@@ -127,6 +208,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
table->table = broxton_mocs_table;
}
result = true;
+ } else if (IS_ICELAKE(devid)) {
+ if (dirty) {
+ table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
+ table->table = dirty_icelake_mocs_table;
+ } else {
+ table->size = ARRAY_SIZE(icelake_mocs_table);
+ table->table = icelake_mocs_table;
+ }
+ result = true;
}
return result;
@@ -374,13 +464,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
{
+ uint32_t devid = intel_get_drm_devid(fd);
+ int num_of_mocs_entries;
+
+ if (IS_ICELAKE(devid))
+ num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+ else
+ num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
write_registers(fd, ctx_id, get_engine_base(engine),
- write_values, ARRAY_SIZE(write_values),
+ write_values, num_of_mocs_entries,
engine);
if (engine == I915_EXEC_RENDER)
write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
- write_values, ARRAY_SIZE(write_values),
+ write_values, num_of_mocs_entries/2,
engine);
}
@@ -440,6 +538,7 @@ igt_main
fd = drm_open_driver_master(DRIVER_INTEL); /* for SECURE */
igt_require_gem(fd);
gem_require_mocs_registers(fd);
+ set_mocs_settings();
igt_require(get_mocs_settings(fd, &table, false));
}
--
2.20.1
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake
@ 2019-02-09 19:54 Prathap Kumar Valsan
0 siblings, 0 replies; 11+ messages in thread
From: Prathap Kumar Valsan @ 2019-02-09 19:54 UTC (permalink / raw)
To: igt-dev
From: "Kumar Valsan, Prathap" <prathap.kumar.valsan@intel.com>
This patch adds mocs table for icelake with expected L3 and eDRAM
control values.
Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan@intel.com>
---
tests/i915/gem_mocs_settings.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 5b3b6bc1..bae245ef 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -73,6 +73,18 @@ struct mocs_table {
};
/* The first entries in the MOCS tables are defined by uABI */
+static const struct mocs_entry icelake_mocs_table[] = {
+ { 0x00000005, 0x0010 },
+ { 0x00000004, 0x0030 },
+ { 0x00000037, 0x0030 },
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[] = {
+ { 0x0007FFFF, 0x003F },
+ { 0x0007FFFF, 0x003F },
+ { 0x0007FFFF, 0x003F },
+};
+
static const struct mocs_entry skylake_mocs_table[] = {
{ 0x00000009, 0x0010 },
{ 0x00000038, 0x0030 },
@@ -127,6 +139,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
table->table = broxton_mocs_table;
}
result = true;
+ } else if (IS_ICELAKE(devid)) {
+ if (dirty) {
+ table->size = ARRAY_SIZE(dirty_icelake_mocs_table);
+ table->table = dirty_icelake_mocs_table;
+ } else {
+ table->size = ARRAY_SIZE(icelake_mocs_table);
+ table->table = icelake_mocs_table;
+ }
+ result = true;
}
return result;
--
2.20.1
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^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-02-22 17:49 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-09 19:50 [igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake Prathap Kumar Valsan
2019-02-09 19:55 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2019-02-09 21:25 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2019-02-11 18:39 ` [igt-dev] [PATCH i-g-t] " Lucas De Marchi
2019-02-14 15:46 ` [igt-dev] [PATCH i-g-t v2] " Prathap Kumar Valsan via igt-dev
2019-02-09 19:54 [igt-dev] [PATCH i-g-t] " Prathap Kumar Valsan
2019-02-15 21:46 Prathap Kumar Valsan via igt-dev
2019-02-20 8:33 ` Szwichtenberg, Radoslaw
2019-02-21 22:48 ` Lucas De Marchi
2019-02-21 23:42 ` Chris Wilson
2019-02-22 17:49 ` Lucas De Marchi
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