From: Alistair Francis <alistair23@gmail.com>
To: Anup Patel <anup.patel@wdc.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH v2 16/22] hw/riscv: virt: Use AIA INTC compatible string when available
Date: Wed, 15 Sep 2021 11:17:35 +1000 [thread overview]
Message-ID: <CAKmqyKNsihYsOtmKQKv51aAy7atWZoRziOzuLtAo-WmoCftdXw@mail.gmail.com> (raw)
In-Reply-To: <20210902112520.475901-17-anup.patel@wdc.com>
On Thu, Sep 2, 2021 at 9:58 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> We should use the AIA INTC compatible string in the CPU INTC
> DT nodes when the CPUs support AIA feature. This will allow
> Linux INTC driver to use AIA local interrupt CSRs.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/virt.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index ec0cb69b8c..f43304beca 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket,
> qemu_fdt_add_subnode(mc->fdt, intc_name);
> qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle",
> intc_phandles[cpu]);
> - qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
> - "riscv,cpu-intc");
> + if (riscv_feature(&s->soc[socket].harts[cpu].env,
> + RISCV_FEATURE_AIA)) {
> + static const char * const compat[2] = {
> + "riscv,cpu-intc-aia", "riscv,cpu-intc"
> + };
> + qemu_fdt_setprop_string_array(mc->fdt, name, "compatible",
> + (char **)&compat, ARRAY_SIZE(compat));
> + } else {
> + qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
> + "riscv,cpu-intc");
> + }
> qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL, 0);
> qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);
>
> --
> 2.25.1
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com>
To: Anup Patel <anup.patel@wdc.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Atish Patra <atish.patra@wdc.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Anup Patel <anup@brainfault.org>
Subject: Re: [PATCH v2 16/22] hw/riscv: virt: Use AIA INTC compatible string when available
Date: Wed, 15 Sep 2021 11:17:35 +1000 [thread overview]
Message-ID: <CAKmqyKNsihYsOtmKQKv51aAy7atWZoRziOzuLtAo-WmoCftdXw@mail.gmail.com> (raw)
In-Reply-To: <20210902112520.475901-17-anup.patel@wdc.com>
On Thu, Sep 2, 2021 at 9:58 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> We should use the AIA INTC compatible string in the CPU INTC
> DT nodes when the CPUs support AIA feature. This will allow
> Linux INTC driver to use AIA local interrupt CSRs.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/virt.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index ec0cb69b8c..f43304beca 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket,
> qemu_fdt_add_subnode(mc->fdt, intc_name);
> qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle",
> intc_phandles[cpu]);
> - qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
> - "riscv,cpu-intc");
> + if (riscv_feature(&s->soc[socket].harts[cpu].env,
> + RISCV_FEATURE_AIA)) {
> + static const char * const compat[2] = {
> + "riscv,cpu-intc-aia", "riscv,cpu-intc"
> + };
> + qemu_fdt_setprop_string_array(mc->fdt, name, "compatible",
> + (char **)&compat, ARRAY_SIZE(compat));
> + } else {
> + qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
> + "riscv,cpu-intc");
> + }
> qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL, 0);
> qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);
>
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2021-09-15 1:20 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-02 11:24 [PATCH v2 00/22] QEMU RISC-V AIA support Anup Patel
2021-09-02 11:24 ` Anup Patel
2021-09-02 11:24 ` [PATCH v2 01/22] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode Anup Patel
2021-09-02 11:24 ` Anup Patel
2021-09-03 3:32 ` Alistair Francis
2021-09-03 3:32 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 02/22] target/riscv: Implement SGEIP bit in hip and hie CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-15 1:03 ` Alistair Francis
2021-09-15 1:03 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 03/22] target/riscv: Implement hgeie and hgeip CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-15 2:41 ` Alistair Francis
2021-09-15 2:41 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 04/22] target/riscv: Improve fidelity of guest external interrupts Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-09 6:44 ` Alistair Francis
2021-09-09 6:44 ` Alistair Francis
2021-09-09 16:35 ` Bin Meng
2021-09-09 16:35 ` Bin Meng
2021-09-13 16:33 ` Anup Patel
2021-09-13 16:33 ` Anup Patel
2021-09-15 0:49 ` Alistair Francis
2021-09-15 0:49 ` Alistair Francis
2021-09-16 13:42 ` Anup Patel
2021-09-16 13:42 ` Anup Patel
2021-10-15 6:24 ` Alistair Francis
2021-10-15 6:24 ` Alistair Francis
2021-10-18 12:55 ` Anup Patel
2021-10-18 12:55 ` Anup Patel
2021-10-18 22:55 ` Alistair Francis
2021-10-18 22:55 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 05/22] target/riscv: Allow setting CPU feature from machine/device emulation Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-04 15:12 ` Bin Meng
2021-09-04 15:12 ` Bin Meng
2021-10-21 17:06 ` Anup Patel
2021-10-21 17:06 ` Anup Patel
2021-09-06 5:33 ` Alistair Francis
2021-09-06 5:33 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 06/22] target/riscv: Add AIA cpu feature Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-04 15:13 ` Bin Meng
2021-09-04 15:13 ` Bin Meng
2021-09-06 5:33 ` Alistair Francis
2021-09-06 5:33 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 07/22] target/riscv: Add defines for AIA CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 08/22] target/riscv: Allow AIA device emulation to set ireg rmw callback Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 09/22] target/riscv: Implement AIA local interrupt priorities Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 10/22] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32 Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 11/22] target/riscv: Implement AIA hvictl and hviprioX CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 12/22] target/riscv: Implement AIA interrupt filtering CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 13/22] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 14/22] target/riscv: Implement AIA xiselect and xireg CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 15/22] target/riscv: Implement AIA IMSIC interface CSRs Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 16/22] hw/riscv: virt: Use AIA INTC compatible string when available Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-15 1:17 ` Alistair Francis [this message]
2021-09-15 1:17 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 17/22] target/riscv: Allow users to force enable AIA CSRs in HART Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-15 1:16 ` Alistair Francis
2021-09-15 1:16 ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 18/22] hw/intc: Add RISC-V AIA APLIC device emulation Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 19/22] hw/riscv: virt: Add optional AIA APLIC support to virt machine Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 20/22] hw/intc: Add RISC-V AIA IMSIC device emulation Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 21/22] hw/riscv: virt: Add optional AIA IMSIC support to virt machine Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-02 11:25 ` [PATCH v2 22/22] docs/system: riscv: Document AIA options for " Anup Patel
2021-09-02 11:25 ` Anup Patel
2021-09-09 6:51 ` Alistair Francis
2021-09-09 6:51 ` Alistair Francis
2021-09-04 13:51 ` [PATCH v2 00/22] QEMU RISC-V AIA support Bin Meng
2021-09-04 13:51 ` Bin Meng
2021-09-04 15:33 ` Anup Patel
2021-09-04 15:33 ` Anup Patel
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