From: Alistair Francis <alistair23@gmail.com>
To: Yiting Wang <yiting.wang@windriver.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmerdabbelt@google.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [PATCH] riscv: Set xPIE to 1 after xRET
Date: Fri, 3 Jan 2020 11:24:40 -0800 [thread overview]
Message-ID: <CAKmqyKO_gJDyvzzO81bxgOn2nE3-D7gR8Nx1yX5iSGxAO6Rj9Q@mail.gmail.com> (raw)
In-Reply-To: <1578023622-49180-1-git-send-email-yiting.wang@windriver.com>
On Fri, Jan 3, 2020 at 12:01 AM Yiting Wang <yiting.wang@windriver.com> wrote:
>
> When executing an xRET instruction, supposing xPP holds the
> value y, xIE is set to xPIE; the privilege mode is changed to y;
> xPIE is set to 1. But QEMU sets xPIE to 0 incorrectly.
>
> Signed-off-by: Yiting Wang <yiting.wang@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/op_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index 331cc36..e87c911 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -93,7 +93,7 @@ target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
> env->priv_ver >= PRIV_VERSION_1_10_0 ?
> MSTATUS_SIE : MSTATUS_UIE << prev_priv,
> get_field(mstatus, MSTATUS_SPIE));
> - mstatus = set_field(mstatus, MSTATUS_SPIE, 0);
> + mstatus = set_field(mstatus, MSTATUS_SPIE, 1);
> mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U);
> riscv_cpu_set_mode(env, prev_priv);
> env->mstatus = mstatus;
> @@ -118,7 +118,7 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
> env->priv_ver >= PRIV_VERSION_1_10_0 ?
> MSTATUS_MIE : MSTATUS_UIE << prev_priv,
> get_field(mstatus, MSTATUS_MPIE));
> - mstatus = set_field(mstatus, MSTATUS_MPIE, 0);
> + mstatus = set_field(mstatus, MSTATUS_MPIE, 1);
> mstatus = set_field(mstatus, MSTATUS_MPP, PRV_U);
> riscv_cpu_set_mode(env, prev_priv);
> env->mstatus = mstatus;
> --
> 2.7.4
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com>
To: Yiting Wang <yiting.wang@windriver.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"open list:RISC-V" <qemu-riscv@nongnu.org>
Subject: Re: [PATCH] riscv: Set xPIE to 1 after xRET
Date: Fri, 3 Jan 2020 11:24:40 -0800 [thread overview]
Message-ID: <CAKmqyKO_gJDyvzzO81bxgOn2nE3-D7gR8Nx1yX5iSGxAO6Rj9Q@mail.gmail.com> (raw)
In-Reply-To: <1578023622-49180-1-git-send-email-yiting.wang@windriver.com>
On Fri, Jan 3, 2020 at 12:01 AM Yiting Wang <yiting.wang@windriver.com> wrote:
>
> When executing an xRET instruction, supposing xPP holds the
> value y, xIE is set to xPIE; the privilege mode is changed to y;
> xPIE is set to 1. But QEMU sets xPIE to 0 incorrectly.
>
> Signed-off-by: Yiting Wang <yiting.wang@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/op_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index 331cc36..e87c911 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -93,7 +93,7 @@ target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
> env->priv_ver >= PRIV_VERSION_1_10_0 ?
> MSTATUS_SIE : MSTATUS_UIE << prev_priv,
> get_field(mstatus, MSTATUS_SPIE));
> - mstatus = set_field(mstatus, MSTATUS_SPIE, 0);
> + mstatus = set_field(mstatus, MSTATUS_SPIE, 1);
> mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U);
> riscv_cpu_set_mode(env, prev_priv);
> env->mstatus = mstatus;
> @@ -118,7 +118,7 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
> env->priv_ver >= PRIV_VERSION_1_10_0 ?
> MSTATUS_MIE : MSTATUS_UIE << prev_priv,
> get_field(mstatus, MSTATUS_MPIE));
> - mstatus = set_field(mstatus, MSTATUS_MPIE, 0);
> + mstatus = set_field(mstatus, MSTATUS_MPIE, 1);
> mstatus = set_field(mstatus, MSTATUS_MPP, PRV_U);
> riscv_cpu_set_mode(env, prev_priv);
> env->mstatus = mstatus;
> --
> 2.7.4
>
>
next prev parent reply other threads:[~2020-01-03 19:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-03 3:53 [PATCH] riscv: Set xPIE to 1 after xRET Yiting Wang
2020-01-03 14:22 ` Bin Meng
2020-01-03 14:22 ` Bin Meng
2020-01-03 19:24 ` Alistair Francis [this message]
2020-01-03 19:24 ` Alistair Francis
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