From: Alistair Francis <alistair23@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Bin Meng <bmeng.cn@gmail.com>,
Alistair Francis <alistair.francis@wdc.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v3 08/10] target/riscv: Consolidate RV32/64 32-bit instructions
Date: Mon, 26 Apr 2021 08:58:12 +1000 [thread overview]
Message-ID: <CAKmqyKP5tuddPKiSOt1V6YyDjV+9VAM2vU=F1BvLgwXWHm=VKg@mail.gmail.com> (raw)
In-Reply-To: <2ea910ea-690a-bdac-bcdf-436bbe28964e@linaro.org>
On Sun, Apr 25, 2021 at 3:08 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 4/23/21 8:34 PM, Alistair Francis wrote:
> > --- a/target/riscv/translate.c
> > +++ b/target/riscv/translate.c
> > @@ -74,8 +74,6 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
> >
> > #ifdef TARGET_RISCV32
> > # define is_32bit(ctx) true
> > -#elif defined(CONFIG_USER_ONLY)
> > -# define is_32bit(ctx) false
> > #else
> > static inline bool is_32bit(DisasContext *ctx)
> > {
>
> Rebase error?
This is required to avoid warnings/errors before this commit as
`is_32bit()` isn't called until this patch.
Alistair
>
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~
WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Alistair Francis <alistair.francis@wdc.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
Bin Meng <bmeng.cn@gmail.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH v3 08/10] target/riscv: Consolidate RV32/64 32-bit instructions
Date: Mon, 26 Apr 2021 08:58:12 +1000 [thread overview]
Message-ID: <CAKmqyKP5tuddPKiSOt1V6YyDjV+9VAM2vU=F1BvLgwXWHm=VKg@mail.gmail.com> (raw)
In-Reply-To: <2ea910ea-690a-bdac-bcdf-436bbe28964e@linaro.org>
On Sun, Apr 25, 2021 at 3:08 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 4/23/21 8:34 PM, Alistair Francis wrote:
> > --- a/target/riscv/translate.c
> > +++ b/target/riscv/translate.c
> > @@ -74,8 +74,6 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
> >
> > #ifdef TARGET_RISCV32
> > # define is_32bit(ctx) true
> > -#elif defined(CONFIG_USER_ONLY)
> > -# define is_32bit(ctx) false
> > #else
> > static inline bool is_32bit(DisasContext *ctx)
> > {
>
> Rebase error?
This is required to avoid warnings/errors before this commit as
`is_32bit()` isn't called until this patch.
Alistair
>
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~
next prev parent reply other threads:[~2021-04-25 23:00 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-24 3:28 [PATCH v3 00/10] RISC-V: Steps towards running 32-bit guests on Alistair Francis
2021-04-24 3:28 ` Alistair Francis
2021-04-24 3:28 ` [PATCH v3 01/10] target/riscv: Remove the hardcoded RVXLEN macro Alistair Francis
2021-04-24 3:28 ` Alistair Francis
2021-04-24 3:29 ` [PATCH v3 02/10] target/riscv: Remove the hardcoded SSTATUS_SD macro Alistair Francis
2021-04-24 3:29 ` Alistair Francis
2021-04-24 3:31 ` [PATCH v3 03/10] target/riscv: Remove the hardcoded HGATP_MODE macro Alistair Francis
2021-04-24 3:31 ` Alistair Francis
2021-04-24 3:33 ` [PATCH v3 04/10] target/riscv: Remove the hardcoded MSTATUS_SD macro Alistair Francis
2021-04-24 3:33 ` Alistair Francis
2021-04-24 3:33 ` [PATCH v3 05/10] target/riscv: Remove the hardcoded SATP_MODE macro Alistair Francis
2021-04-24 3:33 ` Alistair Francis
2021-04-24 3:33 ` [PATCH v3 06/10] target/riscv: Remove the unused HSTATUS_WPRI macro Alistair Francis
2021-04-24 3:33 ` Alistair Francis
2021-04-24 3:34 ` [PATCH v3 07/10] target/riscv: Remove an unused CASE_OP_32_64 macro Alistair Francis
2021-04-24 3:34 ` Alistair Francis
2021-04-24 3:34 ` [PATCH v3 08/10] target/riscv: Consolidate RV32/64 32-bit instructions Alistair Francis
2021-04-24 3:34 ` Alistair Francis
2021-04-24 17:08 ` Richard Henderson
2021-04-24 17:08 ` Richard Henderson
2021-04-25 22:58 ` Alistair Francis [this message]
2021-04-25 22:58 ` Alistair Francis
2021-04-25 23:53 ` Richard Henderson
2021-04-25 23:53 ` Richard Henderson
2021-04-26 5:33 ` Alistair Francis
2021-04-26 5:33 ` Alistair Francis
2021-04-24 3:34 ` [PATCH v3 09/10] target/riscv: Consolidate RV32/64 16-bit instructions Alistair Francis
2021-04-24 3:34 ` Alistair Francis
2021-04-24 3:34 ` [PATCH v3 10/10] target/riscv: Fix the RV64H decode comment Alistair Francis
2021-04-24 3:34 ` Alistair Francis
2021-04-24 17:14 ` Richard Henderson
2021-04-24 17:14 ` Richard Henderson
2021-04-25 22:58 ` Alistair Francis
2021-04-25 22:58 ` Alistair Francis
2021-04-25 22:58 ` [PATCH v3 00/10] RISC-V: Steps towards running 32-bit guests on Alistair Francis
2021-04-25 22:58 ` Alistair Francis
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