From: Andy Lutomirski <luto@kernel.org> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org>, X86 ML <x86@kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Borislav Petkov <bp@alien8.de>, Linus Torvalds <torvalds@linux-foundation.org>, Andrew Morton <akpm@linux-foundation.org>, Mel Gorman <mgorman@suse.de>, "linux-mm@kvack.org" <linux-mm@kvack.org>, Nadav Amit <nadav.amit@gmail.com>, Rik van Riel <riel@redhat.com>, Dave Hansen <dave.hansen@intel.com>, Arjan van de Ven <arjan@linux.intel.com>, Peter Zijlstra <peterz@infradead.org>, Juergen Gross <jgross@suse.com>, Boris Ostrovsky <boris.ostrovsky@oracle.com> Subject: Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Date: Wed, 21 Jun 2017 13:34:10 -0700 [thread overview] Message-ID: <CALCETrVCJo8dNBnEA2p3dhgymfcfMN=uhMz0XXn047=tsQNnFw@mail.gmail.com> (raw) In-Reply-To: <alpine.DEB.2.20.1706211127460.2328@nanos> On Wed, Jun 21, 2017 at 2:39 AM, Thomas Gleixner <tglx@linutronix.de> wrote: > On Tue, 20 Jun 2017, Andy Lutomirski wrote: >> + /* Set up PCID */ >> + if (cpu_has(c, X86_FEATURE_PCID)) { >> + if (cpu_has(c, X86_FEATURE_PGE)) { >> + cr4_set_bits(X86_CR4_PCIDE); > > So I assume that you made sure that the PCID bits in CR3 are zero under all > circumstances as setting PCIDE would cause a #GP if not. Yes. All existing code just shoves a PA of a page table in there. As far as I know, neither Linux nor anyone else uses the silly PCD and PWT bits. It's not even clear to me that they are functional if PAT is enabled. > > And what happens on kexec etc? We need to reset the asid and PCIDE I assume. > I assume it works roughly the same way as suspend, etc -- mmu_cr4_features has the desired CR4 and the init code deals with it. And PGE, PKE, etc all work correctly. I'm not sure why PCIDE needs to be cleared -- the init code will work just fine even if PCIDE is unexpectedly set. That being said, I haven't managed to understand what exactly the kexec code is doing. But I think the relevant bit is here in relocate_kernel_64.S: /* * Set cr4 to a known state: * - physical address extension enabled */ movl $X86_CR4_PAE, %eax movq %rax, %cr4 Kexec folks, is it safe to assume that kexec can already deal with the new and old kernels disagreeing on what CR4 should be?
WARNING: multiple messages have this Message-ID (diff)
From: Andy Lutomirski <luto@kernel.org> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org>, X86 ML <x86@kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Borislav Petkov <bp@alien8.de>, Linus Torvalds <torvalds@linux-foundation.org>, Andrew Morton <akpm@linux-foundation.org>, Mel Gorman <mgorman@suse.de>, "linux-mm@kvack.org" <linux-mm@kvack.org>, Nadav Amit <nadav.amit@gmail.com>, Rik van Riel <riel@redhat.com>, Dave Hansen <dave.hansen@intel.com>, Arjan van de Ven <arjan@linux.intel.com>, Peter Zijlstra <peterz@infradead.org>, Juergen Gross <jgross@suse.com>, Boris Ostrovsky <boris.ostrovsky@oracle.com> Subject: Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Date: Wed, 21 Jun 2017 13:34:10 -0700 [thread overview] Message-ID: <CALCETrVCJo8dNBnEA2p3dhgymfcfMN=uhMz0XXn047=tsQNnFw@mail.gmail.com> (raw) In-Reply-To: <alpine.DEB.2.20.1706211127460.2328@nanos> On Wed, Jun 21, 2017 at 2:39 AM, Thomas Gleixner <tglx@linutronix.de> wrote: > On Tue, 20 Jun 2017, Andy Lutomirski wrote: >> + /* Set up PCID */ >> + if (cpu_has(c, X86_FEATURE_PCID)) { >> + if (cpu_has(c, X86_FEATURE_PGE)) { >> + cr4_set_bits(X86_CR4_PCIDE); > > So I assume that you made sure that the PCID bits in CR3 are zero under all > circumstances as setting PCIDE would cause a #GP if not. Yes. All existing code just shoves a PA of a page table in there. As far as I know, neither Linux nor anyone else uses the silly PCD and PWT bits. It's not even clear to me that they are functional if PAT is enabled. > > And what happens on kexec etc? We need to reset the asid and PCIDE I assume. > I assume it works roughly the same way as suspend, etc -- mmu_cr4_features has the desired CR4 and the init code deals with it. And PGE, PKE, etc all work correctly. I'm not sure why PCIDE needs to be cleared -- the init code will work just fine even if PCIDE is unexpectedly set. That being said, I haven't managed to understand what exactly the kexec code is doing. But I think the relevant bit is here in relocate_kernel_64.S: /* * Set cr4 to a known state: * - physical address extension enabled */ movl $X86_CR4_PAE, %eax movq %rax, %cr4 Kexec folks, is it safe to assume that kexec can already deal with the new and old kernels disagreeing on what CR4 should be? -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a>
next prev parent reply other threads:[~2017-06-21 20:34 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-21 5:22 [PATCH v3 00/11] PCID and improved laziness Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 5:22 ` [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 8:01 ` Thomas Gleixner 2017-06-21 8:01 ` Thomas Gleixner 2017-06-21 8:49 ` Borislav Petkov 2017-06-21 8:49 ` Borislav Petkov 2017-06-21 15:15 ` Andy Lutomirski 2017-06-21 15:15 ` Andy Lutomirski 2017-06-21 23:26 ` Nadav Amit 2017-06-21 23:26 ` Nadav Amit 2017-06-22 2:27 ` Andy Lutomirski 2017-06-22 2:27 ` Andy Lutomirski 2017-06-22 7:32 ` Ingo Molnar 2017-06-22 7:32 ` Ingo Molnar 2017-06-21 5:22 ` [PATCH v3 02/11] x86/ldt: Simplify LDT switching logic Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 8:03 ` Thomas Gleixner 2017-06-21 8:03 ` Thomas Gleixner 2017-06-21 9:40 ` Borislav Petkov 2017-06-21 9:40 ` Borislav Petkov 2017-06-22 11:08 ` [tip:x86/mm] x86/ldt: Simplify the " tip-bot for Andy Lutomirski 2017-06-21 5:22 ` [PATCH v3 03/11] x86/mm: Remove reset_lazy_tlbstate() Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 8:03 ` Thomas Gleixner 2017-06-21 8:03 ` Thomas Gleixner 2017-06-21 9:50 ` Borislav Petkov 2017-06-21 9:50 ` Borislav Petkov 2017-06-22 11:08 ` [tip:x86/mm] " tip-bot for Andy Lutomirski 2017-06-21 5:22 ` [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 8:05 ` Thomas Gleixner 2017-06-21 8:05 ` Thomas Gleixner 2017-06-21 10:33 ` Borislav Petkov 2017-06-21 10:33 ` Borislav Petkov 2017-06-21 15:23 ` Andy Lutomirski 2017-06-21 15:23 ` Andy Lutomirski 2017-06-21 17:06 ` Borislav Petkov 2017-06-21 17:06 ` Borislav Petkov 2017-06-21 17:43 ` Borislav Petkov 2017-06-21 17:43 ` Borislav Petkov 2017-06-22 2:34 ` Andy Lutomirski 2017-06-22 2:34 ` Andy Lutomirski 2017-06-21 5:22 ` [PATCH v3 05/11] x86/mm: Track the TLB's tlb_gen and update the flushing algorithm Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 8:32 ` Thomas Gleixner 2017-06-21 8:32 ` Thomas Gleixner 2017-06-21 15:11 ` Andy Lutomirski 2017-06-21 15:11 ` Andy Lutomirski 2017-06-21 18:44 ` Borislav Petkov 2017-06-21 18:44 ` Borislav Petkov 2017-06-22 2:46 ` Andy Lutomirski 2017-06-22 2:46 ` Andy Lutomirski 2017-06-22 7:24 ` Borislav Petkov 2017-06-22 7:24 ` Borislav Petkov 2017-06-22 14:48 ` Andy Lutomirski 2017-06-22 14:48 ` Andy Lutomirski 2017-06-22 14:59 ` Borislav Petkov 2017-06-22 14:59 ` Borislav Petkov 2017-06-22 15:55 ` Andy Lutomirski 2017-06-22 15:55 ` Andy Lutomirski 2017-06-22 17:22 ` Borislav Petkov 2017-06-22 17:22 ` Borislav Petkov 2017-06-22 18:08 ` Andy Lutomirski 2017-06-22 18:08 ` Andy Lutomirski 2017-06-23 8:42 ` Borislav Petkov 2017-06-23 8:42 ` Borislav Petkov 2017-06-23 15:46 ` Andy Lutomirski 2017-06-23 15:46 ` Andy Lutomirski 2017-06-21 5:22 ` [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 9:01 ` Thomas Gleixner 2017-06-21 9:01 ` Thomas Gleixner 2017-06-21 16:04 ` Andy Lutomirski 2017-06-21 16:04 ` Andy Lutomirski 2017-06-21 17:29 ` Borislav Petkov 2017-06-21 17:29 ` Borislav Petkov 2017-06-22 14:50 ` Borislav Petkov 2017-06-22 14:50 ` Borislav Petkov 2017-06-22 17:47 ` Andy Lutomirski 2017-06-22 17:47 ` Andy Lutomirski 2017-06-22 19:05 ` Borislav Petkov 2017-06-22 19:05 ` Borislav Petkov 2017-07-27 19:53 ` Andrew Banman 2017-07-27 19:53 ` Andrew Banman 2017-07-28 2:05 ` Andy Lutomirski 2017-07-28 2:05 ` Andy Lutomirski 2017-06-23 13:34 ` Boris Ostrovsky 2017-06-23 13:34 ` Boris Ostrovsky 2017-06-23 15:22 ` Andy Lutomirski 2017-06-23 15:22 ` Andy Lutomirski 2017-06-21 5:22 ` [PATCH v3 07/11] x86/mm: Stop calling leave_mm() in idle code Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 9:22 ` Thomas Gleixner 2017-06-21 9:22 ` Thomas Gleixner 2017-06-21 15:16 ` Andy Lutomirski 2017-06-21 15:16 ` Andy Lutomirski 2017-06-23 9:07 ` Borislav Petkov 2017-06-23 9:07 ` Borislav Petkov 2017-06-21 5:22 ` [PATCH v3 08/11] x86/mm: Disable PCID on 32-bit kernels Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 9:26 ` Thomas Gleixner 2017-06-21 9:26 ` Thomas Gleixner 2017-06-23 9:24 ` Borislav Petkov 2017-06-23 9:24 ` Borislav Petkov 2017-06-21 5:22 ` [PATCH v3 09/11] x86/mm: Add nopcid to turn off PCID Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 9:27 ` Thomas Gleixner 2017-06-21 9:27 ` Thomas Gleixner 2017-06-23 9:34 ` Borislav Petkov 2017-06-23 9:34 ` Borislav Petkov 2017-06-21 5:22 ` [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 9:39 ` Thomas Gleixner 2017-06-21 9:39 ` Thomas Gleixner 2017-06-21 13:40 ` Thomas Gleixner 2017-06-21 13:40 ` Thomas Gleixner 2017-06-21 20:34 ` Andy Lutomirski [this message] 2017-06-21 20:34 ` Andy Lutomirski 2017-06-23 11:50 ` Borislav Petkov 2017-06-23 11:50 ` Borislav Petkov 2017-06-23 15:28 ` Andy Lutomirski 2017-06-23 15:28 ` Andy Lutomirski 2017-06-23 13:35 ` Boris Ostrovsky 2017-06-23 13:35 ` Boris Ostrovsky 2017-06-21 5:22 ` [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski 2017-06-21 5:22 ` Andy Lutomirski 2017-06-21 13:38 ` Thomas Gleixner 2017-06-21 13:38 ` Thomas Gleixner 2017-06-21 13:40 ` Thomas Gleixner 2017-06-21 13:40 ` Thomas Gleixner 2017-06-22 2:57 ` Andy Lutomirski 2017-06-22 2:57 ` Andy Lutomirski 2017-06-22 12:21 ` Thomas Gleixner 2017-06-22 12:21 ` Thomas Gleixner 2017-06-22 18:12 ` Andy Lutomirski 2017-06-22 18:12 ` Andy Lutomirski 2017-06-22 21:22 ` Thomas Gleixner 2017-06-22 21:22 ` Thomas Gleixner 2017-06-23 3:09 ` Andy Lutomirski 2017-06-23 3:09 ` Andy Lutomirski 2017-06-23 7:29 ` Thomas Gleixner 2017-06-23 7:29 ` Thomas Gleixner 2017-06-22 16:09 ` Nadav Amit 2017-06-22 16:09 ` Nadav Amit 2017-06-22 18:10 ` Andy Lutomirski 2017-06-22 18:10 ` Andy Lutomirski 2017-06-26 15:58 ` Borislav Petkov 2017-06-26 15:58 ` Borislav Petkov 2017-06-21 18:23 ` [PATCH v3 00/11] PCID and improved laziness Linus Torvalds 2017-06-21 18:23 ` Linus Torvalds 2017-06-22 5:19 ` Andy Lutomirski 2017-06-22 5:19 ` Andy Lutomirski
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