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From: Rob Herring <robh@kernel.org>
To: Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Peter Zijlstra <peterz@infradead.org>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>, X86 ML <x86@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v12 0/5] Another version of arm64 userspace counter access support.
Date: Mon, 15 Nov 2021 10:57:34 -0600	[thread overview]
Message-ID: <CAL_JsqLQWYNHRyNNNeP5VvWJXxp1mmeMvz1DA3ZdyyqZkKzG3A@mail.gmail.com> (raw)
In-Reply-To: <20211027201641.2076427-1-robh@kernel.org>

On Wed, Oct 27, 2021 at 3:16 PM Rob Herring <robh@kernel.org> wrote:
>
> The arm64 support departs from the x86 implementation by requiring the user
> to explicitly request user access (via attr.config1) and only enables access
> for task bound events. Since usage is explicitly requested, access is
> enabled at perf_event_open() rather than on mmap() as that greatly
> simplifies the implementation. Rather than trying to lock down the access
> as the x86 implementation has been doing, we can start with only a limited
> use case enabled and later expand it if needed.
>
> I've run this version thru Vince's perf tests[14] with arm64 support added.
> I wish I'd found these tests sooner...
>
> This originally resurrected Raphael's series[1] to enable userspace counter
> access on arm64. My previous versions are here
> [2][3][4][5][6][7][8][9][10][11][12].
> A git branch is here[13].
>
> Changes in v12:
>  - Zero PMSELR_EL0 when userspace access is enabled
>  - Return -EOPNOTSUPP for if h/w doesn't support 64-bit counters

Will, the series rebases cleanly on v5.16-rc1. Please let me know if
you want me to resend.

Peter, Will is waiting on an ack on the core/x86 bits from you.

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	 Peter Zijlstra <peterz@infradead.org>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>,  Namhyung Kim <namhyung@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>,  X86 ML <x86@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	 "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	 linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v12 0/5] Another version of arm64 userspace counter access support.
Date: Mon, 15 Nov 2021 10:57:34 -0600	[thread overview]
Message-ID: <CAL_JsqLQWYNHRyNNNeP5VvWJXxp1mmeMvz1DA3ZdyyqZkKzG3A@mail.gmail.com> (raw)
In-Reply-To: <20211027201641.2076427-1-robh@kernel.org>

On Wed, Oct 27, 2021 at 3:16 PM Rob Herring <robh@kernel.org> wrote:
>
> The arm64 support departs from the x86 implementation by requiring the user
> to explicitly request user access (via attr.config1) and only enables access
> for task bound events. Since usage is explicitly requested, access is
> enabled at perf_event_open() rather than on mmap() as that greatly
> simplifies the implementation. Rather than trying to lock down the access
> as the x86 implementation has been doing, we can start with only a limited
> use case enabled and later expand it if needed.
>
> I've run this version thru Vince's perf tests[14] with arm64 support added.
> I wish I'd found these tests sooner...
>
> This originally resurrected Raphael's series[1] to enable userspace counter
> access on arm64. My previous versions are here
> [2][3][4][5][6][7][8][9][10][11][12].
> A git branch is here[13].
>
> Changes in v12:
>  - Zero PMSELR_EL0 when userspace access is enabled
>  - Return -EOPNOTSUPP for if h/w doesn't support 64-bit counters

Will, the series rebases cleanly on v5.16-rc1. Please let me know if
you want me to resend.

Peter, Will is waiting on an ack on the core/x86 bits from you.

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-11-15 16:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-27 20:16 [PATCH v12 0/5] Another version of arm64 userspace counter access support Rob Herring
2021-10-27 20:16 ` Rob Herring
2021-10-27 20:16 ` [PATCH v12 1/5] x86: perf: Move RDPMC event flag to a common definition Rob Herring
2021-10-27 20:16   ` Rob Herring
2021-11-30 22:51   ` Thomas Gleixner
2021-11-30 22:51     ` Thomas Gleixner
2021-10-27 20:16 ` [PATCH v12 2/5] perf: Add a counter for number of user access events in context Rob Herring
2021-10-27 20:16   ` Rob Herring
2021-11-30 22:57   ` Thomas Gleixner
2021-11-30 22:57     ` Thomas Gleixner
2021-12-03 15:58     ` Rob Herring
2021-12-03 15:58       ` Rob Herring
2021-12-04 14:23       ` Thomas Gleixner
2021-12-04 14:23         ` Thomas Gleixner
2021-10-27 20:16 ` [PATCH v12 3/5] arm64: perf: Add userspace counter access disable switch Rob Herring
2021-10-27 20:16   ` Rob Herring
2021-10-27 20:16 ` [PATCH v12 4/5] arm64: perf: Enable PMU counter userspace access for perf event Rob Herring
2021-10-27 20:16   ` Rob Herring
2021-10-27 20:16 ` [PATCH v12 5/5] Documentation: arm64: Document PMU counters access from userspace Rob Herring
2021-10-27 20:16   ` Rob Herring
2021-11-15 16:57 ` Rob Herring [this message]
2021-11-15 16:57   ` [PATCH v12 0/5] Another version of arm64 userspace counter access support Rob Herring
2021-11-30 21:56   ` Rob Herring
2021-11-30 21:56     ` Rob Herring

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