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From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
To: Stefan Agner <stefan@agner.ch>
Cc: shawn.guo@linaro.org, kernel@pengutronix.de,
	"Russell King" <linux@arm.linux.org.uk>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	jason@lakedaemon.net, olof@lixom.net,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Kumar Gala" <galak@codeaurora.org>,
	marc.zyngier@arm.com,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain
Date: Fri, 13 Mar 2015 18:35:26 +0100	[thread overview]
Message-ID: <CALszF6Di4kngd1Rzp9G=xwWPc4FqOPpA+5s+jrRSUGjs8OiCLg@mail.gmail.com> (raw)
In-Reply-To: <1426203380-7155-3-git-send-email-stefan@agner.ch>

2015-03-13 0:36 GMT+01:00 Stefan Agner <stefan@agner.ch>:
> Add support for hierarchy irq domain. Use to support the interrupt
> router found in Vybrid SoC, which is between the NVIC and the
> peripherals.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> ---
>  drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
> index 4ff0805..5fac910 100644
> --- a/drivers/irqchip/irq-nvic.c
> +++ b/drivers/irqchip/irq-nvic.c
> @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
>         handle_IRQ(irq, regs);
>  }
>
> +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +                               unsigned int nr_irqs, void *arg)
> +{
> +       int i, ret;
> +       irq_hw_number_t hwirq;
> +       unsigned int type = IRQ_TYPE_NONE;
> +       struct of_phandle_args *irq_data = arg;
> +
> +       ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
> +                                  irq_data->args_count, &hwirq, &type);
> +       if (ret)
> +               return ret;
> +
> +       for (i = 0; i < nr_irqs; i++)
> +               irq_map_generic_chip(domain, virq + i, hwirq + i);
> +
> +       return 0;
> +}
> +
> +static const struct irq_domain_ops nvic_irq_domain_ops = {
> +       .xlate = irq_domain_xlate_onecell,
> +       .alloc = nvic_irq_domain_alloc,

.alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is
not selected by in the config ARM_NVIC entry.
It breaks the build with my STM32 series.

Once selected, the build is fine, and the board boots successfully.


Best regards,
Maxime

WARNING: multiple messages have this Message-ID (diff)
From: Maxime Coquelin <mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
Cc: shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
	"Russell King" <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	"Uwe Kleine-König"
	<u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org,
	olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org,
	"Arnd Bergmann" <arnd-r2nGTMty4D4@public.gmane.org>,
	"Daniel Lezcano"
	<daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	"Thomas Gleixner" <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	"Pawel Moll" <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Ian Campbell"
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	"Kumar Gala" <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	marc.zyngier-5wv7dgnIgG8@public.gmane.org,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain
Date: Fri, 13 Mar 2015 18:35:26 +0100	[thread overview]
Message-ID: <CALszF6Di4kngd1Rzp9G=xwWPc4FqOPpA+5s+jrRSUGjs8OiCLg@mail.gmail.com> (raw)
In-Reply-To: <1426203380-7155-3-git-send-email-stefan-XLVq0VzYD2Y@public.gmane.org>

2015-03-13 0:36 GMT+01:00 Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>:
> Add support for hierarchy irq domain. Use to support the interrupt
> router found in Vybrid SoC, which is between the NVIC and the
> peripherals.
>
> Signed-off-by: Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
> ---
>  drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
> index 4ff0805..5fac910 100644
> --- a/drivers/irqchip/irq-nvic.c
> +++ b/drivers/irqchip/irq-nvic.c
> @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
>         handle_IRQ(irq, regs);
>  }
>
> +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +                               unsigned int nr_irqs, void *arg)
> +{
> +       int i, ret;
> +       irq_hw_number_t hwirq;
> +       unsigned int type = IRQ_TYPE_NONE;
> +       struct of_phandle_args *irq_data = arg;
> +
> +       ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
> +                                  irq_data->args_count, &hwirq, &type);
> +       if (ret)
> +               return ret;
> +
> +       for (i = 0; i < nr_irqs; i++)
> +               irq_map_generic_chip(domain, virq + i, hwirq + i);
> +
> +       return 0;
> +}
> +
> +static const struct irq_domain_ops nvic_irq_domain_ops = {
> +       .xlate = irq_domain_xlate_onecell,
> +       .alloc = nvic_irq_domain_alloc,

.alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is
not selected by in the config ARM_NVIC entry.
It breaks the build with my STM32 series.

Once selected, the build is fine, and the board boots successfully.


Best regards,
Maxime
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WARNING: multiple messages have this Message-ID (diff)
From: mcoquelin.stm32@gmail.com (Maxime Coquelin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain
Date: Fri, 13 Mar 2015 18:35:26 +0100	[thread overview]
Message-ID: <CALszF6Di4kngd1Rzp9G=xwWPc4FqOPpA+5s+jrRSUGjs8OiCLg@mail.gmail.com> (raw)
In-Reply-To: <1426203380-7155-3-git-send-email-stefan@agner.ch>

2015-03-13 0:36 GMT+01:00 Stefan Agner <stefan@agner.ch>:
> Add support for hierarchy irq domain. Use to support the interrupt
> router found in Vybrid SoC, which is between the NVIC and the
> peripherals.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> ---
>  drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
> index 4ff0805..5fac910 100644
> --- a/drivers/irqchip/irq-nvic.c
> +++ b/drivers/irqchip/irq-nvic.c
> @@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
>         handle_IRQ(irq, regs);
>  }
>
> +static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +                               unsigned int nr_irqs, void *arg)
> +{
> +       int i, ret;
> +       irq_hw_number_t hwirq;
> +       unsigned int type = IRQ_TYPE_NONE;
> +       struct of_phandle_args *irq_data = arg;
> +
> +       ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
> +                                  irq_data->args_count, &hwirq, &type);
> +       if (ret)
> +               return ret;
> +
> +       for (i = 0; i < nr_irqs; i++)
> +               irq_map_generic_chip(domain, virq + i, hwirq + i);
> +
> +       return 0;
> +}
> +
> +static const struct irq_domain_ops nvic_irq_domain_ops = {
> +       .xlate = irq_domain_xlate_onecell,
> +       .alloc = nvic_irq_domain_alloc,

.alloc is only available with CONFIG_IRQ_DOMAIN_HIERARCHY=y, and it is
not selected by in the config ARM_NVIC entry.
It breaks the build with my STM32 series.

Once selected, the build is fine, and the board boots successfully.


Best regards,
Maxime

  reply	other threads:[~2015-03-13 17:35 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-12 23:36 [PATCH v3 00/12] ARM: vf610m4: Add Vybrid Cortex-M4 support Stefan Agner
2015-03-12 23:36 ` Stefan Agner
2015-03-12 23:36 ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 01/12] genirq: generic chip: support hierarchy domain Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 02/12] irqchip: nvic: support hierarchy irq domain Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-13 17:35   ` Maxime Coquelin [this message]
2015-03-13 17:35     ` Maxime Coquelin
2015-03-13 17:35     ` Maxime Coquelin
2015-03-12 23:36 ` [PATCH v3 03/12] irqchip: vf610-mscm: support NVIC parent Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-23  0:11   ` Jason Cooper
2015-03-23  0:11     ` Jason Cooper
2015-03-23  0:11     ` Jason Cooper
2015-03-23  8:44     ` Stefan Agner
2015-03-23  8:44       ` Stefan Agner
2015-03-23  8:44       ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 04/12] ARM: ARMv7M: define size of vector table for Vybrid Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 05/12] clocksource: add dependencies for Vybrid pit clocksource Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-13 10:25   ` Daniel Lezcano
2015-03-13 10:25     ` Daniel Lezcano
2015-03-12 23:36 ` [PATCH v3 06/12] ARM: unify MMU/!MMU addruart calls Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 07/12] ARM: imx: depend MXC debug board on 3DS machines Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-13 13:55   ` Shawn Guo
2015-03-13 13:55     ` Shawn Guo
2015-03-13 13:55     ` Shawn Guo
2015-03-12 23:36 ` [PATCH v3 08/12] ARM: allow MULTIPLATFORM with !MMU Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 09/12] ARM: efm32: move into multiplatform Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 10/12] ARM: vf610: enable Cortex-M4 on Vybrid SoC Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 11/12] ARM: dts: add support for Vybrid running on Cortex-M4 Stefan Agner
2015-03-12 23:36   ` Stefan Agner
2015-03-12 23:36 ` [PATCH v3 12/12] ARM: vf610m4: add defconfig for Linux on Vybrids Cortex-M4 Stefan Agner
2015-03-12 23:36   ` Stefan Agner

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