From: Matthew Auld <matthew.william.auld@gmail.com> To: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> Cc: "Daniel Vetter" <daniel.vetter@ffwll.ch>, "Intel Graphics Development" <intel-gfx@lists.freedesktop.org>, "Christian König" <christian.koenig@amd.com>, "ML dri-devel" <dri-devel@lists.freedesktop.org> Subject: Re: [PATCH v3 08/12] drm/ttm: Use drm_memcpy_from_wc_dbm for TTM bo moves Date: Mon, 24 May 2021 19:16:59 +0100 [thread overview] Message-ID: <CAM0jSHNP4NNQknBWLqn8h5kapcxVhAgwjjg3yQ9wDfYb41q92A@mail.gmail.com> (raw) In-Reply-To: <20210521153253.518037-9-thomas.hellstrom@linux.intel.com> On Fri, 21 May 2021 at 16:33, Thomas Hellström <thomas.hellstrom@linux.intel.com> wrote: > > Use fast wc memcpy for reading out of wc memory for TTM bo moves. > > Cc: Dave Airlie <airlied@gmail.com> > Cc: Christian König <christian.koenig@amd.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > --- > drivers/gpu/drm/ttm/ttm_bo_util.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c > index 912cbe8e60a2..4a7d3d672f9a 100644 > --- a/drivers/gpu/drm/ttm/ttm_bo_util.c > +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c > @@ -31,6 +31,7 @@ > > #include <drm/ttm/ttm_bo_driver.h> > #include <drm/ttm/ttm_placement.h> > +#include <drm/drm_memcpy.h> > #include <drm/drm_vma_manager.h> > #include <linux/dma-buf-map.h> > #include <linux/io.h> > @@ -91,6 +92,7 @@ void ttm_move_memcpy(struct ttm_buffer_object *bo, > const struct ttm_kmap_iter_ops *src_ops = src_iter->ops; > struct ttm_tt *ttm = bo->ttm; > struct dma_buf_map src_map, dst_map; > + bool wc_memcpy; > pgoff_t i; > > /* Single TTM move. NOP */ > @@ -114,11 +116,16 @@ void ttm_move_memcpy(struct ttm_buffer_object *bo, > return; > } > > + wc_memcpy = ((!src_ops->maps_tt || ttm->caching != ttm_cached) && Why do we only consider the caching value for the maps_tt case? Or am I misreading this? > + drm_has_memcpy_from_wc()); > + > for (i = 0; i < dst_mem->num_pages; ++i) { > dst_ops->map_local(dst_iter, &dst_map, i); > src_ops->map_local(src_iter, &src_map, i); > > - if (!src_map.is_iomem && !dst_map.is_iomem) { > + if (wc_memcpy) { > + drm_memcpy_from_wc_dbm(&dst_map, &src_map, PAGE_SIZE); Do we need to check the return value here? memcpy_from_wc expects certain address alignment, or is that always guaranteed here? Maybe throw a warning just for paranoia? > + } else if (!src_map.is_iomem && !dst_map.is_iomem) { > memcpy(dst_map.vaddr, src_map.vaddr, PAGE_SIZE); > } else if (!src_map.is_iomem) { > dma_buf_map_memcpy_to(&dst_map, src_map.vaddr, > -- > 2.31.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.william.auld@gmail.com> To: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> Cc: "Daniel Vetter" <daniel.vetter@ffwll.ch>, "Intel Graphics Development" <intel-gfx@lists.freedesktop.org>, "Christian König" <christian.koenig@amd.com>, "ML dri-devel" <dri-devel@lists.freedesktop.org> Subject: Re: [Intel-gfx] [PATCH v3 08/12] drm/ttm: Use drm_memcpy_from_wc_dbm for TTM bo moves Date: Mon, 24 May 2021 19:16:59 +0100 [thread overview] Message-ID: <CAM0jSHNP4NNQknBWLqn8h5kapcxVhAgwjjg3yQ9wDfYb41q92A@mail.gmail.com> (raw) In-Reply-To: <20210521153253.518037-9-thomas.hellstrom@linux.intel.com> On Fri, 21 May 2021 at 16:33, Thomas Hellström <thomas.hellstrom@linux.intel.com> wrote: > > Use fast wc memcpy for reading out of wc memory for TTM bo moves. > > Cc: Dave Airlie <airlied@gmail.com> > Cc: Christian König <christian.koenig@amd.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > --- > drivers/gpu/drm/ttm/ttm_bo_util.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c > index 912cbe8e60a2..4a7d3d672f9a 100644 > --- a/drivers/gpu/drm/ttm/ttm_bo_util.c > +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c > @@ -31,6 +31,7 @@ > > #include <drm/ttm/ttm_bo_driver.h> > #include <drm/ttm/ttm_placement.h> > +#include <drm/drm_memcpy.h> > #include <drm/drm_vma_manager.h> > #include <linux/dma-buf-map.h> > #include <linux/io.h> > @@ -91,6 +92,7 @@ void ttm_move_memcpy(struct ttm_buffer_object *bo, > const struct ttm_kmap_iter_ops *src_ops = src_iter->ops; > struct ttm_tt *ttm = bo->ttm; > struct dma_buf_map src_map, dst_map; > + bool wc_memcpy; > pgoff_t i; > > /* Single TTM move. NOP */ > @@ -114,11 +116,16 @@ void ttm_move_memcpy(struct ttm_buffer_object *bo, > return; > } > > + wc_memcpy = ((!src_ops->maps_tt || ttm->caching != ttm_cached) && Why do we only consider the caching value for the maps_tt case? Or am I misreading this? > + drm_has_memcpy_from_wc()); > + > for (i = 0; i < dst_mem->num_pages; ++i) { > dst_ops->map_local(dst_iter, &dst_map, i); > src_ops->map_local(src_iter, &src_map, i); > > - if (!src_map.is_iomem && !dst_map.is_iomem) { > + if (wc_memcpy) { > + drm_memcpy_from_wc_dbm(&dst_map, &src_map, PAGE_SIZE); Do we need to check the return value here? memcpy_from_wc expects certain address alignment, or is that always guaranteed here? Maybe throw a warning just for paranoia? > + } else if (!src_map.is_iomem && !dst_map.is_iomem) { > memcpy(dst_map.vaddr, src_map.vaddr, PAGE_SIZE); > } else if (!src_map.is_iomem) { > dma_buf_map_memcpy_to(&dst_map, src_map.vaddr, > -- > 2.31.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-24 18:17 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-21 15:32 [PATCH v3 00/12] drm/i915: Move LMEM (VRAM) management over to TTM Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 01/12] drm/i915: Untangle the vma pages_mutex Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 02/12] drm/i915: Don't free shared locks while shared Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 03/12] drm/i915: Fix i915_sg_page_sizes to record dma segments rather than physical pages Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 04/12] drm/i915/ttm Initialize the ttm device and memory managers Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 05/12] drm/i915/ttm: Embed a ttm buffer object in the i915 gem object Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 06/12] drm/ttm: Add a generic TTM memcpy move for page-based iomem Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-25 9:18 ` Matthew Auld 2021-05-25 9:18 ` Matthew Auld 2021-05-25 9:32 ` Thomas Hellström 2021-05-25 9:32 ` Thomas Hellström 2021-05-25 9:58 ` Matthew Auld 2021-05-25 9:58 ` Matthew Auld 2021-05-25 10:07 ` Thomas Hellström 2021-05-25 10:07 ` Thomas Hellström 2021-05-25 15:48 ` Christian König 2021-05-25 15:48 ` Christian König 2021-05-26 7:39 ` Thomas Hellström 2021-05-26 7:39 ` Thomas Hellström 2021-05-26 10:45 ` Christian König 2021-05-26 10:45 ` Christian König 2021-05-26 10:57 ` Thomas Hellström 2021-05-26 10:57 ` Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 07/12] drm, drm/i915: Move the memcpy_from_wc functionality to core drm Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-24 16:45 ` Matthew Auld 2021-05-24 16:45 ` Matthew Auld 2021-05-24 18:12 ` Thomas Hellström 2021-05-24 18:12 ` Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 08/12] drm/ttm: Use drm_memcpy_from_wc_dbm for TTM bo moves Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-24 18:16 ` Matthew Auld [this message] 2021-05-24 18:16 ` Matthew Auld 2021-05-24 18:47 ` Thomas Hellström 2021-05-24 18:47 ` [Intel-gfx] " Thomas Hellström 2021-05-26 12:48 ` Christian König 2021-05-26 12:48 ` [Intel-gfx] " Christian König 2021-05-21 15:32 ` [PATCH v3 09/12] drm/ttm: Document and optimize ttm_bo_pipeline_gutting() Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-25 11:00 ` Matthew Auld 2021-05-25 11:00 ` Matthew Auld 2021-05-25 13:37 ` Thomas Hellström 2021-05-25 13:37 ` Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 10/12] drm/ttm, drm/amdgpu: Allow the driver some control over swapping Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 11/12] drm/i915/ttm: Introduce a TTM i915 gem object backend Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 15:32 ` [PATCH v3 12/12] drm/i915/lmem: Verify checks for lmem residency Thomas Hellström 2021-05-21 15:32 ` [Intel-gfx] " Thomas Hellström 2021-05-21 16:06 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move LMEM (VRAM) management over to TTM (rev3) Patchwork 2021-05-21 16:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-05-21 16:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-05-24 0:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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